Table of Contents

• High-Level Decision Diagrams based coverage metrics for verification and testMaksim Jenihhin, Jaan Raik, Anton Chepurov, Uljana Reinsalu, Raimund Ubar. 1-6 [doi]
• Exploring machine learning techniques for fault localizationLuciano C. Ascari, Lucilia Yoshie Araki, Aurora T. R. Pozo, Silvia R. Vergilio. 1-6 [doi]
• Test and qualification of a Fault Tolerant FPGA based Active Antenna System for space applicationsEzequiel Brac, Pablo A. Ferreyra, Raoul Velazco, Carlos A. Marqués. 1-5 [doi]
• A case study for Formal Verification of a timing co-processorCristiano Rodrigues. 1-6 [doi]
• A method for HW functional verification through HW/SW co-simulation in complex systems: H.264/AVC decoder as case studyDieison Antonello Deprá, Bruno Zatt, Sergio Bampi. 1-6 [doi]
• NoC interconnection functional testing: Using boundary-scan to reduce the overall testing timeMarcos Barcellos Hervé, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski. 1-6 [doi]
• Analog test bus architecture for small die size and limited pin count devices with internal IPs testability emphasisEduardo Ribeiro da Silva, F. Costa, Frank Herman Behrens, Remerson Stein Kickhofel, Ricardo Maltione. 1-6 [doi]
• Execution time reduction of Differential Power Analysis experimentsGiorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. 1-5 [doi]
• Using a two-dimensional fault list for compact Automatic Test Pattern GenerationMarc Messing, Andreas Glowatz, Friedrich Hapke, Rolf Drechsler. 1-6 [doi]
• On the derivation of a minimum test set in high quality transition testingTsuyoshi Iwagaki, Mineo Kaneko. 1-6 [doi]
• Measurement and control for risk-based test cases and activitiesEllen Souza 0001, Cristine Gusmão, Keldjan Alves, Julio Venancio, Renata Cristina Faray Melo. 1-6 [doi]
• Mutation based testing of Web ServicesAndre Luiz da Silva Solino, Silvia Regina Vergilio. 1-6 [doi]
• Turning JTAG inside out for fast extended test accessSergei Devadze, Artur Jutman, Igor Aleksejev, Raimund Ubar. 1-6 [doi]
• Radiation damage characterization of digital integrated circuitsSantiago Sondon, Pablo Sergio Mandolesi, Pedro Julián, Felix Palumbo, Martin Alurralde, Alberto Filevich. 1-5 [doi]
• NBTI-aware technique for transistor sizing of high-performance CMOS gatesMaurício Banaszeski da Silva, Vinicius V. A. Camargo, Lucas Brusamarello, Gilson I. Wirth, Roberto da Silva. 1-5 [doi]
• Minimization of incompletely specified finite state machines based on distinction graphsAlex D. B. Alberto, Adenilso Simão. 1-6 [doi]
• Single element correction in sorting algorithms with minimum delay overheadCostas Argyrides, Carlos Arthur Lang Lisbôa, Dhiraj K. Pradhan, Luigi Carro. 1-6 [doi]
• Measuring the effectiveness of symmetric and asymmetric transistor sizing for Single Event Transient mitigation in CMOS 90nm technologiesThiago Assis, Fernanda Lima Kastensmidt, Gilson I. Wirth, Ricardo Reis 0001. 1-6 [doi]
• On-line test and monitoring of multi-processor SoCs: A software-based approachMounir Benabdenbi, François Pêcheux, Etienne Faure. 1-6 [doi]
• Study of SEU effects in a Turbo Decoder Bit Error RateMarta Portela-García, Mario García-Valderas, Celia López-Ongil, Luis Entrena, B. Lestriez, Luis Berrojo. 1-5 [doi]
• Using mixed-mode test bus architecture to RF-based fault injection analysis and EMC fault debugEduardo Ribeiro da Silva, F. Costa, Frank Herman Behrens, Remerson Stein Kickhofel, Ricardo Maltione. 1-6 [doi]
• Fault tolerance assessment of PIC microcontroller based on fault injectionAshkan Eghbal, Hamid R. Zarandi, Pooria M. Yaghini. 1-6 [doi]
• Study of radiation effects on PIN photodiodes with deep-trap levels using computer modelingMarcelo A. Cappelletti, Ariel P. Cédola, S. Baron, G. Casas, Eitel L. Peltzer y Blancá. 1-6 [doi]
• BugTracer: A system for integrated circuit development tracking and statistics retrievalThiago Nunes Coelho Cardoso, José Augusto Miranda Nacif, Antônio Otávio Fernandes, Claudionor Nunes Coelho. 1-4 [doi]
• Adaptive position digital control with deadbeat response for a platform on a mobile vehicleHarold R. Chamorro, C. Bustos, L. A. Lopez. 1-6 [doi]
• A modern look at the CMOS stuck-open faultRoberto Gómez 0001, Víctor H. Champac, Chuck Hawkins, Jaume Segura 0001. 1-6 [doi]
• Applying FIRMAMENT to test the SCTP communication protocol under network faultsTorgan Siqueira, Bruno Coswig Fiss, Raul Weber, Sérgio Luis Cechin, Taisy Silva Weber. 1-6 [doi]
• A practical methodology for experimental fault injection to test complex network-based systemsCristina Ciprandi Menegotto, Taisy Silva Weber, Raul Fernando Weber. 1-6 [doi]
• Testing requirements for an embedded operating system: The exception handling case studyLucieli Tolfo Beque, Thiago Dai Pra, Érika F. Cota. 1-6 [doi]
• Pruning single event upset faults with petri netsPaolo Maistri. 1-6 [doi]
• Measuring clock-signal modulation efficiency for Systems-on-Chip in electromagnetic interference environmentJorge Semião, Judit Freijedo, Marlon Moraes, M. Mallmann, C. Antunes, Juliano Benfica, Fabian Vargas 0001, Marcelino B. Santos, Isabel C. Teixeira, Juan J. Rodríguez-Andina, João Paulo Teixeira 0001, D. Lupi, Edmundo Gatti, L. Garcia, Fernando Hernandez. 1-6 [doi]
• Using software invariants for dynamic detection of transient errorsCarlos Arthur Lang Lisbôa, Carmela Noro Grando, Álvaro Freitas Moreira, Luigi Carro. 1-6 [doi]
• Investigations of the diagnosibility of digital networks with BISTRaimund Ubar, Sergei Kostin, Jaan Raik. 1-6 [doi]
• Estimating the quality of Oscillation-Based Test for detecting parametric faultsJosé Peralta, Marcelo Costamagna, Gabriela Peretti, Eduardo Romero 0002, Carlos A. Marqués. 1-6 [doi]
• Analyzing structure-based techniques for test coverage on a J2ME software product lineLiana Silva, Sérgio Soares. 1-6 [doi]
• Generating non-uniform distributions for fault injection to emulate real network behavior in test campaignsTaisy Silva Weber, Juliano Cardoso Vacaro, Torgan Flores de Siqueira, Ingrid Jansch-Pôrto. 1-6 [doi]
• Using Bulk Built-In Current Sensors and recomputing techniques to mitigate transient faults in microprocessorsFranco Leite, Tiago R. Balen, Marcos Hervé, Marcelo Lubaszewski, Gilson I. Wirth. 1-6 [doi]
• Recovery scheme for hardening system on programmable chipsCristina Meinhardt, Ricardo Reis 0001, Massimo Violante, Matteo Sonza Reorda. 1-6 [doi]