Andreas Wieferink - researchr alias

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Viewing Publication 1 - 13 from 13

2008

Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-ChipsTim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Heinrich Meyr. ijes, 3(3):150-159, 2008. [doi]

Retargetable processor system integration into multi-processor system on chip platformsAndreas Wieferink. PhD thesis, RWTH Aachen University, 2008.

SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontendsAndreas Wieferink, Tim Kogel, Olaf Zerres, Rainer Leupers, Heinrich Meyr. ijes, 3(3):109-118, 2008. [doi]

2007

ASIP architecture exploration for efficient IPSec encryption: A case studyHanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr. tecs, 6(2):12, 2007. [doi]

2005

Retargetable generation of TLM bus interfaces for MP-SoC platformsAndreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tom Michiels, Achim Nohl, Tim Kogel. codes 2005: 249-254 [doi]

2004

Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip DesignsTim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr. samos 2004: 138-148 [doi]

ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case StudyHanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr. scopes 2004: 33-46 [doi]

Early ISS Integration into Network-on-Chip DesignsAndreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr. samos 2004: 443-452 [doi]

A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip PlatformAndreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl. date 2004: 1256-1263 [doi]

2003

2001

A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description languageAndreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr. tcad, 20(11):1338-1354, 2001. [doi]

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