Tim Kogel - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 28 from 28

2022

AMAIX In-Depth: A Generic Analytical Model for Deep Learning AcceleratorsNiko Zurstraßen, Lukas Jünger 0001, Tim Kogel, Holger Keding, Rainer Leupers. ijpp, 50(2):295-318, 2022. [doi]

2020

2012

Virtual platforms: Breaking new groundsRainer Leupers, Grant Martin, Roman Plyaskin, Andreas Herkersdorf, Frank Schirrmeister, Tim Kogel, Martin Vaupel. date 2012: 685-690 [doi]

2010

From ESL 2010 to ESL 2015Tor E. Jeremiassen, Tim Kogel, Andrés Takach, Grant Martin, Adam Donlin, Karamvir Chatha. codes 2010: 61-62 [doi]

2009

From milliwatts to megawatts: system level power challengeRuchir Puri, Eshel Haritan, Stan Krolikoski, Jason Cong, Tim Kogel, Bradley D. McCredie, John Shen, AndrÃ©s Takach. dac 2009: 750-751 [doi]

2008

2006

Virtual prototyping of embedded platforms for wireless and multimediaTim Kogel, Matthew Braun. date 2006: 488-490 [doi]

Integrated system level modeling of network on chip enabled multi-processor platformsTim Kogel. PhD thesis, RWTH Aachen University, 2006.

Integrated system-level modeling of network-on-chip enabled multi-processor platformsTim Kogel, Rainer Leupers, Heinrich Meyr. Kluwer, 2006.

2005

2004

A Methodology and Tool Suite for C Compiler Generation from ADL Processor ModelsManuel Hohenauer, Hanno Scharwächter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren. date 2004: 1276-1283 [doi]

Heterogeneous MP-SoC: the solution to energy-efficient signal processingTim Kogel, Heinrich Meyr. dac 2004: 686-691 [doi]

Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip DesignsTim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr. samos 2004: 138-148 [doi]

Early ISS Integration into Network-on-Chip DesignsAndreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr. samos 2004: 443-452 [doi]

A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip PlatformAndreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl. date 2004: 1256-1263 [doi]

2003

2001

A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description languageAndreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr. tcad, 20(11):1338-1354, 2001. [doi]

A framework for fast hardware-software co-simulationAndreas Hoffmann, Tim Kogel, Heinrich Meyr. date 2001: 760-765 [doi]

Sign in or sign up to see more results.

runs on WebDSL