Chung-Hsun Huang - researchr alias

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Viewing Publication 1 - 25 from 25

2023

Design and Implementation of Machine Tool Life Inspection System Based on Sound SensingTsung-Hsien Liu, Junzhe Chi, Bo-Lin Wu, Yee-Shao Chen, Chung-Hsun Huang, Yuan-Sun Chu. sensors, 23(1):284, 2023. [doi]

2020

Lightweight Super-resolution Learning Model for Extremely Exposed ImagesTzu-Hsiu Chen, Chung-Hsun Huang, Yuan-Sun Chu. iccbn 2020: 58-62 [doi]

Towards Efficient Neural Network on Edge Devices via Statistical Weight PruningTzu-Hsiu Chen, Chung-Hsun Huang, Yuan-Sun Chu, Bo-Chao Cheng. gcce 2020: 192-193 [doi]

A High-Performance LDO Regulator Enabling Low-Power SoC With Voltage Scaling ApproachesChung-Hsun Huang, Wei-Chen Liao. tvlsi, 28(5):1141-1149, 2020. [doi]

2018

Low Cost Super-Resolution Scaling for Images with Over-Exposed and Saturated ScenesKai-Tse Cheng, Chung-Hsun Huang, Yuan-Sun Chu, Bo-Chao Cheng, Pin-Sheng Cheng Chou. gcce 2018: 545-546 [doi]

2016

A low complexity edge-preserved image compression algorithm for LCD overdriveChao-Yang Chang, Chung-Hsun Huang, Hui-Fu Chen, Chingwei Yeh, Yuan-Sun Chu, Tay-Jyi Lin. gcce 2016: 1-2 [doi]

An area and power efficient adder-based stepwise linear interpolation for digital signal processingChung-Hsun Huang, Chao-Yang Chang. tce, 62(1):69-75, 2016. [doi]

2014

2013

Efficient memory access methods for framebuffer-less video processing applicationsChao-Yang Chang, Chung-Hsun Huang, Yuan-Sun Chu. iscas 2013: 3026-3029 [doi]

A high throughput ASIC design for IPv6 routing lookup systemYi-Mao Hsiao, Yuan-Sun Chu, Chao-Yang Chang, Chung-Hsun Huang, Hsi-Hsun Yeh. iscas 2013: 505-508 [doi]

2012

A fast wake-up power gating technique with inducing a balanced rush currentChao-Yang Chang, Pai-Cheng Tso, Chung-Hsun Huang, Po-Hui Yang. iscas 2012: 3086-3089 [doi]

High-throughput intrusion detection system with parallel pattern matchingYi-Mao Hsiao, Ming-Jen Chen, Yuan-Sun Chu, Chung-Hsun Huang. ieiceee, 9(18):1467-1472, 2012. [doi]

2011

Low power and cost effective scaling engine with locking frame rate for display controllersChung-Hsun Huang, Chao-Yang Chang. tce, 57(2):305-312, 2011. [doi]

Adaptive Pseudo Dual Keeper for Wide Fan-In Dynamic CircuitsChung-Hsun Huang, Tzung-Lin Wu, Yi-Ming Wang. tcas, 58-II(10):672-676, 2011. [doi]

A fast and high efficiency buck converter with Switch-On-Demand Modulator for wide load range applicationsChung-Hsun Huang, Chao-Chun Chen. ieiceee, 8(12):963-968, 2011. [doi]

ADDLL/VDD-biasing co-design for process characterization, performance calibration, and clock synchronization in variation-tolerant designsJinn-Shyan Wang, Yung-Chen Chien, Jia-Hong Lin, Chun-Yuan Cheng, Ying-Ting Ma, Chung-Hsun Huang. asicon 2011: 47-50 [doi]

A compact delay-recycled clock skew-compensation and/or duty-cycle-correction circuitYi-Ming Wang, Jen-Tsung Yu, Yuandi Surya, Chung-Hsun Huang. socc 2011: 42-47 [doi]

2004

The CMOS carry-forward addersChung-Hsun Huang, Jinn-Shyan Wang, Chingwei Yeh, Chih-Jen Fang. jssc, 39(2):327-336, 2004. [doi]

2003

High-performance and power-efficient CMOS comparatorsChung-Hsun Huang, Jinn-Shyan Wang. jssc, 38(2):254-262, 2003. [doi]

2002

Design of high-performance CMOS priority encoders and incrementer/decrementers using multilevel lookahead and multilevel folding techniquesChung-Hsun Huang, Jinn-Shyan Wang, Yan-Chao Huang. jssc, 37(1):63-76, 2002. [doi]

2001

A high-speed CMOS incrementer/decrementerChung-Hsun Huang, Jinn-Shyan Wang, Yan-Chao Huang. iscas 2001: 88-91 [doi]

2000

High-speed and low-power CMOS priority encodersJinn-Shyan Wang, Chung-Hsun Huang. jssc, 35(10):1511-1514, 2000. [doi]

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