Travis N. Blalock - researchr alias

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Viewing Publication 1 - 15 from 15

2023

A -102dBm Sensitivity, 2.2μA Packet-Level-Duty-cycled Wake-Up Receiver with ADPLL achieving -30dB SIRLinsheng Zhang, Divya Duvvuri, Suprio Bhattacharya, Anjana Dissanayake, Xinjian Liu, Henry L. Bishop, Yaobin Zhang, Travis N. Blalock, Benton H. Calhoun, Steven M. Bowers. cicc 2023: 1-2 [doi]

2012

Tracking On-Chip Age Using Distributed, Embedded SensorsStuart N. Wooters, Adam C. Cabe, Zhenyu Qi, Jiajing Wang, Randy W. Mann, Benton H. Calhoun, Mircea R. Stan, Travis N. Blalock. tvlsi, 20(11):1974-1985, 2012. [doi]

2010

SRAM-based NBTI/PBTI sensor system designZhenyu Qi, Jiajing Wang, Adam C. Cabe, Stuart N. Wooters, Travis N. Blalock, Benton H. Calhoun, Mircea R. Stan. dac 2010: 849-852 [doi]

An Energy-Efficient Subthreshold Level Converter in 130-nm CMOSStuart N. Wooters, Benton H. Calhoun, Travis N. Blalock. tcas, 57-II(4):290-294, 2010. [doi]

2009

2008

Experimental System Prototype of a Portable, Low-Cost, C-Scan Ultrasound Imaging DeviceMichael I. Fuller, Karthik Ranganathan, Shiwei Zhou, Travis N. Blalock, John A. Hossack, William F. Walker. tbe, 55(2):519-530, 2008. [doi]

2007

An automated unique tagging system using CMOS process variationBrandon L. Dell, Jonathan F. Bolus, Travis N. Blalock. glvlsi 2007: 216-218 [doi]

2005

A three-level toggle-avoid bus signaling schemeYan Zhang, Travis N. Blalock, Mircea R. Stan. iscas 2005: 1843-1846 [doi]

2004

An On-Chip Signal Suppression Countermeasure to Power Analysis AttacksGirish B. Ratanpal, Ronald D. Williams, Travis N. Blalock. tdsc, 1(3):179-189, 2004. [doi]

2003

40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applicationsMichael I. Fuller, James P. Mabry, John A. Hossack, Travis N. Blalock. glvlsi 2003: 182-185 [doi]

A slew rate enhancement technique for operational amplifiers based on a tunable active Gm-based capacitance multiplication circuitRam Suryanarayan, Anubhav Gupta, Travis N. Blalock. glvlsi 2003: 273-276 [doi]

2001

True color 1024/spl times/768 microdisplay with analog in-pixel pulsewidth modulation and retinal averaging offset correctionTravis N. Blalock, Neela B. Gaddis, Ken A. Nishimura, Thomas A. Knotts. jssc, 36(5):838-845, 2001. [doi]

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