Abstract is missing.
- 5G wireless communication beyond 2020Jonas Hansryd. 1-3 [doi]
- Theoretical analyses and modeling for nanoelectronicsGiorgio Baccarani, Emanuele Baravelli, Elena Gnani, Antonio Gnudi, Susanna Reggiani. 4-9 [doi]
- Nature as microelectronic fab: Bioelectronics: Materials, transistors and circuitsBarbara Stadlober, Esther Karner, Andreas Petritz, Alexander Fian, Mihai Irimia-Vladu. 10-17 [doi]
- New frontiers in digital health: Remote monitoring of animal and human metabolism on our smartphones and tabletsSandro Carrara. 18 [doi]
- Simpler, more efficient designBorivoje Nikolic. 20-25 [doi]
- When hardware is free, power is expensive! Is integrated power management the solution?Michiel Steyaert, Filip Tavernier, Hans Meyvaert, Athanasios Sarafianos, Nicolas Butzen. 26-34 [doi]
- RFIC design by mathematics for next generation wireless accessYann Deval. 35 [doi]
- A 4th-order 100μA diode-C-based filter with 5dBm-IIP3 at the 24MHz cut-off frequencyAntonio A. D'Amico, Marcello De Matteis, Stefano D'Amico, C. De Berti, Lorenzo Crespi, Andrea Baschirotto. 36-39 [doi]
- th-order Gm-C elliptic filter for wideband multi-standards GNSS receiversSaeed Ghamari, Gabriele Tasselli, Cyril Botteron, Pierre-André Farine. 40-43 [doi]
- A 2.5-Gb/s multi-rate continuous-time adaptive equalizer for short reach optical linksCecilia Gimeno, Carlos Sanchez-Azqueta, Erick Guerrero, Javier Aguirre, Concepción Aldea, Santiago Celma. 44-47 [doi]
- Optical wireless receiver circuit with integrated APD and high background-light immunityPaul Brandl, Reinhard Enne, Horst Zimmermann. 48-51 [doi]
- 12.5Gb/s optical driver and receiver ICs with double threshold AGC for SATA Out-of-Band transmissionHiroshi Uemura, Yoichiro Kurita, Hideto Furuyama. 52-55 [doi]
- A 12GHz 22dB-gain-control SiGe bipolar VGA with 2° phase shift variationFabio Padovan, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua. 56-59 [doi]
- A 55-70GHz two-stage tunable polyphase filter with feedback control for quadrature generation with <2° and <0.32dB phase/amplitude imbalance in 28nm CMOS processTong Zhang, Mazhareddin Taghivand, Jacques C. Rudell. 60-63 [doi]
- A 78.8-92.8 GHz 4-bit 0-360° active phase shifter in 28nm FDSOI CMOS with 2.3 dB average peak gainDomenico Pepe, Domenico Zito. 64-67 [doi]
- An 890 mW stacked power amplifier using SiGe HBTs for X-band multifunctional chipsChao Liu, Qiang Li, Yihu Li, Xiang Li, Haitao Liu, Yong-Zhong Xiong. 68-71 [doi]
- A 3×40Gb/s 28nm FDSOI CMOS front-end array with 10mVPP sensitivity and >4VPP output swingStefan Shopov, Sorin P. Voinigescu. 72-75 [doi]
- A 28-GHz fractional-N frequency synthesizer with reference and frequency doublers for 5G cellularTeerachot Siriburanon, Hanli Liu, Kengo Nakata, Wei Deng, Ju Ho Son, Dae-Young Lee, Kenichi Okada, Akira Matsuzawa. 76-79 [doi]
- th-order IIR LPF, active FIR and 10b 300 MS/s ADC in 28nm CMOSBadr Malki, Bob Verbruggen, Ewout Martens, Piet Wambacq, Jan Craninckx. 80-83 [doi]
- In-band full-duplex transceiver technology for 5G mobile networksBjörn Debaillie, Barend van Liempd, Benjamin P. Hershberg, Jan Craninckx, Kari Rikkinen, D. J. van den Broek, Eric A. M. Klumperink, Bram Nauta. 84-87 [doi]
- Multi-standard wideband OFDM RF-PWM transmitter in 40nm CMOSShailesh Kulkarni, Ibrahim Kazi, David Seebacher, Peter Singerl, Franz Dielacher, Wim Dehaene, Patrick Reynaert. 88-91 [doi]
- A fully integrated 30GHz 16-QAM single-channel phased array transmitter with 5.9% EVM at 6dB back-offYing Chen, Yu Pei, Domine M. W. Leenaerts. 92-95 [doi]
- A 1.31Gb/s, 96.6% utilization stochastic nonbinary LDPC decoder for small cell applicationsXin-Ru Lee, Chih-Wen Yang, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee. 96-99 [doi]
- Intelligent task scheduler with high throughput NoC for real-time mobile object recognition SoCKyuHo Lee, Junyoung Park, Injoon Hong, Hoi-Jun Yoo. 100-103 [doi]
- A 0.5V power and area efficient Laplacian Pyramid processing engine using FIFO with adaptive data compressionSeyed Mohammad Ali Zeinolabedin, Jun Zhou, Xin Liu, Tony T. Kim. 104-107 [doi]
- 28nm FD-SOI technology and design platform for sub-10pJ/cycle and SER-immune 32bits processorsFady Abouzeid, Sylvain Clerc, Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Damien Croain, Gilles Gasiot, Dimitri Soussan, Philippe Roche. 108-111 [doi]
- An on-die digital aging monitor against HCI and xBTI in 16 nm Fin-FET bulk CMOS technologyMitsuhiko Igarashi, Kan Takeuchi, Takeshi Okagaki, Koji Shibutani, Hiroaki Matsushita, Koji Nii. 112-115 [doi]
- μRNG: A 300-950mV 323Gbps/W all-digital full-entropy true random number generator in 14nm FinFET CMOSSanu Mathew, David Johnston, Paul Newman, Sudhir Satpathy, Vikram Suresh, Mark Anders, Himanshu Kaul, Gregory K. Chen, Amit Agarwal, Steven Hsu, Ram Krishnamurthy. 116-119 [doi]
- A 45GHz/55GHz LO frequency selector for E-band transceivers based on switchable injection locked-oscillators in BiCMOS 55nmJosé Luis González 0001, Vincent Puyal, Alexandre Siligaris, Clement Jany, Cedric Dehos. 120-123 [doi]
- An 8.2 GHz triple coupling low-phase-noise class-F QVCO in 65nm CMOSHaikun Jia, Baoyong Chi, Zhihua Wang. 124-127 [doi]
- Suppression of VCO pulling effects using even-harmonic quiet transmitting circuitsYue Wu, Tianyu Jia, Bo Xia, Xinlong Ma, Li Kang, Xiaodong Yang. 128-131 [doi]
- A 124 to 132.5 GHz frequency quadrupler with 4.4 dBm output power in 0.13μm SiGe BiCMOSYihu Li, Wang Ling Goh, Yong-Zhong Xiong. 132-135 [doi]
- A quadrature clock generator with calibration for 22∼31.4 GS/s real-time sampling systemShunli Ma, Guangyao Zhou, Jianbing Jiang, Chixiao Chen, Yongzhen Chen, Fan Ye, Junyan Ren. 136-139 [doi]
- Non-trimmable LC oscillator for all CMOS frequency controlPhilipp Greiner, Jasmin Grosinger, Christoph Steffan, Gerald Holweg, Wolfgang Bosch. 140-143 [doi]
- A 48mW 15-to-28Gb/s source-synchronous receiver with adaptive DFE using hybrid alternate clock scheme and baud-rate CDR in 65nm CMOSShuai Yuan, Liji Wu, Ziqiang Wang, Xuqiang Zheng, Peng Wang, Wen Jia, Chun Zhang, Zhihua Wang. 144-147 [doi]
- A 3.6pJ/b 56Gb/s 4-PAM receiver with 6-Bit TI-SAR ADC and quarter-rate speculative 2-tap DFE in 32 nm CMOSHazar Yueksel, Lukas Kull, Andreas Burg, Matthias Braendli, Peter Buchmann, Pier Andrea Francese, Christian Menolfi, Marcel A. Kossel, Thomas Morf, Toke Meyer Andersen, Danny Luu, Thomas Toifl. 148-151 [doi]
- A 60GHz 4Gb/s fully integrated NRZ-to-QPSK modulator SoC for backhaul links in fiber-wireless networksYipeng Wang, Duona Luo, Quan Pan, Liwen Jing, Zhixin Li, C. Patrick Yue. 152-155 [doi]
- Demonstration of an optical chip-to-chip link in a 3D integrated electronic-photonic platformKrishna T. Settaluri, Sen Lin, Sajjad Moazeni, Erman Timurdogan, Chen Sun, Michele Moresco, Zhan Su, Yu-Hsin Chen, Gerald Leake, Douglas LaTulipe, Colin McDonough, Jeremiah Hebding, Douglas Coolbaugh, Michael Watts, Vladimir Stojanovic. 156-159 [doi]
- A low-noise programmable-gain amplifier for 25 Gb/s multi-mode fiber receivers in 28nm CMOS FDSOIFrancesco Radice, Melchiorre Bruccoleri, Enrico Mammei, Matteo Bassi, Andrea Mazzanti. 160-163 [doi]
- A 0.7-1.15GHz complementary common-gate LNA in 0.18μm SOI CMOS with +15dBm IIP3 and >1kV HBM ESD protectionBarend van Liempd, Saneaki Ariumi, Ewout Martens, Shih-Hung Chen, Piet Wambacq, Jan Craninckx. 164-167 [doi]
- High efficiency multi-mode outphasing RF power amplifier in 45nm CMOSAritra Banerjee, Lei Ding, Rahmi Hezar. 168-171 [doi]
- A current re-use PA-VCO cell for low-power BLE transmittersChuanwei Li, Antonio Liscidini. 172-175 [doi]
- An electrical-balance duplexer for in-band full-duplex with <-85dBm in-band distortion at +10dBm TX-powerBarend van Liempd, Benjamin P. Hershberg, Björn Debaillie, Piet Wambacq, Jan Craninckx. 176-179 [doi]
- A 0.6-1V input capacitor-less asynchronous digital LDO with fast transient response achieving 9.5b over 500mA loading range in 65-nm CMOSFan Yang, Philip K. T. Mok. 180-183 [doi]
- A 12V 10MHz buck converter with dead time control based on a 125 ps differential delay chainJuergen Wittmann, Alexander Barner, Thoralf Rosahl, Bernhard Wicht. 184-187 [doi]
- Suppressing output overshoot voltage technique with 47.1mW/μs power-recycling rate and 93% peak efficiency DC-DC converter for multi-core processorsMeng-Wei Chien, Wen-Hau Yang, Ying-Wei Chou, Hsin-Chieh Chen, Wei-Chung Chen, Ke-Horng Chen, Chin-Long Wey, Shin-Chi Lai, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Hsin-Yu Luo. 188-191 [doi]
- Suppressing start-up time variation versus load current - Adaptive soft-start in boost LED driversAnca Gabriela Vasilica, Vlad Anghel, Gheorghe Pristavu, Gheorghe Brezeanu. 192-195 [doi]
- BSIM-CMG: Standard FinFET compact model for advanced circuit designJuan Pablo Duarte, Sourabh Khandelwal, Aditya Medury, Chenming Hu, Pragya Kushwaha, Harshit Agarwal, Avirup Dasgupta, Yogesh Singh Chauhan. 196-201 [doi]
- Low-power analog/RF circuit design based on the inversion coefficientChristian C. Enz, Maria-Anna Chalkiadaki, Anurag Mangla. 202-208 [doi]
- rd-order ΣΔ modulator for MEMS microphonesC. De Berti, Piero Malcovati, Lorenzo Crespi, Andrea Baschirotto. 209-212 [doi]
- A 5.1mW 74dB DR CT ΔΣ modulator with quantizer intrinsic ELD compensation achieving 75fJ/conv.-step in a 20MHz BWChongjun Ding, Yiannos Manoli, Matthias Keller. 213-216 [doi]
- A continuous-time ΔΣ modulator with 91dB dynamic range in a 2 MHz signal bandwidth using a dual switched-capacitor return-to-zero DACAmrith Sukumaran, Shanthi Pavan. 217-220 [doi]
- A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delaysXin Meng, Jinzhou Cao, Tao He, Yi Zhang, Gabor C. Temes, Mitsuru Aniya, Kazuki Sobue, Koichi Hamashita. 221-224 [doi]
- A multimode CT ΔΣ-modulator with a reconfigurable digital feedback filter for semi-digital blocker/interferer rejectionRudolf Ritter, Patrick Torta, Lukas Dörrer, Antonio Di Giandomenico, Stefan Herzinger, Maurits Ortmanns. 225-228 [doi]
- I/Q mismatch compensation ΔΣ modulator using ternary capacitor rotation techniqueMasaki Yonekura, Hiroki Ishikuro. 229-232 [doi]
- Fully integrated start-up at 70 mV of boost converters for thermoelectric energy harvestingJacob Göppert, Yiannos Manoli. 233-236 [doi]
- A 76% efficiency boost converter with 220mV self-startup and 2nW quiescent power for high resistance thermo-electric energy harvestingAbhik Das, Yuan Gao, Tony Tae-Hyoung Kim. 237-240 [doi]
- 2 5μW-10mW indoor/outdoor PV energy-harvesting management unit in a 65nm SoC based on a single bidirectional multi-gain/multi-mode switched-cap converter with supercap storageDavid Bol, El Hafed Boufouss, Denis Flandre, Julien De Vos. 241-244 [doi]
- An ultra-low power capacitance extrema and ratio detector for electrostatic energy harvestersBenjamin Saft, Eric Schaefer, Alexander Rolapp, Eckhard Hennig. 245-248 [doi]
- 248pW, 0.11mV/°C glitch-free programmable voltage detector with multiple voltage duplicator for energy harvestingTeruki Someya, Hiroshi Fuketa, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya. 249-252 [doi]
- A low EMI SIDO wireless power transfer system with 10μsec response timeToru Kawajiri, Takahiro Moroto, Hiroki Ishikuro. 253-256 [doi]
- FOCUS: Key building blocks and integration strategy of a miniaturized wireless sensor nodeTae-Kwang Jang, Seokhyeon Jeong, Myungjoon Choi, Wanyeong Jung, Gyouho Kim, Yen-Po Chen, Yejoong Kim, Wootaek Lim, Dennis Sylvester, David Blaauw. 257-262 [doi]
- An integrated fluxgate magnetometer for use in closed-loop/open-loop isolated current sensingMartijn F. Snoeij, Viola Schaffer, Sudarshan Udayashankar, Mikhail V. Ivanov. 263-266 [doi]
- 2 embedded temperature sensor with ±2°C inaccuracy for self-refresh control in 25nm mobile DRAMYeo Myung Kim, Woojun Choi, Jaehoon Kim, Sanghoon Lee, Sangho Lee, Hyeongon Kim, Kofi A. A. Makinwa, Youngcheol Chae, Tae-Wook Kim. 267-270 [doi]
- A temperature sensor with a 3 sigma inaccuracy of ±2°C without trimming from -50°C to 150°C in a 16nm FinFET processMei-Chen Chuang, Chia-Liang Tai, Ying-Chih Hsu, Alan Roth, Eric G. Soenen. 271-274 [doi]
- A ratiometric readout circuit for thermal-conductivity-based resistive gas sensorsZeyu Cai, Robert H. M. van Veldhoven, Annelies Falepin, Hilco Suy, Eric Sterckx, Kofi A. A. Makinwa, Michiel A. P. Pertijs. 275-278 [doi]
- Continuous-time hybrid computation with programmable nonlinearitiesNing Guo, Yipeng Huang, Tao Mai, Sharvil Patil, Chi Cao, Mingoo Seok, Simha Sethumadhavan, Yannis P. Tsividis. 279-282 [doi]
- Design and built-in characterization of digital-to-time converters for ultra-low power ADPLLsPeng Chen, Xiongchuan Huang, Yao-Hong Liu, Ming Ding, Cui Zhou, Ao Ba, Kathleen Philips, Harmke de Groot, Robert Bogdan Staszewski. 283-286 [doi]
- 2 fully-differential 2-stage amplifier with reference-free CMFB using an architecture-switching-scheme for bandwidth variationMatthias Kuhl, Yiannos Manoli. 287-290 [doi]
- 120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETsHsiang-An Yang, Chao-Chang Chiu, Shin-Chi Lai, Jui-Lung Chen, Chih-Wei Chang, Che-Hao Meng, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Hsin-Yu Luo. 291-294 [doi]
- A 0.8-3 GHz mixer-first receiver with on-chip transformer balun in 65-nm CMOSTero Tikka, Kari Stadius, Jussi Ryynänen, Mikko Kaltiokallio. 295-298 [doi]
- A 0.6-3.0GHz 65nm CMOS radio receiver with ΔΣ-based A/D-converting channel-select filtersAnders Nejdel, Xiaodong Liu, Mattias Palm, Lars Sundström, Markus Törmänen, Henrik Sjöland, Pietro Andreani. 299-302 [doi]
- A 3.1-10.6GHz wavelet-based dual-resolution spectrum sensing with harmonic rejection mixersNam-Seog Kim, Jan M. Rabaey. 303-306 [doi]
- A 278 GHz heterodyne receiver with on-chip antenna for THz imaging in 65 nm CMOS processAlexandre Siligaris, Y. Andee, E. Mercier, J. Moron Guerra, J.-F. Lampin, G. Ducournau, Y. Quere. 307-310 [doi]
- A 9-b 0.4-V charge-mode SAR ADC with 1.6-V input swing and a MOSCAP-only DACTaimur Gibran Rabuske, Jorge R. Fernandes. 311-314 [doi]
- A 66 dB SNDR pipelined split-ADC using class-AB residue amplifier with analog gain correctionMd Shakil Akter, Rohan Sehgal, Frank M. L. van der Goes, Klaas Bult. 315-318 [doi]
- A 23fJ/conv-step 12b 290MS/s time interleaved pipelined SAR ADCSameer Singh, Madhusudan Govindarajan, T. S. Venkatesh, William Evans, Ayushi Kansal, S. S. Murali. 319-322 [doi]
- A 6-bit 10-GS/s 63-mW 4x TI time-domain interpolating flash ADC in 65-nm CMOSDong-Ryeol Oh, Jong-In Kim, Min-Jae Seo, Jin-Gwang Kim, Seung-Tak Ryu. 323-326 [doi]
- A 1.6 GS/s 3.17 mW 6-b passive pipelined binary-search ADC with memory effect canceller and reference voltage calibrationKoki Tanaka, Ryo Saito, Hiroki Ishikuro. 327-330 [doi]
- A 65nm 3.2GHz 44.2mW Low-Vt register file with robust low-capacitance dynamic local bitlinesKhawar Sarfraz, Mansun Chan. 331-334 [doi]
- Low voltage error resilient SRAM using run-time error detection and correctionAshish Kumar, G. S. Visweswaran, Kaushik Saha. 335-338 [doi]
- Slope only sense amplifier with 4.5ns sense delay for 8Mbit memory sector, employing in situ current monitoring with 66% write speed improvement in 40nm embedded flash for automotiveMihail Jefremow, Doris Schmitt-Landsiedel, Thomas Kern, Martin Stiftinger, Christoph Roll. 339-342 [doi]
- A 4GHz, low latency TCAM in 14nm SOI FinFET technology using a high performance current sense amplifier for AC current surge reductionAlexander Fritsch, Michael Kugel, Rolf Sautter, Dieter F. Wendel, Juergen Pille, Otto A. Torreiter, Shankar Kalyanasundaram, Daniel A. Dobson. 343-346 [doi]
- A linearity improvement technique for overcoming signal-dependent induced switching time mismatch in DAC-Based transmittersSilvian Spiridon, Han Yan, Hans Eberhart. 347 [doi]
- A 6x-oversampling 10GS/s 60GHz polar transmitter with 15.3% average PA efficiency in 40nm CMOSKhaled Khalaf, Vojkan Vidojkovic, John R. Long, Piet Wambacq. 348-351 [doi]
- 0.13μm CMOS 230Mbps 21pJ/b UWB-IR transmitter with 21.3% efficiencyNima Soltani, Hossein Kassiri, Hamed Mazhab-Jafari, Karim Abdelhalim, Roman Genov. 352-355 [doi]
- A fully integrated 28nm Bluetooth Low-Energy transmitter with 36% system efficiency at 3dBmFeng-Wei Kuo, Masoud Babaie, Ron Chen, Kyle Yen, Jinn-Yeh Chien, Lanchou Cho, Fred Kuo, Chewnpu Jou, Fu-Lung Hsueh, Robert Bogdan Staszewski. 356-359 [doi]
- A 30-ns recovery time, 11.5-nC input charge range, 16-channel read-out ASIC for PET applicationHesong Xu, Matteo Perenzoni, Nicola Massari, Alberto Gola, Alessandro Ferri, David Stoppa. 360-363 [doi]
- A single chip laser radar receiver with a 9×9 SPAD detector array and a 10-channel TDCS. Jahromi, J. Jansson, Ilkka Nissinen, Jan Nissinen, Juha Kostamovaara. 364-367 [doi]
- 32-Channel low-noise lock-in ASIC for non-invasive light detection in silicon photonicsPietro Ciccarella, Marco Carminati, Giorgio Ferrari, Francesco Morichetti, Marco Sampietro. 368-371 [doi]
- A 13.2b optical proximity sensor system with 130klx ambient light rejection capable of heart rate and blood oximetry monitoringLuca Sant, Andrea Fant, Snezana Stojanovic, Simone Fabbro, Jose Luis Ceballos. 372-375 [doi]
- rd order noise shaping time-to-digital converter with 176fs resolutionMehmet Batuhan Dayanik, Nicholas Collins, Michael P. Flynn. 376-379 [doi]
- A fractional-N sub-sampling PLL using a pipelined phase-interpolator with a FoM of -246dBAravind Tharayil Narayanan, Makihiko Katsuragi, Kento Kimura, Satoshi Kondo, Korkut Kaan Tokgoz, Kengo Nakata, Wei Deng, Kenichi Okada, Akira Matsuzawa. 380-383 [doi]
- A 5-GHz subharmonically injection-locked all-digital PLL with complementary switched injectionSung-Yong Cho, SungWoo Kim, Min-Seong Choo, Jinhyung Lee, Han-Gon Ko, Sungchun Jang, Sang-Hyeok Chu, Woo-Rham Bae, Yoonsoo Kim, Deog Kyoon Jeong. 384-387 [doi]
- A ΣΔ based direct all-digital frequency synthesizer with 20 Mbps frequency modulation capability and 3μs startup latencyRaghavasimhan Thirunarayanan, David Ruffieux, Nicola Scolari, Christian C. Enz. 388-391 [doi]
- Low power digitally controlled delay insertion unit and 1% accuracy 100MHz oscillator for precise dead-time insertion in DC-DC convertersDmytro Cherniak, Michael Aichner, Roberto Nonis, Nicola Da Dalt. 392-395 [doi]
- A low power configurable bio-impedance spectroscopy (BIS) ASIC with simultaneous ECG and respiration recording functionalityJiawei Xu, Pieter Harpe, Julia Pettine, Chris Van Hoof, Refet Firat Yazicioglu. 396-399 [doi]
- A 30 μW remotely-powered implant with time-based voltage regulationMehrdad A. Ghanad, Catherine Dehollain, Michael M. Green. 400-403 [doi]
- A compact 0.135-mW/channel LNA array for piezoelectric ultrasound transducersChao Chen, Zhao Chen, Zu-yao Chang, Michiel A. P. Pertijs. 404-407 [doi]
- A Continuous-Time Collocated Force-Feedback and Readout Front-End for MEM GyroscopesSebastian Nessler, Maximilian Marx, Michael Maurer, Stefan Rombach, Yiannos Manoli. 408-411 [doi]
- A BIST structure for the evaluation of the MOSFET gate dielectric interface state density in post-processed CMOS chipsNorman Dodel, Stefan Keil, Andreas Wiemhofer, Malte Kortstock, Philipp Scholz, Uwe Kerst, Roland Thewes. 412-415 [doi]