Bruce L. Jacob - researchr alias

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Viewing Publication 1 - 40 from 40

2021

2020

DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM SimulatorShang Li 0001, Zhiyuan Yang, Dhiraj Reddy, Ankur Srivastava, Bruce L. Jacob. cal, 19(2):110-113, 2020. [doi]

2009

The Memory System: You Can t Avoid It, You Can t Ignore It, You Can t Fake ItBruce L. Jacob. Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, 2009. [doi]

2008

Memory Systems: Cache, DRAM, DiskBruce L. Jacob, Spencer W. Ng, David T. Wang. Morgan Kaufmann, 2008.

Accurate and fast system-level power modeling: An XScale-based case studyAnkush Varma, Eric Debes, Igor Kozintsev, Paul Klein, Bruce L. Jacob. tecs, 7(3), 2008. [doi]

2007

Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and ScalingBrinda Ganesh, Aamer Jaleel, David Wang, Bruce L. Jacob. hpca 2007: 109-120 [doi]

Accurate and fast system-level power modeling: An XScale-based case studyAnkush Varma, Bruce L. Jacob, Eric Debes, Igor Kozintsev, Paul Klein. tecs, 6(4):26, 2007. [doi]

2006

2005

2004

Extended Split-Issue: Enabling Flexibility in the Hardware Implementation of NUAL VLIW DSPsBharath Iyer, Sadagopan Srinivasan, Bruce L. Jacob. isca 2004: 364-375 [doi]

2003

2002

Introduction to the two special issues on memoryBruce L. Jacob, Shuvra S. Bhattacharyya. tecs, 1(1):2-5, 2002. [doi]

2001

The performance and energy consumption of three embedded real-time operating systemsKathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob. cases 2001: 203-210 [doi]

Concurrency, latency, or system overhead: which has the largest impact on uniprocessor DRAM-system performance?Vinodh Cuppu, Bruce L. Jacob. isca 2001: 62-71 [doi]

High-Performance DRAMs in Workstation EnvironmentsVinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor N. Mudge. TC, 50(11):1133-1153, 2001. [doi]

Uniprocessor Virtual Memory without TLBsBruce L. Jacob, Trevor N. Mudge. TC, 50(5):482-499, 2001. [doi]

In-Line Interrupt Handling for Software-Managed TLBsAamer Jaleel, Bruce L. Jacob. iccd 2001: 62-67

Improving the Precise Interrupt Mechanism of Software-Managed TLB Miss HandlersAamer Jaleel, Bruce L. Jacob. hipc 2001: 282-293 [doi]

Transparent data-memory organizations for digital signal processorsSadagopan Srinivasan, Vinodh Cuppu, Bruce L. Jacob. cases 2001: 44-48 [doi]

2000

The New DRAM Interfaces: SDRAM, RDRAM and VariantsBrian Davis, Bruce L. Jacob, Trevor N. Mudge. ishpc 2000: 26-31 [doi]

1999

A Performance Comparison of Contemporary DRAM ArchitecturesVinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor N. Mudge. isca 1999: 222-233 [doi]

1998

Virtual memory in contemporary microprocessorsBruce L. Jacob, Trevor N. Mudge. micro, 18(4):60-75, 1998. [doi]

Virtual Memory: Issues of ImplementationBruce L. Jacob, Trevor N. Mudge. Computer, 31(6):33-43, 1998.

A Look at Several Memory Management Units, TLB-Refill Mechanisms, and Page Table OrganizationsBruce L. Jacob, Trevor N. Mudge. asplos 1998: 295-306 [doi]

1997

Software-oriented memory-management designBruce L. Jacob. PhD thesis, University of Michigan, USA, 1997. [doi]

A Comment on An Analytical Model for Designing Memory Hierarchies Bruce L. Jacob, Peter M. Chen, Seth R. Silverman, Trevor N. Mudge. TC, 46(10):1151, 1997.

Software-Managed Address TranslationBruce L. Jacob, Trevor N. Mudge. hpca 1997: 156-167 [doi]

1996

An Analytical Model for Designing Memory HierarchiesBruce L. Jacob, Peter M. Chen, Seth R. Silverman, Trevor N. Mudge. TC, 45(10):1180-1194, 1996.

The ::::trading function:::: in actionBruce L. Jacob, Trevor N. Mudge. sigopsE 1996: 241-247 [doi]

1995

Composing with Genetic AlgorithmsBruce L. Jacob. icmc 1995: [doi]

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