Sergej Meschkov - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 7 from 7

2023

SLM ISA and Hardware Extensions for RISC-V ProcessorsSeyedeh Maryam Ghasemi, Sergej Meschkov, Jonas Krautter, Dennis R. E. Gnad, Mehdi B. Tahoori. iolts 2023: 1-5 [doi]

Enabling In-Field Parametric Testing for RISC-V CoresSeyedeh Maryam Ghasemi, Sergej Meschkov, Jonas Krautter, Dennis R. E. Gnad, Mehdi B. Tahoori. itc 2023: 367-376 [doi]

New Approaches of Side-Channel Attacks Based on Chip Testing MethodsSergej Meschkov, Dennis R. E. Gnad, Jonas Krautter, Mehdi B. Tahoori. tcad, 42(5):1411-1424, May 2023. [doi]

Automated Masking of FPGA-Mapped DesignsNicolai Müller, Sergej Meschkov, Dennis R. E. Gnad, Mehdi B. Tahoori, Amir Moradi 0001. fpl 2023: 79-85 [doi]

Power Side-Channel Attacks and Countermeasures on Computation-in-Memory Architectures and TechnologiesBrojogopal Sapui, Jonas Krautter, Mahta Mayahinia, Atousa Jafari, Dennis Gnad, Sergej Meschkov, Mehdi B. Tahoori. ets 2023: 1-6 [doi]

JitSCA: Jitter-based Side-Channel Analysis in Picoscale ResolutionKai Schoos, Sergej Meschkov, Mehdi B. Tahoori, Dennis R. E. Gnad. tches, 2023(3):294-320, 2023. [doi]

2021

Is your secure test infrastructure secure enough? : Attacks based on delay test patterns using transient behavior analysisSergej Meschkov, Dennis R. E. Gnad, Jonas Krautter, Mehdi B. Tahoori. itc 2021: 334-338 [doi]

Sign in or sign up to see more results.

runs on WebDSL