Srinath R. Naidu - researchr alias

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Viewing Publication 1 - 10 from 10

2018

Fast Approach for Iris Detection on GPU by Applying Search Localization for Circular Hough TransformPinkey Kumari, Srinath R. Naidu. icacci 2018: 774-778 [doi]

2016

Parameter-importance based Monte-Carlo Technique for Variation-aware Analog Yield OptimizationSita kondamadugula, Srinath R. Naidu. glvlsi 2016: 51-56 [doi]

Accelerated evolutionary algorithms with parameterimportance based population initialization for variation-aware analog yield optimizationSita kondamadugula, Srinath R. Naidu. mwscas 2016: 1-4 [doi]

2015

Geometric Programming Formulation for Gate Sizing with Pipelining ConstraintsSrinath R. Naidu. vlsid 2015: 452-457 [doi]

2007

Speeding up Monte-Carlo Simulation for Statistical Timing Analysis of Digital Integrated CircuitsSrinath R. Naidu. vlsid 2007: 265-270 [doi]

2006

Statistical Timing for Parametric Yield Prediction of Digital Integrated CircuitsJochen A. G. Jess, K. Kalafala, Srinath R. Naidu, Ralph H. J. M. Otten, Chandramouli Visweswariah. tcad, 25(11):2376-2392, 2006. [doi]

2003

Statistical timing for parametric yield prediction of digital integrated circuitsJochen A. G. Jess, K. Kalafala, Srinath R. Naidu, Ralph H. J. M. Otten, Chandramouli Visweswariah. dac 2003: 932-937 [doi]

On Synthesis of Easily Testable (k, K) CircuitsSrinath R. Naidu, Vijay Chandru. TC, 52(11):1490-1494, 2003. [doi]

2002

Timing Yield Calculation Using an Impulse-Train ApproachSrinath R. Naidu. vlsid 2002: 219-224 [doi]

2001

Minimizing stand-by leakage power in static CMOS circuitsSrinath R. Naidu, E. T. A. F. Jacobs. date 2001: 370-376 [doi]

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