Journal: IEEE Design & Test of Computers

Volume 32, Issue 6

4 -- 5André Ivanov. Microfluidics: Design and Test Solutions for Enabling Biochemistry on a Chip
6 -- 7Tsung-Yi Ho, Bhargab B. Bhattacharya. Guest Editors' Introduction: Microfluidics: Design and Test Solutions for Enabling Biochemistry on a Chip
8 -- 19Paul Pop, Ismail Emre Araci, Krishnendu Chakrabarty. Continuous-Flow Biochips: Technology, Physical-Design Methods, and Testing
20 -- 31Yehya H. Ghallab, Hamdy Abd Elhamid, Yehea Ismail. Lab on a Chip Based on CMOS Technology: System Architectures, Microfluidic Packaging, and Challenges
32 -- 40Xiwei Huang, Hao Yu, Xu Liu, Yu Jiang, Mei Yan. A Single-Frame Superresolution Algorithm for Lab-on-a-Chip Lensless Microfluidic Imaging
41 -- 50Robert Wille, Oliver Keszocze, Rolf Drechsler, Tobias Boehnisch, Alexander Kroker. Scalable One-Pass Synthesis for Digital Microfluidic Biochips
51 -- 59Jeffrey McDaniel, Brian Crites, Philip Brisk, William H. Grover. Flow-Layer Physical Design for Microchips Based on Monolithic Membrane Valves
60 -- 68Hailong Yao, Qin Wang, Yizhong Ru, Yici Cai, Tsung-Yi Ho. Integrated Flow-Control Codesign Methodology for Flow-Based Microfluidic Biochips
69 -- 75Tsun-Ming Tseng, Bing Li, Ulf Schlichtmann, Tsung-Yi Ho. Storage and Caching: Synthesis of Flow-Based Microfluidic Biochips
76 -- 86Martin Barnasconi, Manfred Dietrich, Karsten Einwich, Thilo Vörtler, Jean-Paul Chaput, Marie-Minerve Louërat, François Pêcheux, Zhi Wang, Philippe Cuenot, Ingmar Neumann, Thang Nguyen, Ronan Lucas, Emmanuel Vaumorin. UVM-SystemC-AMS Framework for System-Level Verification and Validation of Automotive Use Cases
87 -- 98Makoto Nagata, Satoshi Takaya, Hiroaki Ikeda. In-Place Signal and Power Noise Waveform Capturing Within 3-D Chip Stacking
110 -- 111Theo Theocharides. Test Technology TC Newsletter
112 -- 0Scott Davidson. Chips That Do Things

Volume 32, Issue 5

4 -- 5André Ivanov. Cyber-Physplical Systems for Medical Apications
6 -- 8Paul Bogdan, Rahul Mangharam. Guest Editors' Introduction: Cyber-Physical Systems for Medical Applications
9 -- 16James Weimer, Radoslav Ivanov, Alexander Roederer, Sanjian Chen, Insup Lee. Parameter-Invariant Design of Medical Alarms
17 -- 26Margarida M. Silva, Alexander Medvedev, Torbjörn Wigren, Teresa Mendonça. Modeling the Effect of Intravenous Anesthetics: A Path Toward Individualization
27 -- 34Zhenqi Huang, Chuchu Fan, Alexandru Mereacre, Sayan Mitra, Marta Z. Kwiatkowska. Simulation-Based Verification of Cardiac Pacemakers With Guaranteed Coverage
35 -- 44Marilyn Wolf, Mihaela van der Schaar, Honggab Kim, Jie Xu. Caring Analytics for Adults With Special Needs
45 -- 55Alan Wassyng, Neeraj Kumar Singh, Mischa Geven, Nicholas Proscia, Hao Wang, Mark Lawford, Tom Maibaum. Can Product-Specific Assurance Case Templates Be Used as Medical Device Standards?
56 -- 65Arnab Ray, Rance Cleaveland. Security Assurance Cases for Medical Cyber-Physical Systems
66 -- 73Anitha Murugesan, Sanjai Rayadurgam, Michael W. Whalen, Mats Per Erik Heimdahl. Design Considerations for Modeling Modes in Cyber-Physical Systems
74 -- 88Brian R. Larson, Yi Zhang, Stephen C. Barrett, John Hatcliff, Paul L. Jones. Enabling Safe Interoperation by Medical Device Virtual Integration
89 -- 97Suren Kumar, Pankaj Singhal, Venkat N. Krovi. Computer-Vision-Based Decision Support in Surgical Robotics
98 -- 108Marco Beccani, Hakan Tunc, Addisu Taddese, Ekawahyu Susilo, Péter Völgyesi, Ákos Lédeczi, Pietro Valdastri. Systematic Design of Medical Capsule Robots
115 -- 116Theo Theocharides. Test Technology TC Newsletter
119 -- 120Insup Lee. Medical Cyber-Physical Systems: The Early Years

Volume 32, Issue 4

4 -- 5André Ivanov. Advances in 3-D Integrated Circuits, Systems, and CAD Tools
6 -- 7Dae-Hyun Kim, Sung Kyu Lim. Guest Editors' Introduction: Advances in 3-D Integrated Circuits, Systems, and CAD Tools
8 -- 22Dae-Hyun Kim, Sung Kyu Lim. Physical Design and CAD Tools for 3-D Integrated Circuits: Challenges and Opportunities
23 -- 31Guruprasad Katti, S. W. Ho, Li Hong Yu, Songbai Zhang, Rahul Dutta, Roshan Weerasekera, Ka-Fai Chang, Jong-Kai Lin, Srinivasa Rao Vempati, Surya Bhattacharya. Fabrication and Assembly of Cu-RDL-Based 2.5-D Low-Cost Through Silicon Interposer (LC-TSI)
32 -- 39Yong Han, Boon Long Lau, Boo Yang Jung, Xiaowu Zhang. Heat Dissipation Capability of a Package-on-Package Embedded Wafer-Level Package
40 -- 48Christos Papameletis, Brion L. Keller, Vivek Chickermane, Said Hamdioui, Erik Jan Marinissen. A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers
49 -- 58Dongjun Xu, Sai Manoj Sai Manoj P. D., Kanwen Wang, Hao Yu, Ningmei Yu, Mingbin Yu. A 2.5-D Memory-Logic Integration With Data-Pattern-Aware Memory Controller
59 -- 70Che-Wei Chou, Jin-Fu Li, Yun-Chao Yu, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou. Hierarchical Test Integration Methodology for 3-D ICs
71 -- 80Ishan G. Thakkar, Sudeep Pasricha. 3-D WiRED: A Novel WIDE I/O DRAM With Energy-Efficient 3-D Bank Organization
85 -- 86Theo Theocharides. Test Technology TC Newsletter
88 -- 0Scott Davidson. A 3-D Forward into the Past

Volume 32, Issue 3

4 -- 0André Ivanov. A Look at Asynchronous Design and Photonic Network-on-a-Chip (PNoC)
5 -- 18Steven M. Nowick, Montek Singh. Asynchronous Design - Part 1: Overview and Recent Advances
19 -- 28Steven M. Nowick, Montek Singh. Asynchronous Design - Part 2: Systems and Methodologies
29 -- 39Sai Vineel Reddy Chittamuru, Sudeep Pasricha. Crosstalk Mitigation for High-Radix and Low-Diameter Photonic NoC Architectures
49 -- 50Theo Theocharides. Test Technology TC Newsletter
56 -- 0Scott Davidson. Time Out of Mind

Volume 32, Issue 2

4 -- 5André Ivanov. A Look at Trojan Attack, Pruning, and Dependability
7 -- 16Swaroop Ghosh, Abhishek Basak, Swarup Bhunia. How Secure Are Printed Circuit Boards Against Trojan Attacks?
17 -- 28Marco Ottavi, Salvatore Pontarelli, Dimitris Gizopoulos, Cristiana Bolchini, Maria K. Michael, Lorena Anghel, Mehdi Baradaran Tahoori, Antonis M. Paschalis, Pedro Reviriego, Oliver Bringmann, Viacheslav Izosimov, Hans A. R. Manhaeve, Christos Strydis, Said Hamdioui. Dependable Multicore Architectures at Nanoscale: The View From Europe
29 -- 38Jacob Murray, Nghia Tang, Partha Pratim Pande, Deukhyoun Heo, Behrooz A. Shirazi. DVFS Pruning for Wireless NoC Architectures
40 -- 47James Buczkowski, Walden C. Rhines. The Future of Automotive Design and the Road to Get There
49 -- 50Theo Theocharides. Test Technology TC Newsletter
56 -- 0Scott Davidson. Getting Credit

Volume 32, Issue 1

4 -- 5André Ivanov. Speeding Up Analog Integration and Test for Mixed-Signal SoCs
6 -- 8Rubin A. Parekhji, Kenneth Butler, Gordon Roberts. Guest Editors' Introduction: Speeding Up Analog Integration and Test for Mixed-Signal SoCs
9 -- 17Antonio Anastasio Bruto da Costa, Pallab Dasgupta. Formal Interpretation of Assertion-Based Features on AMS Designs
18 -- 25Manuel J. Barragan Asian, Gildas Leger. A Procedure for Alternate Test Feature Design and Selection
26 -- 35Siva Kumar Sudani, Li Xu, Degang Chen. A Comparative Study of State-of-the-Art High-Performance Spectral Test Methods
36 -- 43Ender Yilmaz, Sule Ozev. Adaptive-Learning-Based Importance Sampling for Analog Circuit DPPM Estimation
44 -- 52ByongChan Lim, Ji-Eun Jang, James Mao, Jaeha Kim, Mark Horowitz. Digital Analog Design: Enabling Mixed-Signal System Validation
53 -- 60Ke Huang, Nathan Kupp, Constantinos Xanthopoulos, John M. Carulli Jr., Yiorgos Makris. Low-Cost Analog/RF IC Testing Through Combined Intra- and Inter-Die Correlation Models
61 -- 69Vishwanath Natarajan, Aritra Banerjee, Shreyas Sen, Shyam Kumar Devarakond, Abhijit Chatterjee. Yield Recovery of RF Transceiver Systems Using Iterative Tuning-Driven Power-Conscious Performance Optimization
75 -- 76Theo Theocharides. Test Technology TC Newsletter
79 -- 80Peng Li. The Art of Certifying Analog/Mixed-Signal Circuits