| 346 | -- | 353 | V. K. Jain, S. Horiguchi. VLSI considerations for TESH: a new hierarchical interconnection network for 3-D integration |
| 354 | -- | 363 | Christian Legl, Bernd Wurth, Klaus Eckl. Computing support-minimal subfunctions during functional decomposition |
| 364 | -- | 371 | Kang-Ngee Chia, Hea Joung Kim, S. Lansing, William H. Mangione-Smith, J. Villasensor. High-performance automatic target recognition through data-specific VLSI |
| 372 | -- | 386 | O. Kibar, Philippe J. Marchand, Sadik C. Esener. High-speed CMOS switch designs for free-space optoelectronic MIN s |
| 387 | -- | 399 | Daniel Mange, Eduardo Sanchez, André Stauffer, Gianluca Tempesti, Pierre Marchal, Christian Piguet. Embryonics: a new methodology for designing field-programmable gate arrays with self-repair and self-replicating properties |
| 400 | -- | 408 | Scott Hauck, Gaetano Borriello, Carl Ebeling. Mesh routing topologies for multi-FPGA systems |
| 409 | -- | 419 | Karim Arabi, Bozena Kaminska, Mohamad Sawan. On chip testing data converters using static parameters |
| 420 | -- | 431 | Rajagopalan Srinivasan, Sandeep K. Gupta, Melvin A. Breuer. Bounds on pseudoexhaustive test lengths |
| 432 | -- | 444 | Irith Pomeranz, Sudhakar M. Reddy. On methods to match a test pattern generator to a circuit-under-test |
| 445 | -- | 456 | Vaughn Betz, Jonathan Rose. Effect of the prefabricated routing track distribution on FPGA area-efficiency |
| 457 | -- | 463 | Rohini Gupta, John Willis, Lawrence T. Pileggi. Analytic termination metrics for pin-to-pin lossy transmission lines with nonlinear drivers |
| 464 | -- | 474 | Wayne P. Burleson, Maciej J. Ciesielski, Fabian Klass, W. Liu. Wave-pipelining: a tutorial and research survey |
| 475 | -- | 483 | Bongjin Jung, Wayne P. Burleson. Efficient VLSI for Lempel-Ziv compression in wireless data communication networks |
| 484 | -- | 492 | Zhanping Chen, Kaushik Roy, Tan-Li Chou. Efficient statistical approach to estimate power considering uncertain properties of primary inputs |
| 493 | -- | 497 | Marco Winzker. Low-power arithmetic for the processing of video signals |
| 498 | -- | 501 | Jianmin Li, Chung-Kuan Cheng. Routability improvement using dynamic interconnect architecture |
| 502 | -- | 506 | Franco Fummi, Donatella Sciuto, Cristina Silvano. Automatic generation of error control codes for computer applications |
| 507 | -- | 511 | Cesare Alippi, Franco Fummi, Vincenzo Piuri, Mariagiovanna Sami, Donatella Sciuto. Testability analysis and behavioral testing of the Hopfield neural paradigm |