The following publications are possibly variants of this publication:
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- A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOIM. Sultan M. Siddiqui, Zhao Chuan Lee, Tony Tae-Hyoung Kim. tvlsi, 29(10):1707-1719, 2021. [doi]
- An 8T Subthreshold SRAM Cell Utilizing Reverse Short Channel Effect for Write Margin and Read Performance ImprovementTae-Hyoung Kim, Jason Liu, Chris H. Kim. cicc 2007: 241-244 [doi]