The following publications are possibly variants of this publication:
- A 40nm RRAM Compute-in-Memory Macro Featuring On-Chip Write-Verify and Offset-Cancelling ADC ReferencesWantong Li, Xiaoyu Sun, Hongwu Jiang, Shanshi Huang, Shimeng Yu. essderc 2021: 79-82 [doi]
- A 40-nm MLC-RRAM Compute-in-Memory Macro With Sparsity Control, On-Chip Write-Verify, and Temperature-Independent ADC ReferencesWantong Li, Xiaoyu Sun, Shanshi Huang, Hongwu Jiang, Shimeng Yu. jssc, 57(9):2868-2877, 2022. [doi]
- NeuroSim Validation with 40nm RRAM Compute-in-Memory MacroAnni Lu, Xiaochen Peng, Wantong Li, Hongwu Jiang, Shimeng Yu. aicas 2021: 1-4 [doi]
- A 40nm Analog-Input ADC-Free Compute-in-Memory RRAM Macro with Pulse-Width Modulation between Sub-arraysHongwu Jiang, Wantong Li, Shanshi Huang, Shimeng Yu. vlsit 2022: 266-267 [doi]
- A 40nm RRAM Compute-in-Memory Macro with Parallelism-Preserving ECC for Iso-Accuracy Voltage ScalingWantong Li, James Read, Hongwu Jiang, Shimeng Yu. esscirc 2022: 101-104 [doi]
- Secure-RRAM: A 40nm 16kb Compute-in-Memory Macro with Reconfigurability, Sparsity Control, and Embedded SecurityWantong Li, Shanshi Huang, Xiaoyu Sun, Hongwu Jiang, Shimeng Yu. cicc 2021: 1-2 [doi]
- Feature Extraction for Smart Sensing Using Multi-perspectives TransformationSanad Al-Maskari, Ibrahim A. Ibrahim, Xue Li, Eimad Abusham, Abdulqader Almars. adc 2018: 236-248 [doi]