The following publications are possibly variants of this publication:
- Notice of Violation of IEEE Publication PrinciplesA 10GHz SiGe OC192 frequency synthesizer using a passive feed-forward loop filter and a half rate oscillatorA. Maxim. esscirc 2004: 363-366 [doi]
- Notice of Violation of IEEE Publication Principles: A low reference spurs 1-5 GHz 0.13 μm CMOS frequency synthesizer using a fully-sampled feed-forward loop filter architectureAdrian Maxim. jssc, 42(11):2503-2514, 2007. [doi]
- Notice of Violation of IEEE Publication PrinciplesA 12.5GHz SiGe BICMOS limiting amplifier using a dual offset cancellation loopA. Maxim, D. Antrik. esscirc 2005: 97-100 [doi]
- Notice of Violation of IEEE Publication PrinciplesA Varactor-Less 10GHz CMOS LC-VCO for Optical Communications Transceiver SOCs Using Caged InductorsA. Maxim. cicc 2006: 663-670 [doi]
- Sample-reset loop filter architecture for process independent and ripple-pole-less low jitter CMOS charge-pump PLLsA. Maxim, B. Scott, E. Schneider, M. Hagge, S. Chacko, Dan Stiurca. iscas 2001: 766-769 [doi]
- Notice of Violation of IEEE Publication PrinciplesA 10.7GHz SiGe BICMOS limiting amplifier using multiple offset cancellation loopsAdrian Maxim. cicc 2005: 127-130 [doi]
- Notice of Violation of IEEE Publication PrinciplesA Single-Conversion SiGe BiCMOS Satellite TV LNB Front-End Using an Image Reject Mixer and a Calibrated Full-Rate VCOA. Maxim, M. Gheorghe, D. Smith. cicc 2007: 97-100 [doi]