Table of Contents

• Mutation analysis for SystemC designs at TLMValerio Guarnieri, Nicola Bombieri, Graziano Pravadelli, Franco Fummi, Hanno Hantson, Jaan Raik, Maksim Jenihhin, Raimund Ubar. 1-6 [doi]
• Robustness with respect to SEUs of a self-converging algorithmRaoul Velazco, Gilles Foucard, Fabrice Pancher, Wassim Mansour, Greicy Marques-Costa, Devan Sohier, Alain Bui. 1-5 [doi]
• SystemC-AMS high-level modeling of linear analog blocks with power consumption informationLaurent Bousquet, Fabio Cenni, Emmanuel Simeu. 1-6 [doi]
• Neutron detection in atmospheric environment through static and dynamic SRAM-based test benchLuigi Dilillo, Paolo Rech, Jean Marc Gallière, Patrick Girard 0001, Frederic Wrobel, Frédéric Saigné. 1-6 [doi]
• Test and calibration of MEMS convective accelerometers with a fully electrical setupAhmed Amine Rekik, Florence Azaïs, Norbert Dumas, Frédérick Mailly, Pascal Nouet. 1-6 [doi]
• First studies of the impact of dose radiation on the electromagnetic susceptibility of bipolar transistorsSylvie Jarrix, Laurent Dusseau, Nathalie Chatry, P. Hoffmann, Adrien Doridant, A. Blain, Tristan Dubois, Jeremy Raoult, Philippe Calvel. 1-4 [doi]
• Modular and adaptative test-bed for infrared photodetectorsL. A. Faria, L. F. M. Nohra, N. A. S. Gomes, F. D. P. Alves. 1-6 [doi]
• Functional test generation for the pLRU replacement mechanism of embedded cache memoriesWilson J. Pérez H., Ernesto Sánchez 0001, Matteo Sonza Reorda, Alberto Tonda, Jaime Velasco-Medina. 1-6 [doi]
• Communication fault injection for multi-protocol Java applications testingCristina Ciprandi Menegotto, Taisy Silva Weber. 1-6 [doi]
• Testing linear and non-linear analog circuits using moment generating functionsSuraj Sindia, Vishwani D. Agrawal, Virendra Singh. 1-6 [doi]
• An approach for clustering test dataAlexandre Rafael Lenz, Aurora T. R. Pozo, Silvia Regina Vergilio. 1-6 [doi]
• Timing issues for an efficient use of concurrent error detection codesRodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. 1-6 [doi]
• Test power reduction via deterministic alignment of stimulus and response bitsSobeeh Almukhaizim, Eman AlQuraishi, Ozgur Sinanoglu. 1-6 [doi]
• Methodology and platform for fault co-emulationJorge Arturo Corso Sarmiento, Francisco Javier Ramirez Fernandez. 1-6 [doi]
• A fault-tolerant service discovery protocol for emergency search and rescue missionsJanine Kniess, Orlando Loques, Célio Vinicius N. de Albuquerque. 1-6 [doi]
• Studying the influence of chip temperatures on timing integrityAndrás Timár, Márta Rencz. 1-5 [doi]
• A new Built-In Current Sensor scheme to detect dynamic faults in Nano-Scale SRAMsFelipe Lavratti, Andrea Calimera, Letícia Maria Veiras Bolzani, Fabian Vargas 0001, Enrico Macii. 1-6 [doi]
• Investigating the effects of transient faults in Programmable Capacitor ArraysTiago R. Balen, Guilherme Schwanke Cardoso, Odair Lelis Gonçalez, Marcelo Soares Lubaszewski. 1-6 [doi]
• Scan chain configuration method for broadcast decompressor architectureMartin Chloupek, Ondrej Novák. 1-5 [doi]
• Analysis of SEU parameters for the study of SRAM cells reliability under radiationKarine Castellani-Coulié, Jean Michel Portal, Gilles Micolau, Hassen Aziza. 1-5 [doi]
• Adaptive approach to tolerate multiple faulty links in Network-on-ChipAnelise Kologeski, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt. 1-6 [doi]
• NBTI-aware data allocation strategies for scratchpad memory based embedded systemsCesare Ferri, Dimitra Papagiannopoulou, R. Iris Bahar, Andrea Calimera. 1-6 [doi]
• Using an FPGA-based fault injection technique to evaluate software robustness under SEEs: A case studyMarta Portela-García, Almudena Lindoso, Luis Entrena, Mario García-Valderas, Celia López-Ongil, Bernardo Pianta, Letícia Maria Bolzani Poehls, Fabian Vargas 0001. 1-6 [doi]
• Evaluating the efficiency of data-flow software-based techniques to detect SEEs in microprocessorsJosé Rodrigo Azambuja, Angelo Cardoso Lapolli, Maurício Altieri, Fernanda Lima Kastensmidt. 1-6 [doi]
• Programmable sensor for on-line checking of signal integrity in FPGA-based systems subject to aging effectsMaría Dolores Valdés, Judit Freijedo, María José Moure, Juan J. Rodríguez-Andina, Jorge Semião, Fabian Vargas 0001, Isabel C. Teixeira, João Paulo Teixeira 0001. 1-7 [doi]
• On the functional test of MESI controllersErnesto Sánchez 0001, Matteo Sonza Reorda. 1-6 [doi]
• Designing and analyzing a SpaceWire router IP for soft errors detectionJimmy Tarrillo, Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt. 1-6 [doi]
• Evaluating coverage collection using the VEasy functional verification tool suiteSamuel Nascimento Pagliarini, Paulo André Haacke, Fernanda Lima Kastensmidt. 1-6 [doi]
• IC immunity modeling process validation using on-chip measurementsSonia Ben Dhia, Alexandre Boyer, Bertrand Vrignon, Mikaël Deobarro. 1-6 [doi]
• Formally verifying an RTOS scheduling monitor IP core in embedded systemsCarlos Ivan Castro Marquez, Marius Strum, Wang Jiang Chau, Fabian Vargas 0001. 1-6 [doi]
• Modeling the effect of process variations on the timing response of nanometer digital circuitsJudit Freijedo, Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas 0001, Isabel C. Teixeira, João Paulo Teixeira 0001. 1-5 [doi]
• On-line BIST for performance failure prediction under aging effects in automotive safety-critical applicationsR. S. Oliveira, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira 0001. 1-6 [doi]
• Prediction of long-term immunity of a phase-locked loopAlexandre Boyer, Sonia Ben Dhia, B. Li, C. Lemoine, Bertrand Vrignon. 1-6 [doi]
• 3D Thermal-aware floorplanner for many-core single-chip systemsDavid Cuesta, José L. Risco-Martín, José L. Ayala, David Atienza. 1-6 [doi]
• Configurable platform for IC combined tests of total-ionizing dose radiation and electromagnetic immunityJuliano Benfica, Letícia Maria Bolzani Poehls, Fabian Vargas 0001, José Lipovetzky, Ariel Lutenberg, Sebastián E. García, Edmundo Gatti, Fernando Hernandez, Ney Laert Vilar Calazans. 1-6 [doi]
• A cache based algorithm to predict HDL modules faultsJosé Augusto Miranda Nacif, Thiago S. F. Silva, Luiz Filipe M. Vieira, Alex Borges Vieira, Antônio Otávio Fernandes, Claudionor Nunes Coelho. 1-3 [doi]
• Impact of SEU configurations on a SRAM cell response at circuit levelGilles Micolau, Hassen Aziza, Karine Castellani-Coulié, Jean Michel Portal. 1-5 [doi]
• Impact of RF-based fault injection in Pierce-type crystal oscillators under EMC standard tests in microcontrollersAlfredo Olmos, Andre Vilas Boas, Eduardo Ribeiro da Silva, José Carlos da Silva 0002, Ricardo Maltione. 1-8 [doi]
• Error-resilient design of branch predictors for effective yield improvementSobeeh Almukhaizim, Ozgur Sinanoglu. 1-6 [doi]
• Automated testing of embedded automotive systems from requirement specification modelsSebastian Siegl, Kai-Steffen Hielscher, Reinhard German, Christian Berger 0001. 1-6 [doi]
• An improved OBT strategy for untuned continuous-time analog filtersPablo A. Petrashin, Carlos Dualibe. 1-5 [doi]
• A TLM-based approach to functional verification of hardware components at different abstraction levelsMikhail M. Chupilko, Alexander Kamkin. 1-6 [doi]
• Functional verification of logic modules for a Gigabit Ethernet switchJorge L. Tonfat, Gustavo Neuberger, Ricardo Reis 0001. 1-4 [doi]
• Behavioral-level thermal- and aging-estimation flowSven Rosinger, Malte Metzdorf, Domenik Helms, Wolfgang Nebel. 1-6 [doi]
• Evaluating test reuse of a software product line oriented strategyWesley Klewerton Guez Assunção, Daniela de Freitas Guilhermino Trindade, Thelma Elita Colanzi, Silvia Regina Vergilio. 1-6 [doi]
• Testing for faults, looking for defectsVishwani D. Agrawal. 1 [doi]
• Configurable Thru-Silicon-Via interconnect Built-In Self-Test and diagnosisVladimir Pasca, Lorena Anghel, Mounir Benabdenbi. 1-6 [doi]
• Testing in an agile product development environment: An industry experience reportAndreia M. dos Santos, Börje F. Karlsson, André M. Cavalcante, Igor B. Correia, Emanuel Silva. 1-6 [doi]
• Reliability enhancement via Sleep TransistorsFrank Sill Torres, Claas Cornelius, Dirk Timmermann. 1-6 [doi]
• Hybrid verificatio of temporal properties in hardware dependent softwareDjones Lettnin, Wolfgang Rosenstiel. 1-6 [doi]