Arne Heittmann - researchr alias

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Viewing Publication 1 - 18 from 18

2018

Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cellsArne Heittmann, Tobias G. Noll. date 2018: 1496-1499 [doi]

2017

Mixing circuit based on neural associative memories and nanoelectronic 1S1R cellsArne Heittmann, Tobias G. Noll. NANOARCH 2017: 119-124 [doi]

2014

Variability analysis of a hybrid CMOS/RS nanoelectronic calibration circuitArne Heittmann, Tobias G. Noll. iscas 2014: 1656-1659 [doi]

2013

Modeling variability and irreproducibility of nanoelectronic resistive switches for circuit simulationArne Heittmann, Tobias G. Noll. aspdac 2013: 503-508 [doi]

Variability evaluation of feedback circuits used in nanoelectronic Memristive/CMOS circuitsArne Heittmann, Tobias G. Noll. glvlsi 2013: 137-142 [doi]

Analysis of the area-delay performance of hybrid nanoelectronic memory cores used in field programmable gate arraysQin Wang, Arne Heittmann, Tobias G. Noll. glvlsi 2013: 233-238 [doi]

2012

Limits of writing multivalued resistances in passive nanoelectronic crossbars used in neuromorphic circuitsArne Heittmann, Tobias G. Noll. glvlsi 2012: 227-232 [doi]

A hybrid CMOS/memristive nanoelectronic circuit for programming synaptic weightsArne Heittmann, Tobias G. Noll. esann 2012: [doi]

A Monte Carlo analysis of a write method used in passive nanoelectronic crossbarsArne Heittmann, Tobias G. Noll. NANOARCH 2012: 93-100 [doi]

2011

Sensitivity of neuromorphic circuits using nanoelectronic resistive switches to pulse synchronizationArne Heittmann, Tobias G. Noll. glvlsi 2011: 375-378 [doi]

2007

Gabor-Like Image Filtering Using a Neural MicrocircuitChristian Mayr, Arne Heittmann, René Schüffny. tnn, 18(3):955-959, 2007. [doi]

2005

3D Chip Stack Technology Using Through-Chip InterconnectsPeter Benkart, Alexander Kaiser, Andreas Munding, Markus Bschorr, Hans-Jörg Pfleiderer, Erhard Kohn, Arne Heittmann, Holger Huebner, Ulrich Ramacher. dt, 22(6):512-518, 2005. [doi]

2004

Pulse coupled neural networks with adaptive synapses for image segmentationJörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny. arcs 2004: 275-282

Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementationJörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny. ipas 2004: 290-296 [doi]

2003

Ressourceneffiziente Architekturen neuronaler AssoziativspeicherArne Heittmann. PhD thesis, University of Paderborn, Germany, 2003. [doi]

Correlation-based feature detection using pulsed neural networksArne Heittmann, Ulrich Ramacher. nnsp 2003: 479-488 [doi]

2002

An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection WeightsArne Heittmann, Ulrich Ramacher, Daniel Matolin, Jörg Schreiter, René Schüffny. icann 2002: 1293-1298 [doi]

Analog implementation for networks of integrate-and-fire neurons with adaptive local connectivityJörg Schreiter, Ulrich Ramacher, Arne Heittmann, D. Matolini, René Schüffny. nnsp 2002: 657-666 [doi]

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