Abstract is missing.
- A 9.87 nW 1 kS/s 8.7 ENOB SAR ADC for implantable epileptic seizure detection microsystemsAnh-Tuan Do, Chun Kit Lam, Yung Sern Tan, Kiat Seng Yeo, Jia Hao Cheong, Lei Yao, Meng Tong Tan, Minkyu Je. 1-4 [doi]
- A fully digital green LDO regulator dedicated for biomedical implant using a power-aware binary switching techniqueChiang Liang Kok, Qi Huang, Di Zhu, Liter Siek, Wei Meng Lim. 5-8 [doi]
- A low-power, reconfigurable smart sensor system for EEG acquisition and classificationDinup Sukumaran, Yao Enyi, Sun Shuo, Arindam Basu, Dongning Zhao, Justin Dauwels. 9-12 [doi]
- A 96×96 1V ultra-low power CMOS image sensor for biomedical applicationTongxi Wang, Xiwei Huang, Mei Yan, Hao Yu, Kiat Seng Yeo, Ismail Cevik, Suat Ay. 13-16 [doi]
- Integrated circuits design for neural recording sensor interfaceXiaodan Zou, Lei Liu, Yung Sern Tan, Minkyu Je, Kiat Seng Yeo. 17-20 [doi]
- The evolution and developing tendency of DAC design methodsBing Han, Jian-guo Ma. 21-24 [doi]
- A novel quantization algorithm suitable for high-speed analog-to-digital convertersNasim Soufizadeh-Balaneji, Khayrollah Hadidi. 25-28 [doi]
- A robust NTF zero optimization technique for both low and high OSRs sigma-delta modulatorsYun Du, Tao He, Yang Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. 29-32 [doi]
- A DT 0-2 MASH ΣΔ modulator with VCO-based quantizer for enhanced linearityTao He, Yun Du, Yang Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. 33-36 [doi]
- Blind channel estimation for MIMO-OFDM systems with repeated time-domain symbolsShih-Hao Fang, Ju-Ya Chen, Jing-Shiun Lin, Ming-Der Shieh, Wei-Chieh Huang, Jen-Yuan Hsu. 37-40 [doi]
- Comparative performance analysis of a streamlined iteration cancellation technique for MIMO-OFDM systems with memoryless nonlinearityDragana Barjamovic, Izzet Kale. 41-44 [doi]
- Kernel-stopped parallel turbo decoding for HomePlug Green PHY systemsLi-An Ou, Chih-Chia Wei, Kuang-Yi Hsu, Cheng-Hung Lin. 45-48 [doi]
- Increasing the energy efficiency of WSNs using algebraic soft-decision reed-solomon decodersWei Zhang, Xinmiao Zhang, Hao Wang. 49-52 [doi]
- Envelope detection based workload prediction for partial decoding schemeChen Liu, Xin Jin, Satoshi Goto. 53-56 [doi]
- A comparative study of hysteretic voltage-mode buck converters for high switching frequency and high accuracyKing-Man Lai, Chenchang Zhan, Wing-Hung Ki. 57-60 [doi]
- A reconfigurable seamless-transition DC-DC Converter With lossless current-sensing techniqueFenjie Yuan, Xiaobo Wu, Sheng Liu. 61-64 [doi]
- DC-DC converter with continuous-time feed-forward Sigma-Delta modulator controlHong Gao, Lin Xing, Yasunori Kobori, Feng Zhao, Haruo Kobayashi, Shyunsuke Miwa, Atsushi Motozawa, Zachary Nosker, Kiichi Niitsu, Nobukazu Takai, Takahiro Odaguchi, Isao Nakanishi, Kenji Nemoto, Jun-ichi Matsuda. 65-68 [doi]
- Half-wave Class DE Low dv/dt rectifierKazuaki Fukui, Hirotaka Koizumi. 69-72 [doi]
- Inductively coupled wireless power transfer with class-DE power amplifierTomoharu Nagashima, Xiuqin Wei, Tadashi Suetsugu, Hiroo Sekiya. 73-76 [doi]
- Design of high voltage digital-to-analog converter for electrical stimulatorYa-Hsin Hsueh, Guei-Rong Chen. 77-80 [doi]
- The heterogeneous sensor system on chipC.-H. Lee, W.-Y. Chuang, C.-T. Lin, S.-H. Lin, W. J. Wu. 81-83 [doi]
- Burst-pulse control of microstimulator for bladder controllerChen-Yueh Huang, Shuenn-Yuh Lee, Jia-Hua Hong, Ming-Chun Liang, Cheng-Han Hsieh. 84-87 [doi]
- A spiking neural network chip for odor data classificationHung-Yi Hsieh, Kea-Tiong Tang. 88-91 [doi]
- An implantable microsystem for studying the Parkinson's DiseaseYung-Chan Chen, Yu-Po Lin, Tsui-Ling Hsieh, Chun-Yi Yeh, Pin-Yang Huang, Hung-Chih Chiu, Zong-Ye Wang, Wen-Yang Hsu, Po-Chiun Huang, Kea-Tiong Tang, Hsi-Pin Ma, Hsin Chen. 92-95 [doi]
- Analysis of an interrupted circuit with fast-slow bifurcationYutaka Izumi, Hiroyuki Asahara, Kazuyuki Aihara, Takuji Kousaka. 96-99 [doi]
- Key-sensitivity improvement of block cipher systems based on nonlinear feedback shift registersKotaro Fukuda, Akio Tsuneda. 100-103 [doi]
- Fault tolerance of simplified parallel power converters with current sharing functionToshiyasu Ohata, Shota Kirikawa, Toshimichi Saito. 104-107 [doi]
- A MATLAB program for Volterra distortion analysis in CMOS switched source followerHailang Liang, Jin He, Cheng Wang, Xiaoan Zhu, Mansun Chan. 108-111 [doi]
- A low-power sense amplifier for adiabatic memory using memristorYuki Urata, Yasuhiro Takahashi, Toshikazu Sekine, Nazrul Anuar Nayan. 112-115 [doi]
- Design and implementation of dynamic Word-Line pulse write margin monitor for SRAMShao-Cheng Wang, Geng-Cing Lin, Yi-Wei Lin, Ming-Chien Tsai, Yi-Wei Chiu, Shyh-Jye Jou, Ching-Te Chuang, Nan-Chun Lien, Wei-Chiang Shih, Kuen-Di Lee, Jyun-Kai Chu. 116-119 [doi]
- Low power delay locked loop with all digital controlled SAR delay cellKo-Chi Kuo, Chung-Yuan Chang, Si-Hsien Li. 120-123 [doi]
- 2PCDAL: Two-phase clocking dual-rail adiabatic logicYasuhiro Takahashi, Zhongyu Luo, Toshikazu Sekine, Nazrul Anuar Nayan, Michio Yokoyama. 124-127 [doi]
- A sample-time error calibration technique in time-interleaved ADCs with correlation-based detection and voltage-controlled compensationYiwen Zhang, Xiaoshi Zhu, Chixiao Chen, Fan Ye, Junyan Ren. 128-131 [doi]
- Improvements of quasi-cyclic low-density parity-check codes based on hybrid structures of BIBD's schemesChao-Chin Yang, Jen-Fa Huang, Ta-Chun Nieh, Chun-Ming Huang. 132-135 [doi]
- Saliency detection improved by Principle Component Analysis and boundary scoring approachChien-Chi Chen, Po-Hung Wu, Jian-Jiun Ding, Hsin-Hui Chen. 136-139 [doi]
- An SNR-aware inter-symbol data-mapping precoding scheme for single-carrier systemsYing-Tsung Lin, Sau-Gee Chen. 140-143 [doi]
- Fast intra prediction algorithm with transform domain edge detection for HEVCYi-Ching Ting, Tian-Sheuan Chang. 144-147 [doi]
- A dynamic-range-improved 2.4GHz WLAN class-E PA combining PWPM and cascode modulationYinsidi Jiao, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins. 148-151 [doi]
- A 0.6-V subthreshold-leakage supressed CMOS fully differential switched-capacitor amplifierTsung-Sum Lee, Wen-Zhe Lu, Yi-Cheng Huang. 152-155 [doi]
- A novel capacitively-coupled instrumentation amplifier employing chopping and auto-zeroingPeng Sun, Menglian Zhao, Xiaobo Wu, Rui Fan. 156-159 [doi]
- A 1-V CDS bandgap reference without on-chip resistorsPeng-Yu Chen, Soon-Jyh Chang, Chung-Ming Huang, Jin-Fu Lin. 160-163 [doi]
- A small die area and high linearity 10-bit capacitive three-level DACKeigo Oshiro, Daisuke Kanemoto, Haruichi Kanaya, Ramesh K. Pokharel, Keiji Yoshida. 164-167 [doi]
- A low-power MICS fractional-N frequency synthesizer for implantable biomedical systemsKwan Wai Li, Ka Nang Leung. 168-171 [doi]
- An impedance measurement analog front end for wirelessly bioimplantable applicationsCihun-Siyong Alex Gong, Kai-Wen Yao, Muh-Tian Shiue, Yin Chang. 172-175 [doi]
- Biochemical sensor interface circuits with differential difference amplifierShin-Il Lim, In-Sub Choi, Hanho Lee. 176-179 [doi]
- A 12-GHz high output power amplifier using 0.18µm SiGe BiCMOS for low power applicationsBharatha Kumar Thangarasu, Kaixue Ma, Kiat Seng Yeo, Wei Meng Lim. 180-183 [doi]
- Recent progress in silicon-based millimeter-wave power amplifierJiang An Han, Zhi-Hui Kong, Kaixue Ma, Kiat Seng Yeo. 184-187 [doi]
- On-chip tunable low pass filter with improved stopband using new cross coupled topologyKaixue Ma, Shouxian Mou, Kiat Seng Yeo, Wei Meng Lim. 188-191 [doi]
- A V-band power amplifier with 11.6dB gain and 7.8% PAE in GaAs 0.15µm pHEMT process technologyMing-Wei Wu, Chien-Pai Wu, Yen-Chung Chiang. 192-195 [doi]
- An approach to all modes of nonlinear oscillations in three-phase circuits by computer algebra systemKohshi Okumura. 196-199 [doi]
- A search algorithm of bifurcation point in an impact oscillator with periodic thresholdGoki Ikeda, Hiroyuki Asahara, Kazuyuki Aihara, Takuji Kousaka. 200-203 [doi]
- Double-mode oscillation in chaotic circuits coupled by a time-varying resistorMasaaki Kojima, Yoko Uwate, Yoshifumi Nishio. 204-207 [doi]
- Stabilizing unstable periodic orbits in higher dimensional systems based on stability transformation methodTakumi Hasegawa, Tadashi Tsubone. 208-211 [doi]
- Design of monolithic silicon-based envelope-tracking power amplifiers for broadband wireless applicationsDonald Y. C. Lie, Yan Li, Ruili Wu, Weibo Hu, Jerry Lopez, Cliff Schecht, Yenting W. Liu. 212-215 [doi]
- Hardware complexities of low-complexity Chase Reed Solomon decoders and comparisonsHao Wang, Wei Zhang, Jing Wang, Zhe Jiang. 216-219 [doi]
- A comparative study of a low doppler shift in a carrier tracking loop for GPSSevket Cetinsel, Richard C. S. Morling, Izzet Kale. 220-223 [doi]
- Low-complexity lattice reduction architecture using interpolation-based QR decomposition for MIMO-OFDM systemsI.-Wen Liu, Chun-Fu Liao, Fang-Chun Lan, Yuan-Hao Huang. 224-227 [doi]
- Linear programmable gain amplifier using reconfiguration local-feedback transconductorsTzung-Je Lee, Wen-Je Lu, Wei-Chih Hsiao, Chua-Chin Wang. 228-231 [doi]
- A low power programmable band-pass filter with novel pseudo-resistor for portable biopotential acquisition systemShunli Ma, Changming Chen, Yiwen Zhang, Junyan Ren. 232-235 [doi]
- Implementation of a personal health monitoring system in cardiology applicationLiang-Hung Wang, Tsung-Yen Chen, Shuenn-Yuh Lee, Huan Chen 0002. 236-239 [doi]
- Automated malaria parasite detection in thin blood films: - A hybrid illumination and color constancy insensitive, morphological approachSaumya Kareem, Izzet Kale, Richard C. S. Morling. 240-243 [doi]
- A low power millimetre-wave VCO in 0.18 µm SiGe BiCMOS technologyQiong Zou, Kaixue Ma, Wanxin Ye, Kiat Seng Yeo. 244-247 [doi]
- Design of quarter-wavelength resonator filters with coupling controllable pathsFanyi Meng, Kaixue Ma, Shanshan Xu, Kiat Seng Yeo, Chirn Chye Boon, Wei Meng Lim, Manh Anh Do. 248-251 [doi]
- A 60GHz on-chip antenna in standard CMOS silicon TechnologyWanlan Yang, Kaixue Ma, Kiat Seng Yeo, Wei Meng Lim. 252-255 [doi]
- Low-power high-speed dual-modulus prescaler for Gb/s applicationsKeping Wang, Kaixue Ma, Kiat Seng Yeo. 256-259 [doi]
- 1MS/s low power successive approximations register ADC for 67-fJ/conversion-stepWen Cheng Lai, Jhin-Fang Huang, Wei-Jian Lin. 260-263 [doi]
- A pipelined SAR ADC with loading-separating technique in 90-nm CMOS technologySheng-Hsiung Lin, Jin-Fu Lin, Guan-Ying Huang, Soon-Jyh Chang. 264-267 [doi]
- A 10-bit SAR ADC with two redundant decisions and splitted-MSB-cap DAC arrayWen-Lan Wu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. 268-271 [doi]
- A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversionHoward Tang, Joshua Yung Lih Low, Jeremy Yung Shern Low, Liter Siek, Ching-Chuen Jong, Chip-Hong Chang. 272-275 [doi]
- Multiple-output neuron MOS current mirror with bias circuit suitable for Digital-to-Analog converterSatoshi Matsumoto, Sumio Fukai, Akio Shimizu, Yohei Ishikawa. 276-279 [doi]
- Design and application of wide-range variable fractional delay filterChien-Cheng Tseng, Su-Ling Lee. 280-283 [doi]
- Roundoff noise reduction in state-space digital filters using high-order error feedback and realizationTakao Hinamoto, Akimitsu Doi, Wu-Sheng Lu. 284-287 [doi]
- A design of a synthesis filter bank with fractional scalability factorsFumio Itami, Eiji Watanabe. 288-291 [doi]
- Weighted least squares design of wideband digital integrator using interlaced sampling methodChien-Cheng Tseng, Su-Ling Lee. 292-295 [doi]
- n+1} RNS scaler with dual scaling constantsJeremy Yung Shern Low, Thian Fatt Tay, Chip-Hong Chang. 296-299 [doi]
- A reconfigurable 16-channel HV stimulator ASIC for Spinal Cord Stimulation systemsChua-Chin Wang, Tzu-Chiao Sung, Yi-Hong Wu, Chia-Hao Hsu, Doron Shmilovitz. 300-303 [doi]
- DELTRON: Neuromorphic architectures for delay based learningShaista Hussain, Arindam Basu, Mark Wang, Tara Julia Hamilton. 304-307 [doi]
- Dynamical systems design of nonlinear oscillators using phase reduction approachKazuki Nakada, Keiji Miura, Tetsuya Asai, Hisa-Aki Tanaka. 308-311 [doi]
- Low-power circuit structures for chip-scale stimulating implantsTorsten Lehmann, Louis H. Jung, Yashodhan Moghe, Hosung Chun, Yuanyuan Yang, Asish Zac Alex. 312-315 [doi]
- A multi-rate SerDes transceiver for IEEE 1394b applicationsLongfei Wei, Jinyue Ji, Haiqi Liu, Qiang Li. 316-319 [doi]
- A reconfigurable aperture coupled microstrip patch antenna with beam steering capability on siliconS. Pradeep Reddy, Ashudeb Dutta, Shiv Govind Singh. 320-323 [doi]
- SOI vs. bulk for wireless applicationA. Owzar, Ertan Baykal, P. Felicio, T. Zheng, Ralph Stephan, Markus Helfenstein, Rolf Becker. 324-327 [doi]
- Design of a 843MHz 35µW SAW oscillator using device and circuit co-design techniqueYao Zhu, Yuanjin Zheng, Chee-Leong Wong, Minkyu Je, Khine Lynn, Piotr Kropelnicki, Julius Tsai Ming Lin. 328-331 [doi]
- Optimal design method for chip-area-efficient CMOS low-dropout regulatorSho Ikeda, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu. 332-335 [doi]
- Maximum Power Point Tracking (MPPT) via Weightless Swarm Algorithm (WSA) on cloudy daysT. O. Ting, Ka Lok Man, Sheng Uei Guan, J. K. Seon, T. T. Jeong, Prudence W. H. Wong. 336-339 [doi]
- A voltage equalizer using flyback converter with active clampTomoyuki Mizuno, Tomoshige Inoue, Keisuke Iwasawa, Hirotaka Koizumi. 340-343 [doi]
- Development of three-phase to single-phase matrix converter for improvement of three-phase voltage unbalance in distribution systemRyota Mizutani, Hirotaka Koizumi, Eiji Kamiya, Kentaro Hirose. 344-347 [doi]
- A synchronous buck-boost converter on a Silicon-On-Sapphire 0.5µm processLibin George, Torsten Lehmann, Tara Julia Hamilton. 348-351 [doi]
- Development of an artificial neural network system for sulphate-reducing bacteria detection by using model-based design techniqueEarn Tzeh Tan, Zaini Abdul Halim. 352-355 [doi]
- Improvement of learning performance of multi-layer perceptron by two different pulse glial networksChihiro Ikuta, Yoko Uwate, Yoshifumi Nishio, Guoan Yang. 356-359 [doi]
- Low complexity photo sensor dead pixel detection algorithmChien-Wei Chen, Chao-Yi Cho, Yi-Fa Sun, Tse Min Chen, Ching-Lung Su. 360-363 [doi]
- An OMNeT++ based Network-on-Chip simulator for embedded systemsAhmad Mansour, Jürgen Götze. 364-367 [doi]
- Cache utilization-aware scheduling for multicore processorsEdward T.-H. Chu, Wen-wei Lu. 368-371 [doi]
- A design for testability of non-volatile memory reliability test for automotive embedded processorChung Chuang, Chun-Yen Wu, Chi-Chun Hsu, Li-Ren Huang, Wei-Min Cheng, Wen-Dar Hsieh. 372-375 [doi]
- Intelligent applications design in automotive infortainment systemsHao-Chan Ting, Shih-Sheng Chen, Kevin Labille, Yu-Wen Tsai, Yen-Hsiang Chen, Shanq-Jang Ruan. 376-379 [doi]
- Buffer size minimization method considering mix-clock domains and discontinuous data accessLih-Yih Chiou, Liang-Ying Lu, Bo-Chi Lin, Alan P. Su. 380-383 [doi]
- A low-voltage, low-power subthreshold CMOS voltage reference without resistors and high threshold voltage devicesJun Zhang, Yunling Luo, Qiaobo Wang, Jingjing Li, Zhuqian Gong, Hong-Zhou Tan, Yunliang Long. 384-387 [doi]
- Intrinsic capacitance extraction and estimation for system-on-chip power delivery developmentLi Chuang Quek, Bok Eng Cheah, Wai Ling Lee, Weng Chong Sam. 388-391 [doi]
- Design and FPGA implementation of a FMCW radar baseband processorYin-Tsung Hwang, Yi-Chih Chen, Cheng-Ru Hong, Yu-Ting Pei, Chi-Ho Chang, Jui-Chi Huang. 392-395 [doi]
- A modularized 3D heterogeneous system integration platformChun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chih-Hsing Lin, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chiu, Nien-Hsiang Chang, Wen-Ching Chen. 396-399 [doi]
- A novel hardware-oriented decoding algorithm for non-binary LDPC codesHong Yang, Qing-qing Yang, Yuanwei Fang, Xiaofang Zhou, Gerald E. Sobelman. 400-403 [doi]
- A hybrid NoC architecture utilizing packet transmission priority control methodSeungju Lee, Nozomu Togawa, Yusuke Sekihara, Takashi Aoki, Akira Onozawa. 404-407 [doi]
- Asynchronous AHB bus interface designs in a multiple-clock-domain graphics systemShen-Fu Hsiao, Chi-Guang Lin, Po-Han Wu, Chia-Sheng Wen. 408-411 [doi]
- A post-processing scan-chain watermarking scheme for VLSI intellectual property protectionAijiao Cui, Chip-Hong Chang. 412-415 [doi]
- A robust multithreaded HDL/ESL simulator for deep submicron integrated circuit designsTerence Chan. 416-419 [doi]
- A 10/30MHz PWM buck converter with an accuracy-improved ramp generatorYonggen Liu, Chenchang Zhan, Lin Cheng, Wing-Hung Ki. 420-423 [doi]
- An analysis of output ripples for PMOS charge pumps and design methodologyBoy-Yiing Jaw, Hongchin Lin. 424-427 [doi]
- Monolithic quasi-sliding-mode controller for SIDO buck converter in PCCMQing Liu, Xiaobo Wu, Menglian Zhao, Mingyang Chen, Xiaoting Shen. 428-431 [doi]
- 30-300mV input, ultra-low power, self-startup DC-DC boost converter for energy harvesting systemQing Liu, Xiaobo Wu, Menglian Zhao, Lu Wang, Xiaoting Shen. 432-435 [doi]
- Single inductor dual output DC-DC converter design with exclusive controlYasunori Kobori, Qiulin Zhu, Murong Li, Feng Zhao, Zachary Nosker, Shu Wu, Shaiful N. Mohyar, Masanori Onozawa, Haruo Kobayashi, Nobukazu Takai, Kiichi Niitsu, Takahiro Odaguchi, Isao Nakanishi, Kenji Nemoto, Jun-ichi Matsuda, Asahi Kasei. 436-439 [doi]
- A SIMD-accelerated software rendering pipeline for 3D graphics processingEric Shianda Yu, Chung-Ho Chen. 440-443 [doi]
- A performance monitoring tool suite for 3D graphics SoC applicationYi-Hao Chang, Chi-Tsai Yeh, Ing-Jer Huang, Shau-Yin Tseng. 444-447 [doi]
- Overview and comparison of OpenCL and CUDA technology for GPGPUChing-Lung Su, Po-Yu Chen, Chun-Chieh Lan, Lung-Sheng Huang, Kuo-Hsuan Wu. 448-451 [doi]
- Immerse™: An alternative approach to 3D graphics performanceParkson Wong, Kuo-Tseng Tseng, Eric Lee, Harn Tarn. 452-455 [doi]
- Real-time correction of wide-angle lens distortion for images with GPU computingTung-Ying Lee, Chen-Hao Wei, Shang-Hong Lai, Ruen-Rone Lee. 456-459 [doi]
- Electrostatic discharge (ESD) protection of RF integrated circuitsJuin J. Liou, Chang Jiang, Feng Chia. 460-462 [doi]
- A comprehensive comparative analysis of FinFET and Trigate device, SRAM and logic circuitsChia-Hao Pao, Ming-Long Fan, Ming-Fu Tsai, Yin-Nien Chen, Vita Pi-Ho Hu, Pin Su, Ching-Te Chuang. 463-466 [doi]
- Design of ESD protection for RF CMOS power amplifier with inductor in matching networkShiang-Yu Tsai, Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker. 467-470 [doi]
- Variation tolerant CLSAs for nanoscale Bulk-CMOS and FinFET SRAMMing-Fu Tsai, Jen-Huan Tsai, Ming-Long Fan, Pin Su, Ching-Te Chuang. 471-474 [doi]
- A layered QC-LDPC decoder architecture for high speed communication systemChiu-Wing Sham, Xu Chen, Wai Man Tam, Yue Zhao, Francis Chung-Ming Lau. 475-478 [doi]
- An efficient majority-logic based message-passing algorithm for non-binary LDPC decodingYichao Lu, Nanfan Qiu, Zhixiang Chen, Satoshi Goto. 479-482 [doi]
- A variable-gain single-bit ultra-wideband quantizer for baseband receiver front-endTuan Anh Vu, Shanthi Sudalaiyandi, Håkon A. Hjortland, Øivind Næss, Tor Sverre Lande, Svein-Erik Hamran. 483-486 [doi]
- Continuous-time symbol detector for IR-UWB rake receiver in 90 nm CMOSShanthi Sudalaiyandi, Tuan Anh Vu, Håkon A. Hjortland, Øivind Næss, Tor Sverre Lande. 487-490 [doi]
- Dynamic binary neural networks and storage of control signals for switching circuitsJungo Moriyasu, Ryota Kouzuki, Toshimichi Saito. 491-494 [doi]
- Cellular neural networks with effect from friend having most different values and its friendsYoshihiro Kato, Yoko Uwate, Yoshifumi Nishio. 495-498 [doi]
- Investigation of synchronization for social network with local bridge via coupled Rulkov mapsTomoya Shima, Yoko Uwate, Thomas Ott, Yoshifumi Nishio. 499-502 [doi]
- Application of multi-armed bandit algorithms for channel sensing in cognitive radioTomohiro Kato, Nur Atiqah Farahin Kamarul Zaman, Mikio Hasegawa. 503-506 [doi]
- A lower error antilogarithmic converter using novel four-region piecewise-linear approximationChao-Tsung Kuo, Tso-Bing Juang. 507-510 [doi]
- Low-cost designs of rectangular to polar coordinate converters for digital communicationShen-Fu Hsiao, Chia-Sheng Wen, Cheng-Han Lee, Andrew Lee. 511-514 [doi]
- n±1) multipliers based on modified booth encodingTso-Bing Juang, Jian-Hao Huang. 515-518 [doi]
- Low-complexity rotators for the FFT using base-3 signed stagesPetter Kallstrom, Mario Garrido, Oscar Gustafsson. 519-522 [doi]
- Robustness file copy up into cloud storage serviceY. H. Chen, R. S. Huang, S. L. Jhuang, W. Tian. 523-526 [doi]
- Current reference with temperature compensation for low power applicationsJiaxin Liu, Yao Wang, Liangbo Xie, Guangjun Wen. 527-530 [doi]
- Digitally-controlled Gm-C bandpass filterGuanglei Jin, Hao Chen, Chuan Gao, Yunpeng Zhang, Haruo Kobayashi, Nobukazu Takai, Kiichi Niitsu, Khayrollah Hadidi. 531-534 [doi]
- High linear transconductor for multiband CMOS receiverKo-Chi Kuo, Shan-Yu Chen, Shih-Min Tseng. 535-538 [doi]
- 0.6 - 3.6 GHz wideband operation with high phase resolution On-Chip Network AnalyzerAbul Hasan Johari, Hiroki Ishikuro. 539-542 [doi]
- Face detection architecture design using hybrid skin color detection and cascade of classifiersDer-Wei Yang, Chun-Wei Chen, Che-Hao Chang, Yun-Chen Chang, Ming-Der Shieh, Jonas Wang, Chia-Cheng Lo. 543-546 [doi]
- An optimization scheme for quadtree-structured prediction and residual encoding in HEVCGuifen Tian, Satoshi Goto. 547-550 [doi]
- Video stabilization with local rotational motion modelChih-Lun Fang, Tsung-Han Tsai, Chih-Hao Chang. 551-554 [doi]
- A memory-efficient architecture for intra predictor and de-blocking filter in video coding systemChia-Lin Liu, Chang-Hung Tsai, Hsiuan-Ting Wang, Yao Li, Chen-Yi Lee. 555-558 [doi]
- Redesign modern IP router chips in a 3D technologyBo Yu, Suoming Pu. 559-562 [doi]
- Estimation of oscillation parameters for power gridsMatthias Lechtenberg, Kay Gorner, Jürgen Götze, Christian Rehtanz. 563-566 [doi]
- Intelligent home management in the smart gridsMeng-Kang Chiang, Katherine Shu-Min Li. 567-570 [doi]
- Power system stability enhancement with an integrated offshore wind farm and marine-current farm using a STATCOMDinh-Nhon Truong, Li Wang 0019. 571-574 [doi]
- Stability analysis of power transmission of offshore wind farms fed to onshore power grids using a multi-terminal VSC-HVDC systemMi Sa-Nguyen Thi, Li Wang 0019. 575-578 [doi]
- A fast correlation based background digital calibration for pipelined ADCsChuan-Ping Yan, Guang-Jun Li, Qiang Li. 579-582 [doi]
- Robust farfield wideband beamformer design using worst-case performance optimizationHui Wang, Huawei Chen, Yu Bao, Linjian Li. 583-586 [doi]
- A range of allowable number of input bits for tone free delta-sigma operation in digital MASH Delta-Sigma Fractional-N frequency synthesizersAli Telli, Izzet Kale. 587-590 [doi]
- Real time accelerometer-based gait recognition using adaptive windowed wavelet transformsJian-Hua Wang, Jian-Jiun Ding, Yu Chen, Hsin-Hui Chen. 591-594 [doi]
- A low-complexity high-performance wear-leveling algorithm for flash memory system designChing-Che Chung, Ning-Mi Hsueh. 595-598 [doi]
- Scan-based attack against DES cryptosystems using scan signaturesHirokazu Kodera, Masao Yanagisawa, Nozomu Togawa. 599-602 [doi]
- Weighted adders with selector logics for super-resolution and its FPGA-based evaluationHiromine Yoshihara, Masao Yanagisawa, Nozomu Togawa. 603-606 [doi]
- State dependent scan flip-flop with key-based configuration against scan-based side channel attack on RSA circuitYuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa. 607-610 [doi]
- A reconfigurable ASIP-based approach for high performance image signal processingMochamad Asri, Hsuanchun Liao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda. 611-614 [doi]
- Utilizing register transfer level false paths for circuit optimization with a logic synthesis toolTsuyoshi Iwagaki, Takehiro Mikami, Hideyuki Ichihara, Tomoo Inoue. 615-618 [doi]
- Memory binding and layer assignment for high-level synthesis of 3D ICsYi-Chun Yen, Jhih-Kai Yang, Wei-Kai Cheng. 619-622 [doi]
- De Bruijn graph-based communication modeling for fault tolerance in smart gridsBo-Chuan Cheng, Katherine Shu-Min Li, Sying-Jyan Wang. 623-626 [doi]
- Simultaneous wafer bonding type selection and layer assignment for TSV count minimizationChun-Hua Cheng, Wei-Shuo Tzeng, Shih-Hsu Huang. 627-630 [doi]
- Wirelength driven I/O buffer placement for flip-chip with timing-constrainedNan Liu, Shiyu Liu, Takeshi Yoshimura. 631-634 [doi]
- Synchronization phenomena of picewise constant oscillators coupled by hysteresis elementKeisuke Suzuki, Tadashi Tsubone. 635-638 [doi]
- Instantaneous electric power's behavior of phase waves and phase-inversion waves on coupled van der Pol oscillators as a ladderKosuke Niimi, Seiko Kunihiro, Masayuki Yamauchi. 639-642 [doi]
- Chaos propagation in a ring of coupled circuits generating chaotic and three-periodic attractorsYoko Uwate, Yoshifumi Nishio. 643-646 [doi]
- Clustering phenomena considering the density of coupled chaotic circuits networksYuji Takamaru, Yoko Uwate, Thomas Ott, Yoshifumi Nishio. 647-650 [doi]
- A multimedia game development system with an intelligent mobile and embedded platformKuang-Hao Lin, Tai-Hsuan Yang, Ren-Hao Wu, Hou-Ming Chen, Jan-Dong Tseng. 651-654 [doi]
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- Affective pattern analysis of image in frequency domain using the Hilbert-Huang TransformPo-Ming Lee, Wei-Hsuan Tsui, Yun Teng, Tzu-Chien Hsiao. 667-670 [doi]
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