Nazanin Mansouri - researchr alias

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Viewing Publication 1 - 19 from 19

2009

Power Optimization With Power Islands SynthesisDeniz Dal, Nazanin Mansouri. tcad, 28(7):1025-1037, 2009. [doi]

2008

Determining the Optimal Number of Islands in Power Islands SynthesisDeniz Dal, Nazanin Mansouri. isvlsi 2008: 22-27 [doi]

Automated formal verification of scheduling with speculative code motionsYoungsik Kim, Nazanin Mansouri. glvlsi 2008: 95-100 [doi]

2007

A high-level register optimization technique for minimizing leakage and dynamic powerDeniz Dal, Nazanin Mansouri. glvlsi 2007: 517-520 [doi]

2006

Power Islands: A High-Level Technique for Counteracting Leakage in Deep Sub-MicronDeniz Dal, Adrian Nunez, Nazanin Mansouri. isqed 2006: 165-170 [doi]

Pre-Layout Estimation of Interconnect Lengths for Digital Integrated CircuitsShweta Shah, Nazanin Mansouri, Adrián Núñez-Aldana. conielecomp 2006: 38 [doi]

An ILP Formulation for Task Scheduling on Heterogeneous Chip MultiprocessorsSuleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Ozcan Ozturk. iscis 2006: 267-276 [doi]

2005

2004

Exploiting OVL standard assertions in a theorem-proving-based verification environmentAnli He, Parija Sule, Youngsik Kim, Nazanin Mansouri. iastedCCS 2004: 249-254

Enhancing scheduling solutions through ant colony optimizationShekhar Kopuri, Nazanin Mansouri. iscas 2004: 257-260

2003

Derving Intermediary RTLs for Verification of Pipelined Synthesized DesignsSuleyman Tosun, Hakduran Koc, Nazanin Mansouri. vlsi 2003: 382

2000

Automated Correctness Condition Generation for Formal Verification of Synthesized RTL DesignsNazanin Mansouri, Ranga Vemuri. fmsd, 16(1):59-91, 2000.

1999

Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL DesignsNazanin Mansouri, Ranga Vemuri. date 1999: 223 [doi]

1998

A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis ToolNazanin Mansouri, Ranga Vemuri. FMCAD 1998: 204-221 [doi]

Automatic data path abstraction for verification of large scale designsViresh Paruthi, Nazanin Mansouri, Ranga Vemuri. In ICCD. 1998: 192-194 [doi]

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