Raymond R. Horton - researchr alias

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Viewing Publication 1 - 8 from 8

2008

3D chip stacking with C4 technologyBing Dang, Steven L. Wright, Paul S. Andry, Edmund J. Sprogis, Cornelia K. Tsang, M. John Interrante, Bucknell C. Webb, Robert J. Polastre, Raymond R. Horton, Chirag S. Patel, Arun Sharma, J. Zheng, Katsuyuki Sakuma, John U. Knickerbocker. ibmrd, 52(6):599-609, 2008. [doi]

Three-dimensional silicon integrationJohn U. Knickerbocker, Paul S. Andry, Bing Dang, Raymond R. Horton, Mario J. Interrante, Chirag S. Patel, Robert J. Polastre, Katsuyuki Sakuma, Ranjani Sirdeshmukh, Edmund J. Sprogis, Sri M. Sri-Jayantha, Antonio M. Stephens, Anna W. Topol, Cornelia K. Tsang, Bucknell C. Webb, Steven L. Wright. ibmrd, 52(6):553-569, 2008. [doi]

3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnectionsKatsuyuki Sakuma, Paul S. Andry, Cornelia K. Tsang, Steven L. Wright, Bing Dang, Chirag S. Patel, Bucknell C. Webb, J. Maria, Edmund J. Sprogis, S. K. Kang, Robert J. Polastre, Raymond R. Horton, John U. Knickerbocker. ibmrd, 52(6):611-622, 2008. [doi]

2006

3-D Silicon Integration and Silicon Packaging Technology Using Silicon Through-ViasJohn U. Knickerbocker, Chirag S. Patel, Paul S. Andry, Cornelia K. Tsang, L. Paivikki Buchwalter, Edmund J. Sprogis, Hua Gan, Raymond R. Horton, Robert J. Polastre, Steven L. Wright, John M. Cotte. jssc, 41(8):1718-1725, 2006. [doi]

2005

Three dimensional silicon integration using fine pitch interconnection, silicon processing and silicon carrier packaging technologyJohn U. Knickerbocker, Chirag S. Patel, Paul S. Andry, Cornelia K. Tsang, L. Paivikki Buchwalter, Edmund J. Sprogis, Hua Gan, Raymond R. Horton, Robert J. Polastre, Steven L. Wright, Christian D. Schuster, Christian W. Baks, Fuad E. Doany, Joanna Rosner, Steven Cordes. cicc 2005: 659-662 [doi]

1998

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