Paul S. Andry - researchr alias

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Viewing Publication 1 - 9 from 9

2015

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductorsKevin Tien, Noah Sturcken, Naigang Wang, Jae-woong Nah, Bing Dang, Eugene J. O'Sullivan, Paul S. Andry, Michele Petracca, Luca P. Carloni, William J. Gallagher, Kenneth L. Shepard. vlsic 2015: 192 [doi]

2012

An 8x 10-Gb/s Source-Synchronous I/O System Based on High-Density Silicon Carrier InterconnectsTimothy O. Dickson, Yong Liu, Sergey V. Rylov, Bing Dang, Cornelia K. Tsang, Paul S. Andry, John F. Bulzacchelli, Herschel A. Ainspan, Xiaoxiong Gu, Lavanya Turlapati, Michael P. Beakes, Benjamin D. Parker, John U. Knickerbocker, Daniel J. Friedman. jssc, 47(4):884-896, 2012. [doi]

2008

Fabrication and characterization of robust through-silicon vias for silicon-carrier applicationsPaul S. Andry, Cornelia K. Tsang, Bucknell C. Webb, Edmund J. Sprogis, Steven L. Wright, Bing Dang, Dennis G. Manzer. ibmrd, 52(6):571-581, 2008. [doi]

3D chip stacking with C4 technologyBing Dang, Steven L. Wright, Paul S. Andry, Edmund J. Sprogis, Cornelia K. Tsang, M. John Interrante, Bucknell C. Webb, Robert J. Polastre, Raymond R. Horton, Chirag S. Patel, Arun Sharma, J. Zheng, Katsuyuki Sakuma, John U. Knickerbocker. ibmrd, 52(6):599-609, 2008. [doi]

Three-dimensional silicon integrationJohn U. Knickerbocker, Paul S. Andry, Bing Dang, Raymond R. Horton, Mario J. Interrante, Chirag S. Patel, Robert J. Polastre, Katsuyuki Sakuma, Ranjani Sirdeshmukh, Edmund J. Sprogis, Sri M. Sri-Jayantha, Antonio M. Stephens, Anna W. Topol, Cornelia K. Tsang, Bucknell C. Webb, Steven L. Wright. ibmrd, 52(6):553-569, 2008. [doi]

3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnectionsKatsuyuki Sakuma, Paul S. Andry, Cornelia K. Tsang, Steven L. Wright, Bing Dang, Chirag S. Patel, Bucknell C. Webb, J. Maria, Edmund J. Sprogis, S. K. Kang, Robert J. Polastre, Raymond R. Horton, John U. Knickerbocker. ibmrd, 52(6):611-622, 2008. [doi]

2006

3-D Silicon Integration and Silicon Packaging Technology Using Silicon Through-ViasJohn U. Knickerbocker, Chirag S. Patel, Paul S. Andry, Cornelia K. Tsang, L. Paivikki Buchwalter, Edmund J. Sprogis, Hua Gan, Raymond R. Horton, Robert J. Polastre, Steven L. Wright, John M. Cotte. jssc, 41(8):1718-1725, 2006. [doi]

2005

Three dimensional silicon integration using fine pitch interconnection, silicon processing and silicon carrier packaging technologyJohn U. Knickerbocker, Chirag S. Patel, Paul S. Andry, Cornelia K. Tsang, L. Paivikki Buchwalter, Edmund J. Sprogis, Hua Gan, Raymond R. Horton, Robert J. Polastre, Steven L. Wright, Christian D. Schuster, Christian W. Baks, Fuad E. Doany, Joanna Rosner, Steven Cordes. cicc 2005: 659-662 [doi]

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