Srinivasa Vemuru - researchr alias

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Viewing Publication 1 - 22 from 22

2015

Comparison of power system simulation tools with load flow study casesYogesh Kumar, Vijay K. Devabhaktuni, Srinivasa Vemuru. eit 2015: 290-294 [doi]

2014

Majority logic gate synthesis approaches for post-CMOS logic circuits: A reviewSrinivasa Vemuru, Peng Wang, Mohammed Niamat. eit 2014: 284-289 [doi]

FPGA interconnect modeling for lifetime failure detectionKavya Vittala, Srinivasa Vemuru, Mohammed Y. Niamat. eit 2014: 280-283 [doi]

Majority Logic Synthesis Based on Nauty AlgorithmPeng Wang, Mohammed Y. Niamat, Srinivasa Vemuru. In Neal G. Anderson, Sanjukta Bhanja, editors, Field-Coupled Nanocomputing - Paradigms, Progress, and Perspectives. Volume 8280 of Lecture Notes in Computer Science, pages 111-132, Springer, 2014. [doi]

2013

Small signal modeling of diode in a parallel module subjected to partial shadingSanthoshi Snigdha Buddala, Srinivasa Vemuru, Vijay Devabhaktuni. eit 2013: 1-5 [doi]

Comparison of multilevel DC-DC converter topologiesSandeep Patil, Srinivasa Vemuru, Vijay Devabhaktuni, Khalid Al-Olimat. eit 2013: 1-5 [doi]

A spiral learning approach to hardware description languagesSrinivasa Vemuru, Sami Khorbotly, Firas Hassan. iscas 2013: 2759-2762 [doi]

2012

Efficient AFT implementation in FPGAs to detect potential electromigration failuresSaiDeepa Rayaprolu, Srinivasa Vemuru, Mohammed Y. Niamat. eit 2012: 1-6 [doi]

Modeling impact of bypass diodes on photovoltaic cell performance under partial shadingSrinivasa Vemuru, Priyanka Singh, Mohammed Y. Niamat. eit 2012: 1-5 [doi]

2011

Modeling of Random Shading Effects in Solar CellsPriyanka Singh, Mohammed Y. Niamat, Srinivasa Vemuru. icseng 2011: 86-90 [doi]

2010

Quantum-Dot Cellular Automata Implementation of FPGA Configurable Logic BlocksMohammed Y. Niamat, Tejas Raviraj, Sowmya Panuganti, Srinivasa Vemuru. cdes 2010: 182-188

Analysis and test of electromigration failures in FPGAsBarath Vasudevan, Mohammed Y. Niamat, Mansoor Alam, Srinivasa Vemuru. iscas 2010: 3905-3908 [doi]

Built-In Self-Test Circuit Optimization for Embedded CoresSrinivasa Vemuru, Sravani Kristem, Mohammed Y. Niamat. cdes 2010: 88-92

2008

Subbus Control Line Impact on Effectiveness of Bus Encoding SchemesSrinivasa Vemuru, Ahmed Elkammar, Norman Scheinberg. cdes 2008: 201-206

2007

PrefaceLaurence Tianruo Yang, José G. Delgado-Frias, Yiming Li, Mohammed Y. Niamat, Dimitrios Soudris, Srinivasa Vemuru. integration, 40(2):61, 2007. [doi]

2006

Bus Encoding Scheme To Eliminate Unwanted Signal TransitionsAhmed Elkammar, Norman Scheinberg, Srinivasa Vemuru. delta 2006: 472-480 [doi]

2005

BIST for Embedded SRAMs in System on ChipsMohammed Y. Niamat, Aditya Ravinuthala, Mohsin M. Jamali, Srinivasa Vemuru. csreaESA 2005: 74-80

2004

A Bus Encoding Scheme to Reduce Power Consuming Signal TransitionsAhmed Elkammar, Srinivasa Vemuru, Norman Scheinberg. csreaESA 2004: 12-17

2003

Channel Routing with Crosstalk ConsiderationNathaniel Bird, Ethan S. Miller, Paul J. Pfeiffer, Srinivasa Vemuru. vlsi 2003: 119-124

Simultaneous Switching Noise Estimation Including the Effects of the Driving Transistor Gate-Source CapacitanceSrinivasa Vemuru. vlsi 2003: 373-378

1994

Scaling of serially-connected MOSFET chainsSrinivasa Vemuru. glvlsi 1994: 200-203 [doi]

1993

Short-circuit Power Dissipation Formulae for CMOS GatesSrinivasa Vemuru, Norman Scheinberg, Edwyn Smith. iscas 1993: 1333-1336

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