Winser E. Alexander - researchr alias

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Viewing Publication 1 - 34 from 34

2015

Acceleration of Synthetic Aperture Radar (SAR) Algorithms using Field Programmable Gate Arrays (FPGAs) (Abstract Only)Youngsoo Kim, William Harding, Clay S. Gloster Jr., Winser E. Alexander. fpga 2015: 271 [doi]

2012

A Dataflow Framework for DSP Algorithm RefinementYoungsoo Kim, Winser E. Alexander, William W. Edmonson. isvlsi 2012: 1-2 [doi]

2011

Block Floating Point Interval ALU for Digital Signal ProcessingSandeep Hattangady, William W. Edmonson, Winser E. Alexander. rc, 15(2):69-80, 2011. [doi]

2008

An Implementation of a Biological Neural Model using Analog-Digital Integrated CircuitsGary Charles, Christal Gordon, Winser E. Alexander. bmas 2008: 78-83 [doi]

2007

The Use of Interval Methods in Signal Processing and Control for Systems BiologyWilliam W. Edmonson, Senanu Ocloo, Cranos Williams, Winser E. Alexander. foci 2007: 136-142 [doi]

2006

Pipelined ALU for Signal Processing to Implement Interval ArithmeticRuchir Gupte, William W. Edmonson, Senanu Ocloo, Winser E. Alexander. sips 2006: 95-100 [doi]

Free Energy Analysis on the Coding Region of the Individual Genes of Saccharomyces cerevisiaeChuanhua Xing, Donald L. Bitzer, Winser E. Alexander, Anne-Marie Stomp, Mladen A. Vouk. embc 2006: 4225-4228 [doi]

2004

Medical image compression using post-segmentation approachSung H. Yoon, Ji H. Lee, Jung H. Kim, Winser E. Alexander. icassp 2004: 609-612 [doi]

2003

Dual clock rate block data parallel architectureAn-Te Deng, Winser E. Alexander. iscas 2003: 532-535 [doi]

2002

Region-based scalable coding for video communicationsJi H. Lee, Sung H. Yoon, Winser E. Alexander. vcip 2002: 363-373

2001

Scalable image coding for interactive image communication over networksSung H. Yoon, Ji H. Lee, Winser E. Alexander. vcip 2000: 553-561

2000

Parallel image processin gwith the block data paralel architectureWinser E. Alexander, Douglas S. Reeves, Clay S. Gloster Jr.. ibmrd, 44(5):681-702, 2000. [doi]

1998

A mean field annealing approach to robust corner detectionKwanghoon Sohn, Jung H. Kim, Winser E. Alexander. tsmc, 28(1):82-90, 1998.

An optimum solution for scale-invariant object recognition based on the multiresolution approximationSung H. Yoon, Jung H. Kim, Winser E. Alexander, Seong M. Park, Kwang H. Sohn. PR, 31(7):889-908, 1998. [doi]

1996

Parallel image processing with the block data parallel architectureWinser E. Alexander, Douglas S. Reeves, Clay S. Gloster Jr.. pieee, 84(7):947-968, 1996. [doi]

Real-Time Implementation of the Kalman Filter Using the Block Data Parallel ArchitectureSonetra Howard, Winser E. Alexander. pdpta 1996: 100-108

Matrix Inversion on a Scalable Distributed Memory Parallel ArchitecturVincent C. Wilburn, Sonetra Howard, Winser E. Alexander. pdpta 1996: 945-948

1994

A Programmable Simulator for Analyzing the Block Data Flow ArchitectureSean Alexandre, Winser E. Alexander, Douglas S. Reeves. mascots 1994: 399-400

Block Data Processing Using Commercial ProcessorsKenneth N. Ellis, Winser E. Alexander. icpp 1994: 232-235

A Constrained Regularization Approach to Robust Corner DetectionKwanghoon Sohn, Winser E. Alexander, Jung H. Kim, Wesley E. Snyder. tsmc, 24(5):820-828, 1994. [doi]

1992

1991

Sampling error analysis in perfect reconstruction transmultiplexersHatice Örün Öztürk, Winser E. Alexander. icassp 1991: 1909-1912 [doi]

1990

Mean square error analysis for the fast LMS-sine algorithmM. A. Khasawneh, Winser E. Alexander. icassp 1990: 1257-1260 [doi]

1989

Multiprocessor implementation of 2-D denominator-separable digital filters for real-time processingMohamed-Yahia Dabbagh, Winser E. Alexander. tsp, 37(6):872-881, 1989. [doi]

1988

Boundary value transient suppression for N-D digital systemsWinser E. Alexander, William W. Edmonson. icassp 1988: 840-843 [doi]

Stability analysis of the fast RLS adaptation algorithmDaehoon Kim, Winser E. Alexander. icassp 1988: 1361-1364 [doi]

A novel VLSI architecture for the real-time implementation of 2-D signal processing systemsSeong-Mo Park, Winser E. Alexander, Jung H. Kim, William E. Batchelor, William T. Krakow. iccd 1988: 582-585 [doi]

1987

Derivation and stability analysis of multidimensional IIR block digital filtersChwen-Jye Ju, Winser E. Alexander. icassp 1987: 1673-1676 [doi]

A Multiprocessor Architecture for Two-Dimensional Digital FiltersJung H. Kim, Winser E. Alexander. TC, 36(7):876-884, 1987.

1984

B-HIVE: a heterogeneous, interconnected, versatile and expandable multicomputer systemDharma P. Agrawal, Winser E. Alexander. sigarch, 12(2):7-13, 1984. [doi]

Initial condition transient suppression for two dimensional recursive digital filtersWinser E. Alexander. icassp 1984: 148-151 [doi]

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