Yasunao Katayama - researchr alias

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Viewing Publication 1 - 34 from 34

2020

Spatially Arranged Sparse Recurrent Neural Networks for Energy Efficient Associative MemoryGouhei Tanaka, Ryosho Nakane, Tomoya Takeuchi, Toshiyuki Yamane, Daiju Nakano, Yasunao Katayama, Akira Hirose. tnn, 31(1):24-38, 2020. [doi]

2019

Channel Model for Spiking Neural Networks Inspired by Impulse Radio MIMO TransmissionYasunao Katayama. globecom 2019: 1-6 [doi]

2017

Brain-Inspired Memory Architecture for Sparse Nonlocal and Unstructured WorkloadsYasunao Katayama. cf 2017: 291-294 [doi]

2015

2014

2013

Software-defined massive multicore networking via freespace optical interconnectYasunao Katayama, Atsuya Okazaki, Nobuyuki Ohba. cf 2013: 27 [doi]

2012

2011

2008

Multi-Gbps wireless systems over 60-GHz SiGe radio link with BW-efficient noncoherent detectionsYasunao Katayama, Daiju Nakano, Alberto Valdes-Garcia, Troy Beukema, Scott Reynolds. icmcs 2008: 513-516 [doi]

2007

2-Gbps Uncompressed HDTV Transmission over 60-GHz SiGe Radio LinkYasunao Katayama, Chuck Haymes, Daiju Nakano, Troy J. Beukema, Brian A. Floyd, Scott K. Reynolds, Ullrich R. Pfeiffer, Brian P. Gaucher, Kai Schleupen. ccnc 2007: 12-16 [doi]

2006

Multiple-Packet Recovery Technique using Partially-Overlapped Block CodesYasunao Katayama, Daiju Nakano. isit 2006: 1978-1982 [doi]

2003

An ultra-fast Reed-Solomon decoder soft-IP with 8-error correcting capabilityToshiyuki Yamane, Yasunao Katayama. icassp 2003: 297-300 [doi]

An ultra-fast Reed-Solomon decoder soft-IP with 8-error correcting capabilityToshiyuki Yamane, Yasunao Katayama. icmcs 2004: 445-448 [doi]

Bit error rate analysis on iterative two-stage decoding of two dimensional codes by importance samplingToshiyuki Yamane, Yasunao Katayama. icc 2003: 3140-3144 [doi]

2001

Towards Efficient Verification of Arithmetic Algorithms over Galois Fields GF(2:::m:::)Sumio Morioka, Yasunao Katayama, Toshiyuki Yamane. cav 2001: 465-477 [doi]

2000

Efficient Error Correction Code Configurations for Quasi-Nonvolatile Data Retention by DRAMsYasunao Katayama, Yasushi Negishi, Sumio Morioka. dft 2000: 201 [doi]

One-Shot Reed-Solomon Decoding for High-Performance Dependable SystemsYasunao Katayama, Sumio Morioka. dsn 2000: 390 [doi]

1999

Fault-Tolerant Refresh Power Reduction of DRAMs for Quasi-Nonvolatile Data RetentionYasunao Katayama, Eric J. Stuckey, Sumio Morioka, Zhao Wu. dft 1999: 311-318 [doi]

Design Methodology for a One-Shot Reed-Solomon Encoder and DecoderSumio Morioka, Yasunao Katayama. iccd 1999: 60-67 [doi]

1997

Trends in semiconductor memoriesYasunao Katayama. micro, 17(6):10-17, 1997. [doi]

1992

1989

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