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Viewing Publication 1 - 100 from 1040

2025

Invited: The Future of Functional ECO Automation and Logical Equivalence Checking for Advanced Digital Design FlowsZhuo Li 0001, David Stratman. ispd 2025: 91-92 [doi]

Invited: Physical Design for Advanced 3D ICs: Challenges and SolutionsYuxuan Zhao 0001, Lancheng Zou, Bei Yu 0001. ispd 2025: 209-216 [doi]

HeLO: A Heterogeneous Logic Optimization Framework by Hierarchical Clustering and Graph LearningYuan Pu 0001, Fangzhou Liu, Zhuolun He, Keren Zhu 0001, Rongliang Fu, Ziyi Wang, Tsung-Yi Ho, Bei Yu 0001. ispd 2025: 116-124 [doi]

Invited: Next-Generation Power Integrity Concepts and Applications for Physical DesignEmrah Acar. ispd 2025: 251 [doi]

GOALPlace: Begin with the End in MindAnthony Agnesina, Rongjian Liang, Geraldo Pradipta, Anand Rajaram, Haoxing Ren. ispd 2025: 2-10 [doi]

Invited: How Automotive Functional Safety is Disrupting Digital ImplementationChuck J. Alpert, Vitali Karasenko, Connie O'Shea. ispd 2025: 111-115 [doi]

DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous AgentChen-Chia Chang, Chia-Tung Ho, Yaguang Li, Yiran Chen 0001, Haoxing Ren. ispd 2025: 143-151 [doi]

Invited: Scaling Standard Cell Layout Using Track Height Compression and Design Technology Co-optimizationChung-Kuan Cheng, Byeonggon Kang, Bill Lin 0001, Yucheng Wang. ispd 2025: 11-19 [doi]

Invited: Toward an ML EDA Commons: Establishing Standards, Accessibility, and Reproducibility in ML-driven EDA ResearchVidya A. Chhabria, Jiang Hu, Andrew B. Kahng, Sachin S. Sapatnekar. ispd 2025: 93-101 [doi]

Invited: Coping with InterconnectsJason Cong. ispd 2025: 222-230 [doi]

Invited: Automatic Die-to-Die Routing with ShieldingSheng-Yu Hsiao, Yu-Yueh Chang, Jeong-Tying Li. ispd 2025: 52-53 [doi]

Invited: Physical Design for Systolic Array-Based Integrated CircuitsJiang Hu. ispd 2025: 73 [doi]

Invited: Artificial Netlist Generation for Enhanced Circuit Data AugmentationSeokhyeong Kang. ispd 2025: 163 [doi]

Cell-Flex Metrics for Designing Optimal Standard Cell Layout with Enhanced Cell Layout FlexibilityByeonggon Kang, Ying Yuan, Yucheng Wang, Bill Lin 0001, Chung-Kuan Cheng. ispd 2025: 164-172 [doi]

Invited: Physical Design Challenges for Design Technology Co-optimizationTaewhan Kim. ispd 2025: 20-21 [doi]

Invited: Trailblazing the Future: Innovative Chip Design in the Era of Pervasive AISudipto Kundu. ispd 2025: 51 [doi]

Scalable CFET Cell Library Synthesis with A DRC-Aware Lookup Table to Optimize Valid Pin AccessTing-Wei Lee, Ting Xin Lin, Yih-Lang Li. ispd 2025: 173-181 [doi]

Multi-Stage CSM Timing Waveform Propagation Accelerated by NLDM AssistanceShih-Kai Lee, Pei-Yu Lee, Iris Hui-Ru Jiang. ispd 2025: 83-90 [doi]

Invited: ISPD 2025 Performance-Driven Large Scale Global Routing ContestRongjian Liang, Anthony Agnesina, Wen-Hao Liu 0001, Matt Liberty, Hsin-Tzu Chang, Haoxing Ren. ispd 2025: 252-256 [doi]

ML-QLS: Multilevel Quantum Layout SynthesisWan-Hsuan Lin, Jason Cong. ispd 2025: 55-63 [doi]

GraphCAD: Leveraging Graph Neural Networks for Accuracy Prediction Handling Crosstalk-affected DelaysFangzhou Liu, Guannan Guo, Yuyang Ye 0001, Ziyi Wang, Wenjie Fu 0003, Weihua Sheng, Bei Yu 0001. ispd 2025: 125-133 [doi]

LEGO-Size: LLM-Enhanced GPU-Optimized Signoff-Accurate Differentiable VLSI Gate Sizing in Advanced NodesYi-Chen Lu, Kishor Kunal, Geraldo Pradipta, Rongjian Liang, Ravikishore Gandikota, Haoxing Ren. ispd 2025: 152-162 [doi]

LEGALM: Efficient Legalization for Mixed-Cell-Height Circuits with Linearized Augmented Lagrangian MethodJing Mai, Chunyuan Zhao, Zuodong Zhang, Zhixiong Di, Yibo Lin, Runsheng Wang, Ru Huang 0001. ispd 2025: 22-30 [doi]

Invited: Shaping the Future of Interconnected Physical DesignDavid Z. Pan. ispd 2025: 220-221 [doi]

Proceedings of the 2025 International Symposium on Physical Design, ISPD 2025, Austin, TX, USA, March 16-19, 2025Gracieli Posser, Stephan Held, editors, ACM, 2025. [doi]

Invited: Innovation in Times of Technology DisruptionBryan Preas. ispd 2025: 218-219 [doi]

Invited: Modeling and Design Methodology for Backside Integration of Voltage ConvertersAmaan Rahman, Hang Yang, Cong Hao, Sung Kyu Lim. ispd 2025: 242-250 [doi]

Invited: Mapping Two Decades of Innovation: Lessons from 25 Years of ISPD ResearchGona Rahmaniani, Matthew Guthaus, Laleh Behjat. ispd 2025: 102-110 [doi]

Invited: Streamlining and Automating Routing of Multi-Chiplet TechnologiesKsenia Roze. ispd 2025: 54 [doi]

Towards Designing and Deploying Ising MachinesSachin S. Sapatnekar. ispd 2025: 1 [doi]

Invited: Automation and Optimization of Heterogeneous Multi-Die SystemsHenry Sheng. ispd 2025: 231-232 [doi]

Invited: Chiplet-Based Integration - Scale-Down and Scale-OutBoris Vaisband. ispd 2025: 217 [doi]

Placement-Aware 3D Net-to-Pad Assignment for Array-Style Hybrid Bonding 3D ICsPruek Vanna-Iampikul, Jun-Sik Yoon, Chaeryung Park, Gary Yeap, Sung Kyu Lim. ispd 2025: 200-208 [doi]

Invited: AI-assisted RoutingQijing Wang, Liang Xiao, Evangeline F. Y. Young. ispd 2025: 134-142 [doi]

Photonic Side-Channel Analyzer: Enabling Security-Aware Physical Design MethodologyMeizhi Wang, Yi-Ru Chen, S. S. Teja Nibhanupudi, Elham Amini, Antonio Saavedra, Yinan Wang, Daniel Wasserman, Jean-Pierre Seifert, Jaydeep P. Kulkarni. ispd 2025: 74-82 [doi]

GPU-Accelerated Inverse Lithography Towards High Quality Curvy Mask GenerationHaoyu Yang, Haoxing Ren. ispd 2025: 42-50 [doi]

ML-Based Fine-Grained Modeling of DC Current Crowding in Power Delivery TSVs for Face-to-Face 3D ICsZheng Yang, Zhen Zhuang, Bei Yu 0001, Tsung-Yi Ho, Martin D. F. Wong, Sung Kyu Lim. ispd 2025: 233-241 [doi]

Cypress: VLSI-Inspired PCB Placement with GPU AccelerationNiansong Zhang, Anthony Agnesina, Noor Shbat, Yuval Leader, Zhiru Zhang, Haoxing Ren. ispd 2025: 31-41 [doi]

LiDAR: Automated Curvy Waveguide Detailed Routing for Large-Scale Photonic Integrated CircuitsHongjian Zhou, Keren Zhu 0004, Jiaqi Gu 0002. ispd 2025: 64-72 [doi]

LVFGen: Efficient Liberty Variation Format (LVF) Generation Using Variational Analysis and Active LearningJunzhuo Zhou, Haoxuan Xia, Wei W. Xing, Ting-Jung Lin, Li Huang, Lei He 0001. ispd 2025: 182-190 [doi]

Abuttable Analog Cell Library and Automatic AMS LayoutTianjia Zhou, Cheng Chang, Li Huang, Jingyun Gu, Zexin Ji, Xiangyang Liu, Hailang Liang, Zhanfei Chen, Ting-Jung Lin, Song Wang, Na Bai, Zhengping Li, Lei He. ispd 2025: 191-199 [doi]

2024

Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICsSiting Liu 0002, Jiaxi Jiang, Zhuolun He, Ziyi Wang, Yibo Lin, Bei Yu 0001, Martin D. F. Wong. ispd 2024: 75-82 [doi]

PANEL: EDA Challenges at Advanced Technology Nodes CKeh-Jeng Chang. ispd 2024: 73 [doi]

3Dblox: Unleash the Ultimate 3DIC Design ProductivityJim Chang. ispd 2024: 215 [doi]

Physical Design Challenges in Modern Heterogeneous IntegrationYao-Wen Chang. ispd 2024: 125-134 [doi]

AI for EDA/Physical Design: Driving the AI Revolution: The Crucial Role of 3D-ICErick Chao. ispd 2024: 113 [doi]

Introduction to the Panel on EDA Challenges at Advanced Technology NodesTung-Chieh Chen. ispd 2024: 61 [doi]

Slack Redistributed Register Clustering with Mixed-Driving Strength Multi-bit Flip-FlopsYen-Yu Chen, Hao-Yu Wu, Iris Hui-Ru Jiang, Cheng-Hong Tsai, Chien-Cheng Wu. ispd 2024: 21-29 [doi]

Enabling System Design in 3D Integration: Technologies and MethodologiesHung-Ming Chen. ispd 2024: 217 [doi]

Warpage Study by Employing an Advanced Simulation Methodology for Assessing Chip Package Interaction EffectsJun-Ho Choy, Stéphane Moreau, Catherine Brunet-Manquat, Valeriy Sukharev, Armen Kteyan. ispd 2024: 85-90 [doi]

Scheduling and Physical DesignJason Cong. ispd 2024: 219-225 [doi]

SMT-Based Layout Synthesis Approaches for Quantum CircuitsZi-Hao Guo, Ting-Chi Wang. ispd 2024: 235-243 [doi]

Large Language Models for EDA: Future or Mirage?Zhuolun He, Bei Yu 0001. ispd 2024: 65-66 [doi]

Novel Transformer Model Based Clustering Method for Standard Cell Design AutomationChia-Tung Ho, Ajay Chandna, David Guan, Alvin Ho, Minsoo Kim, Yaguang Li, Haoxing Ren. ispd 2024: 195-203 [doi]

FastTuner: Transferable Physical Design Parameter Optimization using Fast Reinforcement LearningHao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, Sung Kyu Lim. ispd 2024: 93-101 [doi]

Practical Mixed-Cell-Height Legalization Considering Vertical Cell Abutment ConstraintTeng-Ping Huang, Shao-Yun Fang. ispd 2024: 151-159 [doi]

Parallel and Heterogeneous Timing Analysis: Partition, Algorithm, and SystemTsung-Wei Huang, Boyang Zhang, Dian-Lun Lin, Cheng-Hsiang Chiu. ispd 2024: 51-59 [doi]

Introduction of 3D IC Thermal Analysis FlowAlex Hung. ispd 2024: 213 [doi]

Physical Design Challenges for Automotive ASICsGoeran Jerke. ispd 2024: 265 [doi]

Proceedings of the 2024 International Symposium on Physical Design, ISPD 2024, Taipei, Taiwan, March 12-15, 2024Iris Hui-Ru Jiang, Gracieli Posser, editors, ACM, 2024. [doi]

Panel Statement: EDA Needs at Advanced Technology NodesAndrew B. Kahng. ispd 2024: 63 [doi]

Solvers, Engines, Tools and Flows: The Next Wave for AI/ML in Physical DesignAndrew B. Kahng. ispd 2024: 117-124 [doi]

Methodology of Resolving Design Rule Checking Violations Coupled with Fully Compatible Prediction ModelSuwan Kim, Hyunbum Park, Kyeonghyeon Baek, Kyumyung Choi, Taewhan Kim. ispd 2024: 103-111 [doi]

Solving the Physical Challenges for the Next Generation of Safety Critical & High Reliability SystemsRob Knoth. ispd 2024: 267 [doi]

Layout Verification Using Open-Source SoftwareAndreas Krinke, Robert Fischbach, Jens Lienig. ispd 2024: 137-142 [doi]

Unified 3D-IC Multi-Chiplet System Design SolutionWang-Tyng Lay. ispd 2024: 83 [doi]

Calibration-Based Differentiable Timing Optimization in Non-linear Global PlacementWuxi Li, Yuji Kukimoto, Grégory Servel, Ismail Bustany, Mehrdad E. Dehkordi. ispd 2024: 31-39 [doi]

Computing Architecture for Large-Language Models (LLMs) and Large Multimodal Models (LMMs)Bor-Sung Liang. ispd 2024: 233-234 [doi]

GPU/ML-Enhanced Large Scale Global Routing ContestRongjian Liang, Anthony Agnesina, Wen-Hao Liu, Haoxing Ren. ispd 2024: 269-274 [doi]

MedPart: A Multi-Level Evolutionary Differentiable Hypergraph PartitionerRongjian Liang, Anthony Agnesina, Haoxing Ren. ispd 2024: 3-11 [doi]

PANEL: EDA Challenges at Advanced Technology Nodes BGuang-Wan Liao. ispd 2024: 69 [doi]

Reinforcement Learning or Simulated Annealing for Analog Placement? A Study based on Bounded-Sliceline GridsMark Po-Hung Lin, Chou-Chen Lee, Yi-Chao Hsieh. ispd 2024: 143-150 [doi]

Design Automation Challenges for Automotive SystemsChung-Wei Lin. ispd 2024: 263 [doi]

Timing-Driven Analytical Placement According to Expected Cell Distribution RangeJai-Ming Lin, You-Yu Chang, Wei-Lun Huang. ispd 2024: 177-184 [doi]

PANEL: EDA Challenges at Advanced Technology Nodes AEugene Liu. ispd 2024: 67 [doi]

Challenges for Automating PCB LayoutWen-Hao Liu, Anthony Agnesina, Haoxing Mark Ren. ispd 2024: 91-92 [doi]

Power Sub-Mesh Construction in Multiple Power Domain Design with IR Drop and Routability OptimizationChien Pang Lu, Iris Hui-Ru Jiang, Chung-Ching Peng, Mohd Mawardi Mohd Razha, Alessandro Uber. ispd 2024: 205-212 [doi]

IncreMacro: Incremental Macro Placement RefinementYuan Pu, Tinghuan Chen, Zhuolun He, Chen Bai, Haisheng Zheng, Yibo Lin, Bei Yu. ispd 2024: 169-176 [doi]

Engineering the Future of IC Design with AIRuchir Puri. ispd 2024: 1 [doi]

Fundamental Differences Between Analog and Digital Design Problems - An IntroductionJürgen Scheible. ispd 2024: 135-136 [doi]

Routability Booster " Synthesize a Routing Friendly Standard Cell Library by Relaxing BEOL ResourcesBing-Xun Song, Ting Xin Lin, Yih-Lang Li. ispd 2024: 185-193 [doi]

Novel Airgap Insertion and Layer Reassignment for Timing Optimization Guided by Slack DependencyWei Chen Tai, Min-Hsien Chung, Iris Hui-Ru Jiang. ispd 2024: 41-49 [doi]

Challenges in Floorplanning and Macro Placement for Modern SoCsI-Lun Tseng. ispd 2024: 71-72 [doi]

Satisfiability Modulo Theories-Based Qubit Mapping for Trapped-Ion Quantum Computing SystemsWei-Hsiang Tseng, Yao-Wen Chang, Jie-Hong Roland Jiang. ispd 2024: 245-253 [doi]

DSO.ai - A Distributed System to Optimize Physical Design FlowsPiyush Verma. ispd 2024: 115-116 [doi]

Pioneering Contributions of Professor Martin D. F. Wong to Automatic Floorplan DesignTing-Chi Wang. ispd 2024: 229 [doi]

ISPD 2024 Lifetime Achievement Award BioMartin D. F. Wong. ispd 2024: 231 [doi]

Optimization for Buffer and Splitter Insertion in AQFP Circuits with Local and Group MovementBing-Huan Wu, Wai-Kei Mak. ispd 2024: 255-262 [doi]

FuILT: Full Chip ILT System With Boundary HealingShuo Yin, Wenqian Zhao, Li Xie, Hong Chen, Yuzhe Ma, Tsung-Yi Ho, Bei Yu 0001. ispd 2024: 13-20 [doi]

Accelerating Physical Design from 1 to NEvangeline F. Y. Young. ispd 2024: 227 [doi]

Multi-Electrostatics Based Placement for Non-Integer Multiple-Height CellsYu Zhang, Yuan Pu, Fangzhou Liu, Peiyu Liao, Kai-Yuan Chao, Keren Zhu 0004, Yibo Lin, Bei Yu 0001. ispd 2024: 161-168 [doi]

2023

Google Investment in Open Source Custom Hardware Development Including No-Cost Shuttle ProgramTim Ansell. ispd 2023: 207 [doi]

Co-design for Heterogeneous Integration: A Failure Analysis PerspectiveErica Douglas, Julia Deitz, Timothy Ruggles, Daniel Perry, Damion Cummings, Mark Rodriguez, Nichole Valdez, Brad Boyce. ispd 2023: 78-79 [doi]

VLSIR - A Modular Framework for Programming Analog & Custom Circuits & LayoutsDan Fritchman. ispd 2023: 82-83 [doi]

Goal Driven PCB Synthesis Using Machine Learning and CloudScale ComputeTaylor Hogan. ispd 2023: 80 [doi]

Addressing the EDA Roadblocks for Domain-specific Compilers: An Industry PerspectiveAlireza Kaviani. ispd 2023: 210 [doi]

Software-driven Design for Domain-specific ComputeDesmond A. Kirkpatrick. ispd 2023: 206 [doi]

Immersion and EUV Lithography: Two Pillars to Sustain Single-Digit Nanometer NodesBurn J. Lin. ispd 2023: 104 [doi]

ISPD 2023 Lifetime Achievement Award BioMalgorzata Marek-Sadowska. ispd 2023: 265 [doi]

Developing Quantum Workloads for Workload-Driven Co-designAnne Matsuura. ispd 2023: 197 [doi]

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