| 0 | -- | 0 | Krishnendu Chakrabarty, Erik Jan Marinissen. How Useful are the ITC 02 SoC Test Benchmarks? |
| 1 | -- | 0 | Rajesh Gupta. Sustaining an Industry Obsession |
| 5 | -- | 7 | Jaume Segura, Peter C. Maxwell. Guest Editors Introduction: Defect-Oriented Testing in the Deep-Submicron Era |
| 8 | -- | 16 | Sagar S. Sabade, D. M. H. Walker. IDDQ Test: Will It Survive the DSM Challenge? |
| 18 | -- | 26 | Rosa Rodríguez-Montañés, Paul Volf, José Pineda de Gyvez. Resistance Characterization for Weak Open Defects |
| 27 | -- | 35 | Xavier Aragonès, José Luis González, Francesc Moll, Antonio Rubio. Noise Generation and Coupling Mechanisms in Deep-Submicron ICs |
| 36 | -- | 43 | Ali Keshavarzi, James Tschanz, Siva Narendra, Vivek De, W. Robert Daasch, Kaushik Roy, Manoj Sachdev, Charles F. Hawkins. Leakage and Process Variation Effects in Current Testing on Future CMOS Circuits |
| 44 | -- | 52 | Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Hans-Joachim Wunderlich. High Defect Coverage with Low-Power Test Sequences in a BIST Environment |
| 54 | -- | 55 | Robert C. Aitken, Donald L. Wheater. Guest Editors Introduction: Stressing the Fundamentals |
| 56 | -- | 64 | Shuo Sheng, Michael S. Hsiao. Efficient Sequential Test Generation Based on Logic Simulation |
| 65 | -- | 72 | Carl Barnhart, Vanessa Brunkhorst, Frank Distler, Owen Farnsworth, Andrew Ferko, Brion L. Keller, David Scott, Bernd Könemann, Takeshi Onodera. Extending OPMISR beyond 10x Scan Test Efficiency |
| 74 | -- | 81 | W. Robert Daasch, James McNames, Robert Madge, Kevin Cota. Neighborhood Selection for IDDQ Outlier Screening at Wafer Sort |
| 82 | -- | 91 | Sule Ozev, Christian Olgaard, Alex Orailoglu. Multilevel Testability Analysis and Solutions for Integrated Bluetooth Transceivers |
| 92 | -- | 104 | Marcello Dalpasso, Alessandro Bogliolo, Luca Benini. Virtual Simulation of Distributed IP-Based Designs |
| 114 | -- | 115 | . Conference Reports |
| 116 | -- | 117 | . Test Technology TC Newsletter |
| 118 | -- | 0 | . Design Automation Technical Committee Newsletter |