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    Journal: IEEE Design & Test of Computers

    Volume 34, Issue 6

    4 -- 5Jörg Henkel. Self-Aware On-Chip Systems
    6 -- 7Axel Jantsch, Nikil D. Dutt. Guest Editorial: Special Issue on Self-Aware Systems on Chip
    8 -- 26Axel Jantsch, Nikil D. Dutt, Amir M. Rahmani. Self-Awareness in Systems on Chip - A Survey
    27 -- 35Konstantin Shibin, Sergei Devadze, Artur Jutman, Martin Grabmann, Robin Pricken. Health Management for Self-Aware SoCs Based on IEEE 1687 Infrastructure
    36 -- 45James J. Davis, Joshua M. Levine, Edward A. Stott, Eddie Hung, Peter Y. K. Cheung, George A. Constantinides. KOCL: Power Self- Awareness for Arbitrary FPGA-SoC-Accelerated OpenCL Applications
    46 -- 53Davide Rossi, Igor Loi, Antonio Pullini, Christoph Muller, Andreas Burg, Francesco Conti 0001, Luca Benini, Philippe Flatresse. A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors
    54 -- 62Hans Giesen, Raphael Rubin, Benjamin Gojman, André DeHon. Self-Adaptive Timing Repair
    63 -- 76Angelos Antonopoulos, Christiana Kapatsori, Yiorgos Makris. Trusted Analog/Mixed- Signal/RF ICs: A Survey and a Perspective
    77 -- 83Katherine Shu-Min Li, Sying-Jyan Wang, Ruei-Ting Gu, Bo-Chuan Cheng. Layout-Aware Optimized Prebond Silicon Interposer Test Synthesis
    84 -- 93Dongyeob Shin, Jongsun Park, Jangwon Park, Somnath Paul, Swarup Bhunia. Adaptive ECC for Tailored Protection of Nanoscale Memory
    94 -- 101Mohsen Imani, John Hwang, Tajana Rosing, Abbas Rahimi, Jan M. Rabaey. Low-Power Sparse Hyperdimensional Encoder for Language Recognition
    102 -- 108Lothar Thiele. Internet of Things - The Quest for Trust
    109 -- 118Patrick Mayor, Martin Rajman, Giovanni De Micheli. Nano-Tera.ch: Information Technology for Health, Environment, and Energy
    119 -- 120Maria K. Michael, Haralampos-G. D. Stratigopoulos. Recap of the European Test Symposium 2017 (ETS'17)
    121 -- 122David Garrett, Chia-Lin Yang. Recap of the 2017 International Symposium on Low Power Electronics and Design (ISLPED)
    123 -- 124José Luis Ayala. CEDA Currents
    125 -- 126Theo Theocharides. Test Technology TC Newsletter
    128 -- 0Scott Davidson. Chips Thinking About Chips

    Volume 34, Issue 5

    4 -- 0Jörg Henkel. Verification and Test
    5 -- 6Magdy S. Abadir, Jayanta Bhadra, Wen Chen, Li-C. Wang. Guest Editors' Introduction: Emerging Challenges and Solutions in SoC Verification
    7 -- 22Wen Chen, Sandip Ray, Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang. Challenges and Trends in Modern SoC Design Verification
    23 -- 29Wen Chen, Kuo-Kai Hsieh, Li-Chung Wang, Jayanta Bhadra. Data-Driven Test Plan Augmentation for Platform Verification
    30 -- 37Syeda Hira Taqdees, Osman Hasan. Formally Verifying Transfer Functions of Linear Analog Circuits
    38 -- 46Gianpiero Cabodi, Paolo Camurati, Sebastiano F. Finocchiaro, Francesco Savarese, Danilo Vendraminetto. Embedded Systems Secure Path Verification at the Hardware/Software Interface
    47 -- 53John Adler, Andreas G. Veneris. Leveraging Software Configuration Management in Automated RTL Design Debug
    54 -- 62Maroua Ben Slimane, Imene Ben Hafaiedh, Riadh Robbana. Formal-Based Design and Verification of SoC Arbitration Protocols: A Comparative Analysis of TDMA and Round-Robin
    63 -- 71Huanyu Wang, Domenic Forte, Mark M. Tehranipoor, Qihang Shi. Probing Attacks on Integrated Circuits: Challenges and Research Opportunities
    72 -- 79Ran Wang, Krishnendu Chakrabarty. Tackling Test Challenges for Interposer-Based 2.5-D Integrated Circuits
    80 -- 87Francky Catthoor, Guido Groeseneken. Will Chips of the Future Learn How to Feel Pain and Cure Themselves?
    90 -- 96Yao-Wen Chang. An Interview With Professor Chenming Hu, Father of 3D Transistors
    97 -- 98Scott Davidson. Engineering Secure Internet of Things Systems
    99 -- 100José Luis Ayala. IEEE Rebooting Computing Week
    101 -- 102Theo Charides. Test Technology TC Newsletter
    103 -- 0Alvaro Cardenas. Corrections
    104 -- 0Scott Davidson. To Verification Infinity and Beyond

    Volume 34, Issue 4

    4 -- 0Jörg Henkel. Cyber-Physical Systems Security and Privacy
    5 -- 6Michail Maniatakos, Alvaro A. Cárdenas, Ramesh Karri. Guest Editors' Introduction: Cyber-Physical Systems Security and Privacy
    7 -- 17Jairo Giraldo, Esha Sarkar, Alvaro A. Cárdenas, Michail Maniatakos, Murat Kantarcioglu. Security and Privacy in Cyber-Physical Systems: A Survey of Surveys
    18 -- 25Sujit Rokka Chhetri, Mohammad Abdullah Al Faruque. Side Channels of Cyber-Physical Systems: Case Study in Additive Manufacturing
    26 -- 33Sandhya Koteshwara, Amitabh Das. Comparative Study of Authenticated Encryption Targeting Lightweight IoT Applications
    34 -- 43A. P. Sakis Meliopoulos, George J. Cokkinides, Rui Fan, Liangyi Sun. Data Attack Detection and Command Authentication via Cyber-Physical Comodeling
    44 -- 51Estefanía Etchevés Miciolino, Roberto Setola, Giuseppe Bernieri, Stefano Panzieri, Federica Pascucci, Marios M. Polycarpou. Fault Diagnosis and Network Anomaly Detection in Water Infrastructures
    52 -- 59Matthias Jung 0001, Deepak M. Mathew, Carl Christian Rheinländer, Christian Weis, Norbert Wehn. A Platform to Analyze DDR3 DRAM's Power and Retention Time
    60 -- 68Jishen Zhao, Qiaosha Zou, Yuan Xie 0001. Overview of 3-D Architecture Design Opportunities and Techniques
    69 -- 75Gabe Moretti. Accellera's Support for ESL Verification and Stimulus Reuse
    76 -- 77David Atienza, Giorgio Di Natale. Report on DATE 2017 in Lausanne
    78 -- 79Theo Theocharides. TTTC News
    80 -- 0Scott Davidson. Practice Makes Perfect

    Volume 34, Issue 3

    4 -- 5Jörg Henkel. Emerging Memory Technologies
    6 -- 7Yiran Chen, Tei-Wei Kuo, Barbara De Salvo. Guest Editors' Introduction: Critical and Enabling Techniques for Emerging Memories
    8 -- 22Yiran Chen, Hai Helen Li, Ismail Bayram, Enes Eken. Recent Technology Advances of Emerging Memories
    23 -- 30Mouhamad Alayan, Elisa Vianello, Barbara De Salvo, Luca Perniola, Andrea Padovani, Luca Larcher. 2-Based RRAM
    31 -- 41Shivam Swami, Kartik Mohanram. Reliable Nonvolatile Memories: Techniques and Measures
    42 -- 49Caiwen Ding, Ning Liu, Yanzhi Wang, Ji Li, Soroush Heidari, Jingtong Hu, Yongpan Liu. Multisource Indoor Energy Harvesting for Nonvolatile Processors
    50 -- 58Kai-li Wang, Bing-Yang Lin, Cheng-Wen Wu, Mincent Lee, Hao Chen, Hung-Chih Lin, Ching-Nen Peng, Min-Jer Wang. Test Cost Reduction Methodology for InFO Wafer-Level Chip-Scale Package
    59 -- 67Hussam Amrouch, Victor M. van Santen, Jörg Henkel. Interdependencies of Degradation Effects and Their Impact on Computing
    68 -- 92Prabhat Mishra, Ronny Morad, Avi Ziv, Sandip Ray. Post-Silicon Validation in the SoC Era: A Tutorial Introduction
    93 -- 95Krishnendu Chakrabarty. Quo Vadis Test? The Past, the Present, and the Future: No Longer a Necessary Evil
    96 -- 102David Yeh. Designing Secure Electronics: Challenges From a Hardware Perspective
    103 -- 104Naofumi Takagi. Recap of the 22nd Asia and South- Pacific Design Automation Conference
    105 -- 107Scott Davidson. Cyber-Physical System Design With Sensor Networking Technologies
    108 -- 109José L. Ayala. Code Ocean Is Live: Upload Your Algorithms
    110 -- 111Theo Theocharides. Test Technology TC Newsletter
    112 -- 0Scott Davidson. Being Connected

    Volume 34, Issue 2

    4 -- 0Jörg Henkel. Power Density
    5 -- 7Muhammad Shafique, Siddharth Garg, Vikas Chandra. Guest Editors' Introduction: Computing in the Dark Silicon Era
    8 -- 23Muhammad Shafique, Siddharth Garg. Computing in the Dark Silicon Era: Current Trends and Research Challenges
    24 -- 30Vivek De, Sriram R. Vangal, Ram Krishnamurthy. Near Threshold Voltage (NTV) Computing: Computing in the Dark Silicon Era
    31 -- 38Nathaniel Ross Pinckney, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David Blaauw, Lucian Shifren, Brian Cline, Saurabh Sinha. Impact of FinFET on Near-Threshold Voltage Scalability
    39 -- 50Ardavan Pedram, Stephen Richardson, Mark Horowitz, Sameh Galal, Shahar Kvatinsky. Dark Memory and Accelerator-Rich System Optimization in the Dark Silicon Era
    51 -- 59Mohammad Hashem Haghbayan, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Antonio Miele, Cristiana Bolchini, Hannu Tenhunen. Can Dark Silicon Be Exploited to Prolong System Lifetime?
    60 -- 68Amir Yazdanbakhsh, Divya Mahajan, Hadi Esmaeilzadeh, Pejman Lotfi-Kamran. AxBench: A Multiplatform Benchmark Suite for Approximate Computing
    69 -- 78Zhi-Yong Liu, Hsiu-Chuan Shih, Bing-Yang Lin, Cheng-Wen Wu. Controller Architecture for Low-Power, Low-Latency DRAM With Built-in Cache
    79 -- 86Cristiana Bolchini, Luca Cassano. A Fully Automated and Configurable Cost-Aware Framework for Adaptive Functional Diagnosis
    87 -- 90Marilyn Wolf. The Physics of Event-Driven IoT Systems
    92 -- 93Frank Liu. Highlights of ICCAD 2016
    94 -- 98Michael J. Flynn, Subhasish Mitra. Edward J. McCluskey 1929-2016
    99 -- 101Theo Theocharides. TTTC News
    104 -- 0Scott Davidson. Dark Silicon, Antiparallelism, and Too Much Work

    Volume 34, Issue 1

    4 -- 5Jörg Henkel. 3D Test
    6 -- 7Erik Jan Marinissen, Yervant Zorian. Guest Editors' Introduction: Design & Test of a High-Volume 3-D Stacked Graphics Processor With High-Bandwidth Memory
    8 -- 15Michael Alfano, Bryan Black, Jeff Rearick, Joseph Siegel, Michael Su, Julius Din. Unleashing Fury: A New Paradigm for 3-D Design and Test
    16 -- 25Hongshin Jun, Sang Kyun Nam, Han Ho Jin, Jong Chern Lee, Yong Jae Park, Jaejin Lee. High-Bandwidth Memory (HBM) Test Challenges and Solutions
    26 -- 34Marc Loranger, Onnik Yaglioglu, John Oonk. High-Performance HBM Known-Good-Stack Testing
    35 -- 46Panu Jalas, Timo Rahkonen. Estimating the Impact of Methodology on Analog Integrated Circuit Design Time
    47 -- 56Selahattin Sayil, Archit H. Shah, Md. Adnan Zaman, Mohammad A. Islam. Soft Error Mitigation Using Transmission Gate With Varying Gate and Body Bias
    57 -- 64Samah Mohamed Saeed, Ozgur Sinanoglu. A Comprehensive Design-for-Test Infrastructure in the Context of Security-Critical Applications
    65 -- 76Wisam Kadry, Dmitry Krestyashyn, Arkadiy Morgenshtein, Amir Nahir, Vitali Sokhin, Jin-Sung Park, Sung-Boem Park, WooKyeong Jeong, Jae Cheol Son. Test Generation Methods for Utilization Improvement of Hardware-Accelerated Simulation Platforms
    77 -- 90Andy D. Pimentel. Exploring Exploration: A Tutorial Introduction to Embedded Systems Design Space Exploration
    91 -- 94Mark Papermaster. Developing Great Products for the Immersive Computing Era
    95 -- 105Magdy Abadir. An Interview With Semiconductor Pioneer and EDA Visionary Leader Wally Rhines
    106 -- 107Lothar Thiele, Jörg Henkel. Report of the 2016 Embedded Systems Week (ESWEEK)
    115 -- 117Theo Theocharides. Test Technology TC Newsletter
    120 -- 0Scott Davidson. Research Is Its Own Reward
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