1 | -- | 2 | Keshab K. Parhi. The Editor's Corner |
3 | -- | 14 | Hui Pan, Asad A. Abidi. Signal folding in A/D converters |
15 | -- | 24 | Udaykiran Eduri, Franco Maloberti. Online calibration of a Nyquist-rate analog-to-digital converter using output code-density histograms |
25 | -- | 37 | Chung-Yu Wu, Yu-Yee Liow. New current-mode wave-pipelined architectures for high-speed analog-to-digital converters |
38 | -- | 46 | Yun Chiu, Cheongyuen W. Tsang, Borivoje Nikolic, Paul R. Gray. Least mean square adaptive digital background calibration of pipelined analog-to-digital converters |
47 | -- | 62 | Rocio del Río, José Manuel de la Rosa, Maria Belen Pérez-Verdú, Manuel Delgado-Restituto, Rafael Dominguez-Castro, Fernando Manuel Medeiro Hidalgo, Ángel Rodríguez-Vázquez. Highly linear 2.5-V CMOS ΣΔ modulator for ADSL+ |
63 | -- | 71 | János Márkus, Gabor C. Temes. An efficient ΔΣ ADC architecture for low oversampling ratios |
72 | -- | 85 | Anas A. Hamoui, Kenneth W. Martin. High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling ΔΣ ADCs for broad-band applications |
86 | -- | 95 | Ovidiu Bajdechi, Georges G. E. Gielen, Johan H. Huijsing. Systematic design exploration of delta-sigma ADCs |
96 | -- | 109 | Thomas Tille, Jens Sauerbrey, Manfred Mauthe, Doris Schmitt-Landsiedel. Design of low-voltage MOSFET-only ΣΔ modulators in standard digital CMOS technology |
110 | -- | 117 | Yasuhiro Sugimoto. A realization of a below-1-V operational and 30-MS/s sample-and-hold IC with a 56-dB signal-to-noise ratio by applying the current-based circuit approach |
118 | -- | 129 | Yefim S. Poberezhskiy, Gennady Y. Poberezhskiy. Sampling and signal reconstruction circuits performing internal antialiasing filtering and their influence on the design of digital receivers and transmitters |
130 | -- | 139 | Shafiq M. Jamal, Daihong Fu, Mahendra P. Singh, Paul J. Hurst, Stephen H. Lewis. Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter |
140 | -- | 150 | Gildas Leger, Eduardo J. Peralías, Adoracioód Rueda, José Luis Huertas. Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs |
151 | -- | 158 | Jonas Elbornsson, Fredrik Gustafsson, Jan-Erik Eklund. Blind adaptive equalization of mismatch errors in a time-interleaved A/D converter system |
159 | -- | 169 | Miquel Albiol, José Luis González 0001, Eduard Alarcón. Mismatch and dynamic modeling of current sources in current-steering CMOS D/A converters: an extended design procedure |
170 | -- | 174 | Gabriele Gandolfi, Vittorio Colonna, Marzia Annovazzi, Fabrizio Stefani, Andrea Baschirotto. Self-tuning algorithms for high-performance bandpass switched-capacitor ΣΔ modulators |
174 | -- | 177 | Giuseppe Bonfini, Andrea S. Brogna, Cristian Garbossa, Luca Colombini, Maurizio Bacci, Stefania Chicca, Franco Bigongiari, Nicola Carlo Guerrini, Giuseppe Ferri. An ultralow-power switched opamp-based 10-B integrated ADC for implantable biomedical applications |
178 | -- | 181 | Timo Rahkonen, Janne Aikkila. Linear phase reconstruction filtering using a hold time longer than one sample period |
182 | -- | 186 | Roman Genov, Gert Cauwenberghs. Dynamic MOS sigmoid array folding analog-to-digital conversion |
186 | -- | 190 | J. Paul A. van der Wagt, Gordon G. Chu, Christine L. Conrad. A layout structure for matching many integrated resistors |
191 | -- | 195 | Jurgen Deveugele, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen. A gradient-error and edge-effect tolerant switching scheme for a high-accuracy DAC |
196 | -- | 200 | Janusz A. Starzyk, Russell P. Mohn, Liang Jing. A cost-effective approach to the design and layout of a 14-b current-steering DAC macrocell |
200 | -- | 205 | Peter Kiss, Jesus Arias, Dandan Li, Vito Boccuzzi. Stable high-order delta-sigma digital-to-analog converters |
206 | -- | 213 | Chee-Kian Ong, Kwang-Ting Cheng, Li-C. Wang. A new sigma-delta modulator architecture for testing using digital stimulus |
213 | -- | 217 | Carsten Wegener, Michael Peter Kennedy. Linear model-based testing of ADC nonlinearities |