The following publications are possibly variants of this publication:
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- Analyzing the Impact of SEUs on SRAMs with Resistive-Bridge DefectsG. Cardoso Medeiros, Letícia Maria Bolzani Pöhls, Fabian Vargas. vlsid 2016: 487-492 [doi]
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- Evaluating the Impact of Temperature on Dynamic Fault Behaviour of FinFET-Based SRAMs with Resistive DefectsG. Cardoso Medeiros, E. Brum, Leticia Bolzani Poehls, Thiago Copetti, Tiago R. Balen. et, 35(2):191-200, 2019. [doi]
- Comparing the Impact of Power Supply Voltage on CMOS- and FinFET-Based SRAMs in the Presence of Resistive DefectsThiago Copetti, Tiago R. Balen, E. Brum, C. Aquistapace, Leticia Bolzani Poehls. et, 36(2):271-284, 2020. [doi]
- Evaluation of Single Event Upset Susceptibility of FinFET-based SRAMs with Weak Resistive DefectsThiago Copetti, Guilherme Cardoso Medeiros, Mottaqiallah Taouil, Said Hamdioui, Letícia Maria Bolzani Poehls, Tiago Roberto Balen. et, 37(3):383-394, 2021. [doi]
- Analysing NBTI Impact on SRAMs with Resistive DefectsM. Tulio Martins, G. Cardoso Medeiros, Thiago Copetti, Fabian Vargas, Marcus Pohls. et, 33(5):637-655, 2017. [doi]