Table of Contents

• An Extensive Investigation and Analysis of Temperature-to-Digital Converter FoMsAntonio Aprile, Elisabetta Moisello, Edoardo Bonizzoni, Piero Malcovati. 1-4 [doi]
• A Lightweight Full Homomorphic Encryption Scheme on Fully-connected Layer for CNN Hardware Accelerator achieving Security InferenceChen Yang 0005, Zepeng Yang, Jia Hou, Yang Su. 1-4 [doi]
• A High Performance and Full Utilization Hardware Implementation of Floating Point Arithmetic UnitsChen Yang 0018, Siwei Xiang, Jiaxing Wang, Liyan Liang. 1-4 [doi]
• Efficient Sequence Generation for Hardware Verification Using Machine LearningMuhammad Gad, Mostafa AboelMaged, Maggie Mashaly, Mohamed A. Abd El ghany. 1-5 [doi]
• EDM: A multiclassification support system to identify seizure type using K Nearest NeighborShiza Shakeel, Niha Afzal, Gul Hameed Khan, Nadeem Ahmad Khan, Mujeeb Ur Rehman Abid, Muhammad Awais Bin Altaf. 1-4 [doi]
• Expand Reuse Strategy to ESL Power Modeling in SystemC/TLMAntonio Genov, François Verdier, Loic Leconte. 1-6 [doi]
• 1-D Convolutional Neural Networks for Touch Modalities ClassificationChristian Gianoglio, Edoardo Ragusa, Rodolfo Zunino, Maurizio Valle. 1-6 [doi]
• Reduced Model Size Deep Convolutional Neural Networks for Small-Footprint Keyword SpottingTsung-Han Tsai, Xin-hui Lin. 1-4 [doi]
• Novel Flexible True Random Number Generator Using Resistive Switching MemoryHeba Abunahla, Khaled Humood, Baker Mohammad. 1-5 [doi]
• An Affordance Detection Pipeline for Resource-Constrained DevicesTommaso Apicella, Andrea Cavallaro, Riccardo Berta, Paolo Gastaldo, Francesco Bellotti, Edoardo Ragusa. 1-6 [doi]
• System Theory Enables a Deep Exploration of ReRAM Cells' Switching PhenomenaAlon Ascoli, Ronald Tetzlaff, Stephan Menzel, V. Rana. 1-6 [doi]
• Delay-lines jitter modeling and efficiency analysis in FinFET technologyAlessio Di Pasquo, Enrico Monaco, Claudio Nani, Luca Fanucci. 1-5 [doi]
• Microarchitecture Optimization for Asynchronous Stochastic ComputingRahul Sreekumar, Mircea R. Stan. 1-6 [doi]
• Wearable Low-power Closed-loop System for Tremor Detection and Stimulation using Electromyography (EMG)Muhammad Rizwan Khan, Wala Saadeh, Muhammad Awais Bin Altaf. 1-4 [doi]
• An Automated Flow for Configuration and Generation of CNN based AI accelerators for HW Emulation & FPGA PrototypingAhmed Nasser, Karim Ahmed Fadel, Karim Ossama Abbas, Karim Hussein Ahmed, Mohamed AbdElSalam, Mahmoud Gaber. 1-7 [doi]
• Keyword Spotting System using Low-complexity Feature Extraction and Quantized LSTMKévin Hérissé, Benoit Larras, Antoine Frappé, Andreas Kaiser. 1-4 [doi]
• An Implantable 8-Contact Sense and Stimulation System for Continuous RecordingJohn Gahnz, Justin Doerr, Heather Orser. 1-5 [doi]
• FPGA Implementations of Espresso Stream CipherGani Kumisbek, N. Nalla Anandakumar, Mohammad S. Hashmi. 1-6 [doi]
• Maritime localization system based on IoTAmmar Mohanna, Fabrizio Cardinali, Davide Anghinolfi. 1-5 [doi]
• 3/2 Fractional Bennet's multiplier for capacitive energy harvesters based on Dickson charge-pumpDimitri Galayko, Jose-Francisco Ambia-Campos, Xavier Le Roux, Armine Karami, Elie Lefeuvre. 1-6 [doi]
• Analog Duty Cycle Controller Using Backgate Body Biasing For 5G Millimeter Wave ApplicationsClément Beauquier, David Duperray, Chadi Jabbour, Patricia Desgreys, Antoine Frappé, Andreas Kaiser. 1-4 [doi]
• Formal Verification Approach to Detect Always-On Denial of Service Trojans in Pipelined CircuitsKushal K. Ponugoti, Sudarshan K. Srinivasan, Nimish Mathure. 1-6 [doi]
• A Computationally Efficient Model of MEMS Stopper for Reliability OptimizationTianfang Peng, Zheng You. 1-6 [doi]
• An Energy-Efficient Near-Memory Computing Architecture for CNN Inference at Cache LevelMasoud Nouripayam, Arturo Prieto, Vignajeth Kuttuva Kishorelal, Joachim Rodrigues. 1-4 [doi]
• A Rail-to-Rail CMOS Voltage Comparator with Programmable HysteresisMustafa Oz, Edoardo Bonizzoni, Franco Maloberti, Alper Akdikmen, Jianping Li. 1-4 [doi]
• Deep Multiframe Enhancement for Motion Prediction in Video CompressionNicola Prette, Diego Valsesia, Tiziano Bianchi. 1-6 [doi]
• A Comparative Study of Switchable Capacitor Structures for LC Oscillators in a 28-nm TechnologyLantao Wang, Jonas Meier, Ralf Wunderlich, Stefan Heinen. 1-4 [doi]
• A Simple, Versatile Integration Platform based on a Printed Circuit Board for Lab-on-a-Chip SystemsSimon Dallaire, Paul-Vahé Cicek. 1-4 [doi]
• FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI BenchmarksVasileios Leon, Charalampos Bezaitis, George Lentaris, Dimitrios Soudris, Dionysios I. Reisis, Elissaios-Alexios Papatheofanous, Angelos Kyriakos, Aubrey Dunne, Arne Samuelsson, David Steenari. 1-5 [doi]
• An Enhanced Check-Node Architecture for 5G New Radio LDPC DecodersFakhreddine Ghaffari, Khoa Le. 1-6 [doi]
• Human- and Machine-Readable Requirements Formulation for Lab Verification AutomationMarc Huppmann, Manuel Harrant, Thomas Nirmaier, Andi Buzo, Linus Maurer, Georg Pelz. 1-4 [doi]
• All-Digital VCO-ADC TAD Using 4CKES-Type in 16-nm FinFET CMOS for Technology Scaling With Stochastic-ADC MethodTakamoto Watanabe. 1-4 [doi]
• ASIC Implementation of Associative Memory and Hamming Distance for HDC ApplicationEman Hassan, Huruy Tekle Tesfai, Baker Mohammad, Hani H. Saleh. 1-5 [doi]
• Colorimetric Sensing System for Neurotransmitter Detection Based on Multi-technologies ArchitectureGabriel P. Lachance, Guillaume Soulard, Loïc Bouffard, Élodie Boisselier, Mounir Boukadoum, Amine Miled 0001. 1-4 [doi]
• 28-nm CMOS Resistor-Less Voltage Reference with Process Corner CompensationAlfio Dario Grasso, Salvatore Pennisi, Chiara Venezia. 1-5 [doi]
• A low-cost IoT-based device to measure exposure to sub-6GHz 5G wavesLouis Guénégo, François Rivet, Guillaume Ferré, Anouar Walzik, Aharram Souhayl, Amine Karbab. 1-4 [doi]
• Simscape and LTspice models of HP ideal generic memristor based on finite closed form solution for window functionsStanisa Dautovic, Natasa Samardzic, Anamarija Juhas, Alon Ascoli, Ronald Tetzlaff. 1-6 [doi]
• All-Digital VCO-ADC TAD Confirming Scaling and Stochastic Effects Using 16-nm FinFET CMOSTakamoto Watanabe. 1-4 [doi]
• Detecting denial-of-service hardware Trojans in DRAM-based memory systemsHeba Salem, Nigel P. Topham. 1-6 [doi]
• Boosting the Efficiency of the Harmonics Elimination VLSI Architecture by Arithmetic ApproximationsPatrícia U. L. da Costa, Pedro Tauã Lopes Pereira, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi. 1-4 [doi]
• Nonlinearity Modeling for Mixed-Signal Inference Accelerators in Training FrameworksJoschua Conrad, Biyi Jiang, Paul Kässer, Vasileios Belagiannis, Maurits Ortmanns. 1-4 [doi]
• Ultra Low-power, Low-energy Static Single-phase Clocked Flip-flopYugal Maheshwari, Kleber Stangherlin, Derek Wright, Manoj Sachdev. 1-4 [doi]
• Digital Resolution Requirements in 0-X MASH Delta-Sigma-ModulatorsJonathan Ungethüm, John G. Kauffman, Maurits Ortmanns. 1-4 [doi]
• Demonstration of a Walsh-based Arbitrary Waveform Generator using Components Off-The-ShelfRémi Quéheille, François Rivet, Nathalie Deltimple, Yann Deval, Eric Kerhervé. 1-4 [doi]
• Comparison of Different Implementation Methods of Fractional-Order Derivative/IntegralAlaa AbdAlRahman, Ahmed Soltan, Ahmed G. Radwan. 1-5 [doi]
• Design and Application of a Novel 4-Transistor Chaotic Map with Robust PerformanceMaisha Sadia, Partha Sarathi Paul 0002, Md Razuan Hossain, Barry J. Muldrey, Md Sakib Hasan. 1-5 [doi]
• Practical Demonstration of RGC and Modified RGC TIAs for VLC systemsAmany Kassem, Izzat Darwazeh. 1-6 [doi]
• Delay-Locked Loop Based Multiphase Clock Generator for Time-Interleaved ADCsIbrahim Alhousseiny, Mohamed Ali, Naim Ben Hamida, Mohammad Honarparvar, Mohamad Sawan, Yvon Savaria. 1-4 [doi]
• 0.8-V CMOS $G_{m}-C$ Bandpass Filter for Electrical Bioimpedance SpectroscopyIsrael Corbacho, Juan M. Carrillo, José L. Ausín, Miguel Angel Domínguez, J. Francisco Duque-Carrillo. 1-4 [doi]
• Simple LiFi Oximeter Monitoring system for Telehealth applicationsMuna Darweesh, Diana W. Dawoud. 1-4 [doi]
• A Comparative Study of Noise Behavior in Single-Opamp Resonators in Delta-Sigma ModulatorsMohamed A. Mokhtar, Martin Merkle, John G. Kauffman, Maurits Ortmanns. 1-4 [doi]
• A Comparator Speed Enhancement Technique for Near- and Sub-Threshold ADCsBojun Hu, Sanfeng Zhang, Xiong Zhou, Zehao Li, Xiangxin Pan, Zhaoming Ding, Qiang Li. 1-4 [doi]
• Power- and Area-optimized Neural Network IC-Design for Academic EducationFlorian Frankreiter, Anselm Breitenreiter, Oliver Schrape, Milos Krstic. 1-6 [doi]
• FiltPIM: In-Memory Filter for DNA SequencingMarcel Khalifa, Rotem Ben Hur, Ronny Ronen, Orian Leitersdorf, Leonid Yavits, Shahar Kvatinsky. 1-4 [doi]
• A Burst-Mode TIA with Adaptive Response and Stable Operation for in-Vehicle Optical NetworksToshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura. 1-6 [doi]
• Low-Power Anomaly Detection and Classification System based on a Partially Binarized Autoencoder for In-Sensor ComputingPaola Vitolo, Gian Domenico Licciardo, Luigi Di Benedetto, Rosalba Liguori, Alfredo Rubino, Danilo Pau. 1-5 [doi]
• Low-Cost Wi-Fi-based System Using Passive Microwave Sensors for Liquid CharacterizationMichael M. Y. R. Riad, Angie R. Eldamak. 1-4 [doi]
• Comparative analysis of activation functions in neural networksFiruz Kamalov, Amril Nazir, Murodbek Safaraliev, Aswani Kumar Cherukuri, Rita Zgheib. 1-6 [doi]
• A hybrid event-based pixel for low-power image sensingMohamed Akrarai, Nils Margotat, Gilles Sicard, Laurent Fesquet. 1-6 [doi]
• A Power Switch Size Optimization Strategy for Multi-Switch DC-DC ConvertersSamuele Fusetto, Elisabetta Moisello, Francesco Cannillo, Piero Malcovati, Edoardo Bonizzoni. 1-4 [doi]
• High-Voltage Double-Domain Low-Dropout regulator for rapidly changing output loadsOsvaldo Gasparri, Bozic Aleksandar, Paolo Del Croce, Andrea Baschirotto. 1-4 [doi]
• Using Path Planning Algorithms and Digital Twin Simulators to Collect Synthetic Training Dataset for Drone Autonomous NavigationIsmail Ryad, Marwan Zidan, Nadien Rashad, Dina Bakr, Nadeen Bakr, Nada Yehia, Yara Ismail, Mohamed AbdElSalam, Ashraf Salem. 1-6 [doi]
• Identifying Applications' State via System Calls Activity: A Pipeline ApproachFatema Maasmi, Martina Morcos, Hussam M. N. Al Hamadi, Ernesto Damiani. 1-6 [doi]
• Neural Network Architecture Based on Wavelet Transform for Electro-mobility DetectionChing-Lung Su, Wen Cheng Lai, Jun-Yao Zhong. 1-4 [doi]
• Deep Learning Autoencoder-based Compression for Current Source Model WaveformsWaseem Raslan, Yehea Ismail. 1-6 [doi]
• Evaluation of High-Precision Nano-Ampere Current Measurement Method for Mass ProductionGaku Ogihara, Takayuki Nakatani, Daisuke Iimori, Shogo Katayama, Anna Kuwana, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Yujie Zhao, Jianglin Wei, Kazumi Hatayama, Haruo Kobayashi 0001. 1-6 [doi]
• A CMOS active voltage doubler for a low voltage $100-1000\ \mu \mathrm{W}$ range magnetoelectric energy transducerJosep Maria Sánchez-Chiva, Dimitri Galayko, Amine Rhouni. 1-6 [doi]
• Analysis of the Sampling Noise Cancellation Technique in a Track-and-Hold AmplifierHanyue Li, Mina Youssef, Yuting Shen, Eugenio Cantatore, Pieter Harpe. 1-5 [doi]
• Hybrid Detector with Interpixel Communication for Color X-ray ImagingPawel Grybos, Rafal Kleczek, Piotr Kmon, Aleksandra Krzyzanowska, Piotr Otfinowski, Robert Szczygiel, Miroslaw Zoladz. 1-4 [doi]
• On Reducing the Number of Multiplications in RNS-based CNN AcceleratorsVasilis Sakellariou, Vassilis Paliouras, Ioannis Kouretas, Hani H. Saleh, Thanos Stouraitis. 1-6 [doi]
• Modeling of Memcapacitor with Anelastic Dielectric via Two-Port CapacitorZdenek Biolek, Viera Biolková, Dalibor Biolek, Zdenek Kolka. 1-4 [doi]
• Low-Voltage CMOS Bulk-Driven Indirect Current Feedback Instrumentation AmplifierJuan M. Carrillo, Miguel Angel Domínguez, Raquel Pérez-Aloe, J. Francisco Duque-Carrillo, Guido Torelli. 1-4 [doi]
• A Deep Learning Framework for Breast Tumor Detection and Localization from Microwave Imaging DataSalwa K. Al Khatib, Tarek Naous, Raed M. Shubair, Hilal M. El Misilmani. 1-4 [doi]
• Touch Modality Classification using Spiking Neural Networks and Supervised-STDP LearningAli Dabbous, Ali Ibrahim, Maurizio Valle, Chiara Bartolozzi. 1-4 [doi]
• Time-Multiplexed Flash ADC for Deep Neural Network Analog in-Memory ComputingAndrea Boni, Francesco Frattini, Michele Caselli. 1-4 [doi]
• Design of IoT Microchip AVR Programmer for FOTA Updates based on Unified Programming and Debug Interface using Wi-Fi and LoRaAhmed I. Ahmed, Samy H. Sharf, Lobna A. Said, Ahmed H. Madian. 1-5 [doi]
• A Hybrid Rexception Network for COVID-19 Classification from Chest X-Ray ImagesNour Aburaed, Mina Al-Saad, Alavikunhu Panthakkan, Saeed Al-Mansoori, Hussain Al-Ahmad, Stephen Marshall. 1-5 [doi]
• Developing AI Agent with Functional Mockup Units for Car Autonomous NavigationAlaa Muhammed, Hadeer Essam, Beshoy Alber, Kirolos Samuel, Hagar Muhammed, Mina Wagdy, Nouran Khaled, Hadeer Fawzy, Aya Tarek, Mohamed Abdel Salam, M. Watheq El-Kharashi. 1-5 [doi]
• A Stochastic Compact Model Describing Memristor Plasticity and VolatilityAdil Malik, Christos Papavassiliou, Spyros Stathopoulos. 1-4 [doi]
• Dual Output Regulating Rectifier for an Implantable Neural InterfaceNoora Almarri, Dai Jiang, Andreas Demosthenous. 1-4 [doi]
• An Energy Efficient Multi-Rail Architecture for Stochastic Computing: A Bayesian Sensor Fusion Case StudyJérémy Belot, Abdelkarim Cherkaoui, Raphaël Laurent, Laurent Fesquet. 1-5 [doi]
• Exploring the analytical boundaries of capacitive feedback transimpedance amplifiersQuentin Schmidt, Adrien Morel, Yasser Moursy, Houssein Elmi Dawale, Gérard Billiot, Franck Badets. 1-4 [doi]
• A Compact Near-Infrared Spectrometer based on an FR4 Electromagnetic Scanning GratingRussell Farrugia, Barnaby Portelli, Ivan Grech, Joseph Micallef, Owen Casha, Edward Gatt. 1-5 [doi]
• Ultra Wideband 43 GHz Preamplifier with up to 60 dB adjustable Gain for accurate Noise Figure Measurement of Cryogenic LNAsPeter Toth, Marco Tiesing, Lukas Naumann, Andreas Fröhlich, Thomas Wirths, Peter Knott. 1-2 [doi]
• Wideband Low Noise Amplifiers for mm-Wave 5G Application using Capacitive Feedback Technique in 22nm FDSOIAdemola Akeem Mustapha, Sagiru Gaya, Baker Mohammad, Mohamed A. Abou-Khousa. 1-4 [doi]
• A 3.2-MS/s 14-Bit Extended-Range Second-Order Incremental ADCAbhijeet Taralkar, Francesco Conzatti, Piero Malcovati, Andrea Baschirotto. 1-4 [doi]
• Cardiovascular Segmentation Methods Based on Weak or no PriorFatma Taher, Neema Prakash. 1-4 [doi]
• Area estimation circuit for Weigh-In-Motion applications using piezoelectric transducersZoi Agorastou, Vasiliki Gogolou, Konstantinos Kozalakis, Stylianos Siskos. 1-5 [doi]
• Using Hardware Performance Counters to support infield GPU TestingJuan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Matteo Sonza Reorda. 1-4 [doi]
• A pose-based hand image classification method retrainable on embedded target devicesAlessio Canepa, Edoardo Ragusa, Christian Gianoglio, Paolo Gastaldo, Rodolfo Zunino. 1-6 [doi]
• 2.6-MHz 4.9-mW 37.5 dB-SNR Analog Front-End for Proton Sound Detectors in 28 nm CMOSElia A. Vallicelli, Andrea Baschirotto, Marcello De Matteis. 1-4 [doi]
• An S-band EPR-on-a-chip Receiver in $13\ \mu \mathrm{m}$ BiCMOSDaniel Krüger, Frederik Dreyer, Michal Kern, Jens Anders. 1-5 [doi]
• A Low-Dropout Regulator for One Time Programmable (OTP) Memories in Automotive ApplicationsOsvaldo Gasparri, Bozic Aleksandar, Paolo Del Croce, Andrea Baschirotto. 1-4 [doi]
• Solar sensor for Cubesat attitude determinationYerkebulan Nurgizat, Gani Balbayev, Dimitri Galayko. 1-5 [doi]
• Self-Parameterized Chaotic Map: A Hardware-efficient Scheme Providing Wide Chaotic RangePartha Sarathi Paul 0002, Anurag Dhungel, Maisha Sadia, Md Razuan Hossain, Barry John Muldrey, Md Sakib Hasan. 1-5 [doi]
• Energy Efficient Approximate 4: 2 Compressors for Error Tolerant ApplicationsL. Hemanth Krishna, J. Bhaskara Rao, Ayesha Sk, Sreehari Veeramachaneni, S. K. Noor Mahammad. 1-6 [doi]
• Design of CMOS Device Process Sensor in 28 nm FD-SOI with 2 % of Frequency SpreadGowtham Peringattu Kalarikkal, Rohit Goel, Hitesh Shrimali. 1-6 [doi]
• Audio Distress Signal Recognition in Rural and Urban Areas using a WSN consisting of Portable Resource-Constrained DevicesSyed Farhan Ahmad, Utkarsh Jha, Raghav Rawat, Govindaraju M. 1-6 [doi]
• SiGe HBT Model Enhancement for Quantum Control Circuitry at Cryogenic TemperaturesPeter Toth, Vadim Issakov. 1-2 [doi]
• Spin Wave Based 4-2 CompressorAbdulqader Nael Mahmoud, Frederic Vanderveken, Florin Ciubotaru, Christoph Adelmann, Sorin Cotofana, Said Hamdioui. 1-4 [doi]
• An Amp-Less Time-Domain AC Bridge for Impedance Spectroscopy with 1-bit $\Delta \Sigma$ DACYuya Maekawa, Hiroki Ishikuro. 1-5 [doi]
• Efficient Standard-Cell Legalization for Minimization of Total MovementJin-Tai Yan, Po-Yuan Huang, Chia-Hsun Yen. 1-4 [doi]
• Artificial Intelligence (AI) in the diagnosis of COVID-19 Detection: A ReviewNeethu Mohan, Saifudeen Kabeer, Nida Nasir. 1-6 [doi]
• Modeling Electrostatic MEMS ActuatorZdenek Kolka, Viera Biolková, Dalibor Biolek, Zdenek Biolek. 1-5 [doi]
• Computationally Light Algorithms for Tactile Sensing Signals Elaboration and ClassificationYoussef Amin, Christian Gianoglio, Maurizio Valle. 1-6 [doi]
• Analysis of Word Line Shaping Techniques for In-Memory Computing in SRAMsKailash Prasad, Aditya Biswas, Joycee Mekie. 1-6 [doi]
• A Reversible-Logic based Architecture for VGGNetBappaditya Dey, Kasem Khalil, Ashok Kumar 0001, Magdy A. Bayoumi. 1-4 [doi]
• A Class AB Programmable Gain Amplifier for an UWB Breast Cancer Detection SystemTarciso A. Martins, David Reyes, Bruno Sanches, Wilhelmus A. M. Van Noije. 1-4 [doi]
• Dynamic Mapping for Many-cores using Management Application OrganizationAngelo Elias Dalzotto, Marcelo Ruaro, Leonardo Vian Erthal, Fernando Gehm Moraes. 1-6 [doi]
• A Squarewave-Based Multi-Frequency Impedance Analyzer Based on the Heterodyne ArchitectureAlireza Mesri, Marco Sampietro, Giorgio Ferrari. 1-5 [doi]
• Charge Scavenging Gate Coupled Hierarchical Bitline Scheme for Ultra-Low Power SRAMs in 65nm LSTP CMOSMukesh Kumar Srivastav, Rimjhim, Govind Soni, Umang Mittal, Rupali Tewari, Riya Yadav, Anuj Grover, Kedar Janardan Dhori, Harsh Rawat. 1-6 [doi]
• Forward Body Bias Technique for Low Voltage and Area Constrained LDO Design in Deep Submicron TechnologiesAngelito A. Silverio. 1-4 [doi]
• A 4.8mW 22nm CMOS Fully-Integrated 60-GHz $3\times 3\times 2$ 3D Frequency-Shift Biosensor Array Using Vertically-Stacked LC OscillatorsAkiyoshi Tanaka, Guowei Chen, Kiichi Niitsu. 1-4 [doi]
• Proposal of a Single-Shot Multi-Frame Multi-Frequency CMOS ToF SensorPeyman F. Shahandashti, P. López, Víctor M. Brea 0001, Daniel García-Lesta, Miguel Heredia Conde. 1-4 [doi]
• A 6.5 nA Static Self-Calibrating Programmable Voltage Reference for Smart SoCsMichele Caselli, Evgenii Tiurin, Stefano Stanzione, Andrea Boni. 1-4 [doi]
• A Design Generator of Parametrizable and Runtime Configurable Constant False Alarm Rate ProcessorsMarija L. Petrovic, Vladimir M. Milovanovic. 1-6 [doi]
• Embedded STT-MRAM Energy Analysis for Intermittent Applications using Mean Standby DurationMousam Hossain, Soheil Salehi, Daniel Mulvaney, Ronald F. DeMara. 1-6 [doi]
• Delay-Based Neural Computation: Pulse Routing Architecture and Benchmark Application in FPGAVasilis N. Thanasoulis, Bernhard Vogginger, Johannes Partzsch, Christian Mayr 0001. 1-5 [doi]
• Evaluation of a Filter-less AD-PLL with a Wide Input Frequency Range Using a Fast-Locking AlgorithmRoberto Andrino Robles, Tomochika Harada, Michio Yokoyama. 1-6 [doi]
• A 5G-code based iterative Non-Binary LDPC decoderDimitris Chytas, Vassilis Paliouras. 1-6 [doi]
• RF Front-end Integrated Circuits with 2.4 GHz Antenna for Wireless Communication ReceiverWen Cheng Lai. 1-4 [doi]
• An Efficient Reconfigurable Neural Network on ChipKasem Khalil, Bappaditya Dey, Mostafa Abdelrehim, Ashok Kumar 0001, Magdy A. Bayoumi. 1-4 [doi]
• A gm/ID Design Methodology for 28 nm FD-SOI CMOS Resistive Feedback LNAsSylvain Bourdel, Serge Subias, M. K. Bouchoucha, Manuel J. Barragan, A. Cathelin, Carlos Galup-Montoro. 1-4 [doi]
• Frequency-Interleaved ADC with RF Equivalent Ideal Filter for Broadband Optical Communication ReceiversRyo Kabeya, Yohtaro Umeda, Kyoya Takano. 1-5 [doi]
• Machine learning-based acceleration of Genetic Algorithms for Parameter Extraction of highly dimensional MOSFET Compact ModelsGazmend Alia, Andi Buzo, Hannes Maier-Flaig, Klaus-Willi Pieper, Linus Maurer, Georg Pelz. 1-4 [doi]
• Hybrid Multisource Clock Tree SynthesisAng Boon Chong. 1-6 [doi]
• Robust Readout Circuit with Leakage Current Cancellation Technique for Stretchable Touch SensorsKaoru Yamashita, Tokihiko Shimura, Shun Sato, Naoji Matsuhisa, Hiroki Ishikuro. 1-5 [doi]
• Design of a Multi-State Memristive MemoryChaohan Wang, Lijie Xie, Xiongfei Jiang, Ruixin Ge, Christos Papavassiliou. 1-6 [doi]
• Defect tolerant in-memory analog computing with CMOS-integrated nanoscale crossbars: InvitedMingrui Jiang, Ruibin Mao, John Paul Strachan, Can Li. 1-4 [doi]
• A Column Streaming-Based Convolution Engine and Mapping Algorithm for CNN-based Edge AI AcceleratorsWeison Lin, Tughrul Arslan. 1-6 [doi]
• Active Four-Way K-Band Power Splitter for MIMO Radar LO Distribution Network in SiGe BiCMOSMaximilian Hollenbach, Andreas Werthof, Vadim Issakov. 1-4 [doi]
• Noise-aware design methodology of ultra-low-noise transimpedance amplifiersAyman Mohamed, Denis Djekic, Lars Baumgärtner, Jens Anders. 1-5 [doi]
• CNN Inference Costs Estimation on Microcontrollers: the EST Primitive-based ModelThomas Garbay, Petr Dobiás, Wilfried Dron, Pedro Lusich, Imane Khalis, Andréa Pinna 0001, Khalil Hachicha, Bertrand Granado. 1-5 [doi]
• A programmable pulse generator for atrial pacing in rats for studies on Pulmonary Arterial HypertensionFanny Pan, Emilie Avignon-Meseldzija, Fréderic Perros, Delphine Mika, David Boulate, Anthony Kolar. 1-4 [doi]
• DAC Bandwidth Tripler with 3: 1 Image-Rejection Analog MultiplexerYusuke Yokoi, Yusuke Takai, Joe Sawada, Takumi Kamo, Yohtaro Umeda, Kyoya Takano. 1-6 [doi]
• Comparative study of usefulness of FeFET, FTJ and ReRAM technology for ternary arithmeticDietmar Fey, John Reuben, Stefan Slesazeck. 1-6 [doi]
• A Low Power, Low Noise and Reconfigurable Readout Circuit for Physiological BiomarkersAngelito A. Silverio, Wen-Yaw Chung, Lean Angelo A. Silverio. 1-4 [doi]
• Experimental Measurements of an Integrated Hysteretic Controlled Regulating Buck Converter with Capacitively Coupled BootstrappingFrancarl Galea, Owen Casha, Ivan Grech, Edward Gatt, Joseph Micallef. 1-6 [doi]
• Dynamic Differential Flip-Flop without Explicit Output Latching Stage for High-Speed SoCMin-Su Kim, Wonhyun Choi, Jong Woo Kim, Chunghee Kim, Jae-Hyuk Oh, Bai-Sun Kong. 1-4 [doi]
• Feedforward control of multistability in memristor circuitsMauro Di Marco, Mauro Forti, Riccardo Moretti, Luca Pancioni, Giacomo Innocenti, Alberto Tesi. 1-6 [doi]
• 2 Fully-Passive mHBC Tag Using Intermediate Interference Modulation in 65nm CMOSAkiyoshi Tanaka, Guowei Chen, Sitong Ye, Kiichi Niitsu. 1-5 [doi]
• A PLL-Based Digital Technique for Orthogonal Correction of ADC Non-LinearityAngelo Parisi, Mario Mercandelli, Carlo Samori, Andrea L. Lacaita. 1-4 [doi]
• Management of Unpredictable Harvested-Energy IoT DevicesShima Sedighiani, Kamlesh Singh, Roel Jordans, Pieter Harpe. 1-6 [doi]
• Making Memristive Processing-in-Memory ReliableOrian Leitersdorf, Ronny Ronen, Shahar Kvatinsky. 1-6 [doi]
• 2.4 Hz-5 kHz Passband $11.8\ \mu \mathrm{V}_{\text{RMS}}$ Noise Power Neural Amplifier for Brain-Chip InterfacesElia A. Vallicelli, Andrea Baschirotto, Lorenzo Stevenazzi, Luciano Rota, Marcello De Matteis. 1-5 [doi]
• A Low-Power Biasing Scheme for the Rail-to-Rail Buffer/Amplifier ApplicationsUgur Çini. 1-4 [doi]
• Enhancing Security in the Industrial IoT Sector using Quantum ComputingSyed Farhan Ahmad, Mohamed Yassine Ferjani, Keshav Kasliwal. 1-5 [doi]
• Margolus Chemical Wave Logic Gate with Memristive Oscillatory NetworksTheodoros Panagiotis Chatzinikolaou, Iosif-Angelos Fyrigos, Vasileios G. Ntinas, Stavros Kitsios, Panagiotis Bousoulas, Michail-Antisthenis I. Tsompanas, Dimitris Tsoukalas, Andrew Adamatzky, Georgios Ch. Sirakoulis. 1-6 [doi]
• Hybrid Fixed-point/Binary Convolutional Neural Network Accelerator for Real-time Tactile ProcessingHamoud Younes, Ali Ibrahim, Mostafa Rizk, Maurizio Valle. 1-5 [doi]
• Analysis of Blackhole Attack in RPL-based 6LoWPAN Network: A Case StudyV. R. Rajasekar, S. Rajkumar. 1-6 [doi]
• Embedded acoustic fault monitoring for water pumpsIago Oliveira, Dennis Latoschewski, Christian Wiede, Martin Oettmeier, David Graurock, Dorothea Kolossa. 1-4 [doi]
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• Structured Recurrent Neural Network Model Order Reduction for SISO and SIMO LTI SystemsWaseem Raslan, Yehea Ismail. 1-6 [doi]