Abstract is missing.
- A 25-102GHz 2.81-5.64mW tunable divide-by-4 in 28nm CMOSMarco Vigilante, Patrick Reynaert. 1-4 [doi]
- A 13-MHz 68-dB SNDR CTDSM using SAB loop filter and interpolating flash quantizer with random-skip IDWA function in 90-nm CMOSChan-Hsiang Weng, Wei-Hsiang Huang, Erkan Alpman, Tsung-Hsien Lin. 1-4 [doi]
- A 1-V 9.8-ENOB 100-kS/s single-ended SAR ADC with symmetrical DAC switching technique for neural signal acquisitionChao Yuan, Kian Ann Ng, Yong Ping Xu, Shih-Cheng Yen, Nitish V. Thakor. 1-4 [doi]
- 200nA low quiescent current deep-standby mode in 28nm DC-DC buck converter for active implantable medical devicesLi-Cheng Chu, Te-Fu Yang, Ru-Yu Huang, Yi-Ping Su, Chiun-He Lin, Chin-Long Wey, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai. 1-4 [doi]
- A 1.7-2.1GHz +23dBm TX power compatible blocker tolerant FDD receiver with integrated duplexer in 28nm CMOSMatteo Ramella, Ivan Fabiano, Danilo Manstretta, Rinaldo Castello. 1-4 [doi]
- A pulse-width-adaptive active charge balancing circuit with pulse-insertion based residual charge compensation and quantization for electrical stimulation applicationsLei Yao, Peng Li, Minkyu Je. 1-4 [doi]
- A cost effective test screening method on 40-nm 4-Mb embedded SRAM for low-power MCUYoshisato Yokoyama, Yuichiro Ishii, Toshihiro Inada, Koji Tanaka, Miki Tanaka, Yoshiki Tsujihashi, Koji Nii. 1-4 [doi]
- A field-programmable lab-on-a-chip with built-in self-test circuit and low-power sensor-fusion solution in 0.35μm standard CMOS processKelvin Yi-Tse Lai, Ming-Feng Shiu, Yi-Wen Lu, Yingchieh Ho, Yu-Chi Kao, Yu-Tao Yang, Gary Wang, Keng-Ming Liu, Hsie-Chia Chang, Chen-Yi Lee. 1-4 [doi]
- A spread-spectrum clock generator with FIR-embedded binary phase detection and 1-bit high-order ΔΣ modulationNi Xu, Yiyu Shen, Sitao Lv, Woogeun Rhee, Zhihua Wang. 1-4 [doi]
- A 2.4GHz low-power SAW-less receiver for SoC coexistenceMatteo Ramella, Ivan Fabiano, Danilo Manstretta, Rinaldo Castello. 1-4 [doi]
- A digital DLL with 4-cycle lock time and 1/4 NAND-delay accuracySung Yong Kim, Xuefan Jin, Jung-Hoon Chun, Kee-Won Kwon. 1-4 [doi]
- A digital intensive circuit for low-frequency noise monitoring in 28nm CMOSBertrand Parvais, Piet Wambacq, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Ken Sawada, Kazuki Nomoto, Tetsuya Oishi, Hiroaki Ammo. 1-4 [doi]
- 0.6 V operation, 26% smaller voltage ripple, 9% energy efficient boost converter with adaptively optimized comparator bias-current for ReRAM program in low power IoT embedded applicationsTomoya Ishii, Shogo Hachiya, Sheyang Ning, Masahiro Tanaka, Ken Takeuchi. 1-4 [doi]
- A 180nm CMOS wireless transceiver by utilizing guard band for narrowband IoT applicationsZheng Song, Xiliang Liu, Zongming Jin, Xiaokun Zhao, Qiongbing Liu, Yun Yin, Baoyong Chi. 1-4 [doi]
- A cell current compensation scheme for 3D NAND FLASH memorySungwook Choi, KyuTae Park, Marco Passerini, Heejoung Park, Doyoung Kim, ChiHyun Kim, Kunwoo Park, Jinwoong Kim. 1-4 [doi]
- An energy efficient 18Gbps LDPC decoding processor for 802.11ad in 28nm CMOSMeng Li, Jan-Willem Weijers, Veerle Derudder, Ilse Vos, Maxim Rykunov, Steven Dupont, Peter Debacker, Andy Dewilde, Yanxiang Huang, Liesbet Van der Perre, Wim Van Thillo. 1-5 [doi]
- A 1V fractional-N PLL with nonlinearity-insensitive modulatorYi-Chieh Huang, Che-Fu Liang, Ping-Ying Wang. 1-4 [doi]
- A 2.89-μW clockless wireless dry-electrode ECG SoC for wearable sensorsXiaoyang Zhang, Zhe Zhang, Yongfu Li, Changrong Liu, Yongxin Guo, Yong Lian. 1-4 [doi]
- A THz signal source with integrated antenna for non-destructive testing in 28nm bulk CMOSWouter Steyaert, Patrick Reynaert. 1-4 [doi]
- Ultra low energy and area efficient charge pump with automatic clock controller in 65 nm CMOSBabak Mohammadi, Joachim Neves Rodrigues. 1-4 [doi]
- Flicker noise upconversion mechanisms in K-band CMOS VCOsQixian Shi, Davide Guermandi, Jan Craninckx, Piet Wambacq. 1-4 [doi]
- A 3.6 GHz fractional-N digital PLL using SAR-ADC-based TDC with-110 dBc/Hz in-band phase noiseZule Xu, Masaya Miyahara, Akira Matsuzawa. 1-4 [doi]
- A fully integrated self-oscillating switched-capacitor DC-DC converter for near-threshold loadsMatthew J. Turnquist, Markus Hiienkari, Jani Mäkipää, Lauri Koskinen. 1-4 [doi]
- A 0.11mm⁁2 150mW 10GBase-T transmitter in 28nm CMOS processTsun-Yuan Fan, Tsung-Yi Chou, Wen-Hua Chang. 1-4 [doi]
- A 7.6mW 2Gb/s proximity transmitter for smartphone-mirrored display applicationsDang Liu, Xiaofeng Liu, Woogeun Rhee, Zhihua Wang. 1-4 [doi]
- A fully-integrated, high-conversion-ratio and dual-output voltage boost converter with MPPT for low-voltage energy harvestingToshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa. 1-4 [doi]
- A 132dB DR readout IC with pulse width modulation for IR focal plane arraysChia-Chi Kuo, Chih-Cheng Hsieh. 1-4 [doi]
- A 12.77-MHz on-chip relaxation oscillator with digital compensation for loop delay variationJiacheng Wang, Wang Ling Goh, Xin Liu, Jun Zhou. 1-4 [doi]
- 220GHz wide-band MEMS switch in standard BiCMOS technologyY. J. Du, W. Su, S. Tolunay, L. Zhang, M. Kaynak, R. Scholz, Yong-Zhong Xiong. 1-4 [doi]
- A multi-path CMOS Hall sensor with integrated ripple reduction loopsJunfeng Jiang, Kofi A. A. Makinwa. 1-4 [doi]
- CW/FMCW/pulse radar engines for 24/26GHz multi-standard applications in 65nm CMOSLi-Yang Chen, Pen-Jui Peng, Chiro Kao, Yu-Lun Chen, Jri Lee. 1-4 [doi]
- A calibration-free time difference accumulator using two pulses propagating on a single buffer ringTomohiko Yano, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada. 1-4 [doi]
- A digital low drop-out regulator with wide operating range in a 16nm FinFET CMOS processChia-Liang Tai, Alan Roth, Eric G. Soenen. 1-4 [doi]
- A 12-bit 104-MS/s SAR ADC in 28nm CMOS for digitally-assisted wireless transmittersWei-Hsin Tseng, Wei-Liang Lee, Chang-Yang Huang, Pao-Cheng Chiu. 1-4 [doi]
- How future mobility meets IT: Cyber-physical system designs revisit semiconductor technologyHideto Hidaka. 1-4 [doi]
- A 21-Gb/s, 0.96-pJ/bit serial receiver with non-50% duty-cycle clocking 1-tap decision feedback equalizer in 65nm CMOSYang You, Sudipto Chakraborty, Rui Wang, Jinghong Chen. 1-4 [doi]
- Fast memory and storage architectures for the big data eraSangyeun Cho. 1-4 [doi]
- A fully automated verilog-to-layout synthesized ADC demonstrating 56dB-SNDR with 2MHz-BWAllen Waters, Un-Ku Moon. 1-4 [doi]
- A 32kB secure cache memory with dynamic replacement mapping in 65nm bulk CMOSBurak Erbagci, Fangfei Liu, Cagla Cakir, Nail Etkin Can Akkaya, Ruby B. Lee, Ken Mai. 1-4 [doi]
- A 2800-μm2 thermal-diffusivity temperature sensor with VCO-based readout in 160-nm CMOSJan Angevare, Lorenzo Pedala, Ugur Sonmez, Fabio Sebastiano, Kofi A. A. Makinwa. 1-4 [doi]
- A 25-Gb/s 480-mW CMOS modulator driver using area-efficient 3D inductor peakingShinsuke Nakano, Masafumi Nogawa, Hideyuki Nosaka, Akira Tsuchiya, Hidetoshi Onodera, Shunji Kimura. 1-4 [doi]
- A 1.2-GS/s 8-bit two-step SAR ADC in 65-nm CMOS with passive residue transferHai Huang, Ling Du, Yun Chiu. 1-4 [doi]
- A 24-bit multi-functional sensor analog front end employing low noise biasing technique with 8.2nV/√Hz input referred noiseMasahiko Maruyama, Shigenari Taguchi, Masafumi Yamanoue, Kunihiko Iizuka. 1-4 [doi]
- Dedicated ICs for wearable body sound monitoringZhaoyang Weng, Shaoquan Gao, Jingjing Dong, Kai Yang, Hanjun Jiang, Fule Li, Zhihua Wang, Yanqing Ning, Xinkai Chen. 1-4 [doi]
- A ZVS CMOS active diode rectifier with voltage-time-conversion delay-locked loop for wireless power transmissionHideki Shinohara, Kousuke Miyaji. 1-4 [doi]
- A wide-band divide-by-3 injection-locked frequency divider using tunable MOS resistorSheng-Lyang Jang, Wen Cheng Lai, Shune-Shing Tzeng, Ching-Wen Hsue. 1-5 [doi]
- A fully-integrated 860-GHz CMOS terahertz sensorZhao-yang Liu, Liyuan Liu, Jie Yang, Nanjian Wu. 1-4 [doi]
- An 8-channel chopper-stabilized analog front-end amplifier for EEG acquisition in 65-nm CMOSChung-Yu Wu, Chia-Shiung Ho. 1-4 [doi]
- Wavelength locking of a Si ring modulator using an integrated drop-port OMA monitoring circuitSaurabh Agarwal, Mark Ingels, Michal Rakowski, Marianna Pantouvaki, Michiel Steyaert, Philippe P. Absil, Joris Van Campenhout. 1-4 [doi]
- An undershoot/overshoot-suppressed current-mode buck converter with voltage-setting control for type-II compensatorPai-Yi Wang, Szu-Yu Huang, Kuan-Yu Fang, Tai-Haur Kuo. 1-4 [doi]
- A 28-Gb/s 4.5-pJ/bit transceiver with 1-tap decision feedback equalizer in 28-nm CMOSHiroki Miyaoka, Futoshi Terasawa, Masahiro Kudo, Hideki Kano, Atsushi Matsuda, Noriaki Shirai, Shigeaki Kawai, Tomoyuki Arai, Yutaka Ide, Kazuhiro Terashima, Hirohito Higashi, Tomokazu Higuchi, Naoaki Naka. 1-4 [doi]
- A digital bang-bang phase-locked loop with bandwidth calibrationChi-Huan Chiang, Chang-Cheng Huang, Shen-Iuan Liu. 1-4 [doi]
- A 0.57°/h bias instability 0.067°/√h angle random walk MEMS gyroscope with CMOS readout circuitYang Zhao, Jian Zhao, Guo Ming Xia, An Ping Qiu, Yan Su, Xi Wang, Yong Ping Xu. 1-4 [doi]
- A 1.74mW/GHz 0.11-2.5GHz fast-locking, jitter-reducing, 180° phase-shift digital DLL with a window phase detector for LPDDR4 memory controllersJoo-Hyung Chae, Gi-Moon Hong, Jihwan Park, Mino Kim, Hyeongjun Ko, Woo-Yeol Shin, Hankyu Chi, Deog Kyoon Jeong, Suhwan Kim. 1-4 [doi]
- A 9-bit 1.8-GS/s pipelined ADC using linearized open-loop amplifiersLilan Yu, Masaya Miyahara, Akira Matsuzawa. 1-4 [doi]
- A 550-2260MHz self-adjustable clock generator in 28nm FDSOIJaehwa Kwak, Borivoje Nikolic. 1-4 [doi]
- A 7.6 mW, 214-fs RMS jitter 10-GHz phase-locked loop for 40-Gb/s serial link transmitter based on two-stage ring oscillator in 65-nm CMOSWoo-Rham Bae, Haram Ju, Kwanseo Park, Sung-Yong Cho, Deog Kyoon Jeong. 1-4 [doi]
- Word-parallel associative memory for k-nearest-neighbor with configurable storage space of reference vectorsFengwei An, Keisuke Mihara, Shogo Yamazaki, Lei Chen, Hans Jürgen Mattausch. 1-4 [doi]
- A 1.9nJ/pixel embedded deep neural network processor for high speed visual attention in a mobile vision recognition SoCInjoon Hong, Seongwook Park, Junyoung Park, Hoi-Jun Yoo. 1-4 [doi]
- A 3.52 Gb/s mmWave baseband with delayed decision feedback sequence estimation in 40 nmNicholas Preyss, Christian Senning, Andreas Burg, Wei-Chang Liu, Chun-Yi Liu, Shyh-Jye Jou. 1-4 [doi]
- A 7T-SRAM with data-write technique by capacitive couplingDaisaburo Takashima, Masato Endo, Kazuhiro Shimazaki, Manabu Sai, Masaaki Tanino. 1-4 [doi]
- A 400-MHz wireless neural signal processing IC with 625× on-chip data reduction and reconfigurable BFSK/QPSK transmitter based on sequential injection lockingKok-Hin Teng, Tong Wu, Zhi Yang, Chun-Huat Heng, Xiayun Liu. 1-4 [doi]
- 99.4% peak audio signal recovery rate and ultra-low 0.32dB matching error with 10Hz high resolution filter fitting wearable aided speech compensation systemYen-Ting Lin, Shin-Chi Lai, Shin-Hao Chen, Shen-Yu Peng, Ke-Horng Chen, Sheng Kang, Kevin Cheng, Ying-Hsi Lin, Chen-Chih Huang, Chao-Cheng Lee. 1-4 [doi]
- A folding dickson-based fully integrated wide input range capacitive DC-DC converter achieving Vout/2-resolution and 71% average efficiencyAthanasios Sarafianos, Joachim Pichler, Christoph Sandner, Michiel Steyaert. 1-4 [doi]
- A single-channel 10-b 400-MS/s 8.7-mW pipeline ADC in a 90-nm technologyChen-Kai Hsu, Tai-Cheng Lee. 1-4 [doi]
- A 934MHz 9Gb/s 3.2pJ/b/iteration charge-recovery LDPC decoder with in-package inductorsTai-Chuan Ou, Zhengya Zhang, Marios C. Papaefthymiou. 1-4 [doi]
- A frequency doubling two-path phased-array FMCW radar transceiver in 65nm CMOSHaikun Jia, Baoyong Chi, Lixue Kuang, Wei Zhu, Zhiping Wang, Feng Ma, Zhihua Wang. 1-4 [doi]
- A mixed-signal ASIC for triple-chamber cardiac pacemakers with heart resistance measurementJie Zhang, Hong Zhang, Ruizhi Zhang, Jiangtao Xu, Yang Zhao, Mudan Zhang, Jia Li. 1-4 [doi]
- A 95% accurate EEG-connectome processor for a mental health monitoring systemHyunki Kim, Kiseok Song, Taehwan Roh, Hoi-Jun Yoo. 1-4 [doi]
- A 89fJ-FOM 6-bit 3.4GS/s flash ADC with 4x time-domain interpolationJianwei Liu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. 1-4 [doi]
- A K-band pulse radar transceiver with highly digital closed-loop time-of-flight measurementYong Wang, Hui Wu. 1-4 [doi]
- A 5.2-GHz full-integrated RF front-end by T/R switch, LNA, and PA co-design with 3.2-dB NF and +25.9-dBm output powerHuan-Sheng Chen, Hung-Yu Tsai, Li-Xuan Chuo, Yu-Kai Tsai, Liang-Hung Lu. 1-4 [doi]
- A μNMR CMOS transceiver using a butterfly-coil input for integration with a digital microfluidic device inside a portable magnetKa-Meng Lei, Pui-In Mak, Man Kay Law, Rui Paulo Martins. 1-4 [doi]
- A 130dB PSRR, 108dB DR and 95dB SNDR, ground-referenced audio decoder with PSRR-enhanced load-adaptive Class-G 16Ohm headphone amplifiersShon-Hang Wen, Chien-Ming Chen, Cheng-Chung Yang, Chieh-Hung Chen, Jia-Feng Jiang, Keng-Jan Hsiao, Cheng-Yu Chien. 1-4 [doi]
- Silicon systems security and building a root of trustRonald Perez. 1-4 [doi]
- Standing wave based clock distribution technique with application to a 10 × 11 Gbps transceiver in 28 nm CMOSGuansheng Li, Wooram Lee, Delong Cui, Bo Zhang, Afshin Momtaz, Jun Cao. 1-4 [doi]
- Reconfigurable self-timed regenerators for wide-range voltage scaled interconnectJingcheng Wang, Nathaniel Ross Pinckney, David Blaauw, Dennis Sylvester. 1-4 [doi]
- Pseudo AC current synthesizer and DC offset-corrected technique in constant-on-time control buck converter for werable electronicsJui-Che Su, Wei-Chung Chen, Wei-Tin Lin, Ying-Wei Chou, Meng-Wei Chien, Chin-Long Wey, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Shian-Ru Lin, Tsung-Yen Tsai. 1-4 [doi]
- A 1V 9pA analog front end with compressed sensing for electrocardiogram monitoringLiang-Ting Kuo, Chun-Chih Hou, Meng-Hsuan Wu, Yun-Shiang Shu. 1-4 [doi]
- Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCsHyeon-June Kim, Sun-Il Hwang, Ji-Wook Kwon, Dong-Hwan Jin, Byoung Soo Choi, Sang-Gwon Lee, Jong Ho Park, Jang-Kyoo Shin, Seung-Tak Ryu. 1-4 [doi]
- A fully isolated delta-sigma ADC for shunt based current sensingZhichao Tan, Mick Mueck, Xiao Hong Du, Larry Getzin, Michael Guidry, Flow Zhao, Baoxing Chen. 1-4 [doi]
- A 0.6 V-2.4 V input, fully integrated reconfigurable switched-capacitor DC-DC converter for energy harvesting sensor tagsMahmoud Saadat, Boris Murmann. 1-4 [doi]
- 124-GHz CMOS quadrature voltage-controlled oscillator with fundamental injection lockingKyoya Takano, Kosuke Katayama, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima. 1-4 [doi]
- A 0.45 V, 15.6 nW MOSFET-only sub-threshold voltage reference with no amplifiersYutao Wang, Zhangming Zhu, Jiaojiao Yao, Yintang Yang. 1-4 [doi]
- A 20 Gb/s 0.4 pJ/b energy-efficient transmitter driver architecture utilizing constant GmGyu-Seob Jeong, Sang-Hyeok Chu, Yoonsoo Kim, Sungchun Jang, SungWoo Kim, Woo-Rham Bae, Sung-Yong Cho, Haram Ju, Deog Kyoon Jeong. 1-4 [doi]
- IC challenges in 5GLeo Li. 1-4 [doi]