Alexander V. Rylyakov - researchr alias

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Viewing Publication 1 - 34 from 34

2024

2023

A Dual-Polarization Silicon-Photonic Coherent Receiver Front-End Supporting 528 Gb/s/WavelengthAbdelrahman H. Ahmed, Leonardo Vera, Lorenzo Iotti, Ruizhi Shi, Sudip Shekhar, Alexander V. Rylyakov. jssc, 58(8):2202-2213, 2023. [doi]

2020

A Dual-Polarization Silicon-Photonic Coherent Transmitter Supporting 552 Gb/s/wavelengthAbdelrahman H. Ahmed, Abdellatif Elmoznine, Daihyun Lim, Yangjin Ma, Alexander V. Rylyakov, Sudip Shekhar. jssc, 55(9):2597-2608, 2020. [doi]

2019

2018

A 34Gbaud Linear Transimpedance Amplifier with Automatic Gain Control for 200Gb/s DP-16QAM Optical Coherent ReceiversMostafa Gamal Ahmed, Tam N. Huynh, Christopher Williams 0003, Yong Wang 0026, Rahul Shringarpure, Reza Yousefi, Jose Roman, Noam Ophir, Alexander V. Rylyakov. ofc 2018: 1-3 [doi]

2015

A 4-λ, 40Gb/s/λ bandwidth extension of multimode fiber in the 850nm rangeDaniel M. Kuchta, Tam N. Huynh, Fuad E. Doany, Alexander V. Rylyakov, Clint L. Schow, Petar K. Pepeljugoski, D. Gazula, E. Shaw, Jim Tatum. ofc 2015: 1-3 [doi]

A WDM-Compatible 4 × 32-Gb/s CMOS-driven electro-absorption modulator arrayB. G. Lee, Renato Rimolo-Donadio, Alexander V. Rylyakov, Jonathan E. Proesel, John F. Bulzacchelli, Christian W. Baks, Mounir Meghelli, Clint L. Schow, Anand Ramaswamy, J. E. Roth, J.-H. Shin, B. Koch, Daniel K. Sparacin, Gregory A. Fish. ofc 2015: 1-3 [doi]

A WDM 4×28Gbps integrated silicon photonic transmitter driven by 32nm CMOS driver ICsAnand Ramaswamy, J. E. Roth, Erik J. Norberg, R. S. Guzzon, J.-H. Shin, J. T. Imamura, B. R. Koch, Daniel K. Sparacin, Gregory A. Fish, B. G. Lee, Renato Rimolo-Donadio, Christian W. Baks, Alexander V. Rylyakov, Jonathan E. Proesel, Mounir Meghelli, Clint L. Schow. ofc 2015: 1-3 [doi]

High speed circuits for short reach optical communicationsAlexander V. Rylyakov. ofc 2015: 1-34 [doi]

A 25 Gb/s burst-mode receiver for low latency photonic switch networksAlexander V. Rylyakov, Jonathan E. Proesel, Sergey V. Rylov, B. Lee, John F. Bulzacchelli, Abhijeet Ardey, Clint Schow, Mounir Meghelli. ofc 2015: 1-3 [doi]

2014

Exploring the limits of high-speed receivers for multimode VCSEL-based optical linksNicolas Dupuis, Daniel M. Kuchta, Fuad E. Doany, Alexander V. Rylyakov, Jonathan E. Proesel, Christian W. Baks, Clint L. Schow, S. Luong, C. Xie, L. Wang, S. Huang, K. Jackson, N. Y. Li. ofc 2014: 1-3 [doi]

30Gbps optical link utilizing heterogeneously integrated III-V/Si photonics and CMOS circuitsNicolas Dupuis, B. G. Lee, Jonathan E. Proesel, Alexander V. Rylyakov, Renato Rimolo-Donadio, Christian W. Baks, Clint L. Schow, A. Ramaswamy, J. E. Roth, R. S. Guzzon, B. Koch, Daniel K. Sparacin, Gregory A. Fish. ofc 2014: 1-3 [doi]

Low power CMOS-driven 1060 nm multimode optical linkJean Benoit Héroux, Tomofumi Kise, Masaki Funabashi, Toyohiro Aoki, Clint Schow, Alexander V. Rylyakov, Shigeru Nakagawa. ofc 2014: 1-3 [doi]

64Gb/s transmission over 57m MMF using an NRZ modulated 850nm VCSELDaniel M. Kuchta, Alexander V. Rylyakov, Clint L. Schow, Jonathan E. Proesel, Christian W. Baks, P. Westbergh, J. S. Gustavsson, A. Larsson. ofc 2014: 1-3 [doi]

2013

Monolithically integrated silicon nanophotonics receiver in 90nm CMOS technology nodeSolomon Assefa, Huapu Pan, Steven Shank, William M. J. Green, Alexander V. Rylyakov, Clint Schow, Marwan Khater, Swetha Kamlapurkar, Edward Kiewra, Carol Reinholm, Teya Topuria, Philip Rice, Christian W. Baks, Yurii A. Vlasov. ofc 2013: 1-3 [doi]

A 56.1Gb/s NRZ modulated 850nm VCSEL-based optical linkDaniel M. Kuchta, Clint L. Schow, Alexander V. Rylyakov, Jonathan E. Proesel, Fuad E. Doany, Christian W. Baks, B. H. Hamel-Bissell, Chris Kocot, L. Graham, R. Johnson, Gary Landry, E. Shaw, A. MacInnes, Jim Tatum. ofc 2013: 1-3 [doi]

Four- and eight-port photonic switches monolithically integrated with digital CMOS logic and driver circuitsBenjamin G. Lee, Alexander V. Rylyakov, William M. J. Green, Solomon Assefa, Christian W. Baks, Renato Rimolo-Donadio, Daniel M. Kuchta, Marwan H. Khater, Tymon Barwicz, Carol Reinholm, Edward Kiewra, Steven M. Shank, Clint L. Schow, Yurii A. Vlasov. ofc 2013: 1-3 [doi]

Correction to "A Linearized, Low Phase Noise VCO Based 25 GHz PLL With Autonomic Biasing"Bodhisatwa Sadhu, Mark A. Ferriss, Arun S. Natarajan 0001, Soner Yaldiz, Jean-Olivier Plouchart, Alexander V. Rylyakov, Alberto Valdes-Garcia, Benjamin D. Parker, Aydin Babakhani, Scott K. Reynolds, Xin Li 0001, Lawrence T. Pillage, Ramesh Harjani, José A. Tierno, Daniel J. Friedman. jssc, 48(6):1539, June 2013. [doi]

2012

Ultra-Low-Power 10 to 285 Gb/s CMOS-Driven VCSEL-Based Optical Links [Invited]Jonathan E. Proesel, Benjamin G. Lee, Alexander V. Rylyakov, Christian W. Baks, Clint L. Schow. jocnet, 4(11), 2012. [doi]

2009

Low-Power 16 x 10 Gb/s Bi-Directional Single Chip CMOS Optical Transceivers Operating at ≪ 5 mW/Gb/s/linkClint L. Schow, Fuad E. Doany, Chen Chen, Alexander V. Rylyakov, Christian W. Baks, Daniel M. Kuchta, Richard A. John, Jeffrey A. Kash. jssc, 44(1):301-313, 2009. [doi]

2008

A Wide Power Supply Range, Wide Tuning Range, All Static CMOS All Digital PLL in 65 nm SOIJosé A. Tierno, Alexander V. Rylyakov, Daniel J. Friedman. jssc, 43(1):42-51, 2008. [doi]

2007

A 6.0-mW 10.0-Gb/s Receiver With Switched-Capacitor Summation DFEAzita Emami-Neyestanak, Aida Varzaghani, John F. Bulzacchelli, Alexander V. Rylyakov, Chih-Kong Ken Yang, Daniel J. Friedman. jssc, 42(4):889-896, 2007. [doi]

A 5-mW 6-Gb/s Quarter-Rate Sampling Receiver With a 2-Tap DFE Using Soft DecisionsJackie Koon Lun Wong, Alexander V. Rylyakov, Chih-Kong Ken Yang. jssc, 42(4):881-888, 2007. [doi]

2006

2005

A 10-Gb/s two-dimensional eye-opening monitor in 0.13-/spl mu/m standard CMOSBehnam Analui, Alexander V. Rylyakov, Sergey V. Rylov, Mounir Meghelli, Ali Hajimiri. jssc, 40(12):2689-2699, 2005. [doi]

2003

SiGe BiCMOS integrated circuits for high-speed serial communication linksDaniel J. Friedman, Mounir Meghelli, Benjamin D. Parker, Jungwook Yang, Herschel A. Ainspan, Alexander V. Rylyakov, Young Hoon Kwark, Mark B. Ritter, Lei Shan, Steven J. Zier, Michael Sorna, Mehmet Soyuer. ibmrd, 47(2-3):259-282, 2003. [doi]

45-Gb/s SiGe BiCMOS PRBS generator and PRBS checker [pseudorandom bit sequence]Seongwon Kim, Mohit Kapur, Mounir Meghelli, Alexander V. Rylyakov, Young Hoon Kwark, Daniel J. Friedman. cicc 2003: 313-316 [doi]

A 0.18-μm SiGe BiCMOS receiver and transmitter chipset for SONET OC-768 transmission systemsMounir Meghelli, Alexander V. Rylyakov, Steven Zier, Michael Sorna, Daniel J. Friedman. jssc, 38(12):2147-2154, 2003. [doi]

A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loopWoogeun Rhee, Herschel A. Ainspan, Sergey V. Rylov, Alexander V. Rylyakov, Michael P. Beakes, Daniel J. Friedman, Sudhir M. Gowda, Mehmet Soyuer. cicc 2003: 81-84 [doi]

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