Ashok Jagannathan - researchr alias

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Viewing Publication 1 - 12 from 12

2017

ScaleDeep: A Scalable Compute Architecture for Learning and Evaluating Deep NetworksSwagath Venkataramani, Ashish Ranjan, Subarno Banerjee, Dipankar Das 0002, Sasikanth Avancha, Ashok Jagannathan, Ajaya Durg, Dheemanth Nagaraj, Bharat Kaul, Pradeep Dubey, Anand Raghunathan. isca 2017: 13-26 [doi]

2014

Array scalarization in high level synthesisPreeti Ranjan Panda, Namita Sharma, Arun Kumar Pilania, Gummidipudi Krishnaiah, Sreenivas Subramoney, Ashok Jagannathan. aspdac 2014: 622-627 [doi]

2007

Accelerating Sequential Applications on CMPs Using Core SpillingJason Cong, Guoling Han, Ashok Jagannathan, Glenn Reinman, Krzysztof Rutkowski. tpds, 18(8):1094-1107, 2007. [doi]

2006

An automated design flow for 3D microarchitecture evaluationJason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Reinman, Jie Wei, Yan Zhang. aspdac 2006: 384-389 [doi]

2005

2003

Microarchitecture evaluation with physical planningJason Cong, Ashok Jagannathan, Glenn Reinman, Michail Romesis. dac 2003: 32-35 [doi]

2002

A fast algorithm for context-aware buffer insertionAshok Jagannathan, Sung-Woo Hur, John Lillis. todaes, 7(1):173-188, 2002. [doi]

2000

Timing-driven maze routingSung-Woo Hur, Ashok Jagannathan, John Lillis. tcad, 19(2):234-241, 2000. [doi]

A fast algorithm for context-aware buffer insertionAshok Jagannathan, Sung-Woo Hur, John Lillis. dac 2000: 368-373 [doi]

1999

Timing driven maze routingSung-Woo Hur, Ashok Jagannathan, John Lillis. ispd 1999: 208-213 [doi]

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