Gianluca Boselli - researchr alias

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Viewing Publication 1 - 13 from 13

2023

Impact of Thin-oxide Gate on the On-Resistance of HV-PNP Under ESD StressM. Monishmurali, Nagothu Karmel Kranthi, Gianluca Boselli, Mayank Shrivastava. irps 2023: 1-5 [doi]

TCAD study of the Holding-Voltage Modulation in Irradiated SCR-LDMOS for HV ESD ProtectionLaura Zunarelli, Luigi Balestra, Susanna Reggiani, Raj Sankaralingam, Mariano Dissegna, Gianluca Boselli. irps 2023: 1-6 [doi]

2022

Effect of Source & Drain Side Abutting on the Low Current Filamentation in LDMOS-SCR DevicesM. Monishmurali, Nagothu Karmel Kranthi, Gianluca Boselli, Mayank Shrivastava. irps 2022: 6 [doi]

TCAD Investigation of Power-to-Failure Evaluation for Ultrafast Events in BJT-based ESD Protection CellsLaura Zunarelli, Susanna Reggiani, Elena Gnani, Raj Sankaralingam, Mariano Dissegna, Gianluca Boselli. irps 2022: 6 [doi]

2020

Design Insights to Address Low Current ESD Failure and Power Scalability Issues in High Voltage LDMOS-SCR DevicesNagothu Karmel Kranthi, B. Sampath Kumar, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava. irps 2020: 1-5 [doi]

How to Achieve Moving Current Filament in High Voltage LDMOS Devices: Physical Insights & Design Guidelines for Self-Protected ConceptsNagothu Karmel Kranthi, Chirag Garg, B. Sampath Kumar, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava. irps 2020: 1-6 [doi]

2019

Physical Insights into the Low Current ESD Failure of LDMOS-SCR and its Implication on Power ScalabilityNagothu Karmel Kranthi, B. Sampath Kumar, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava. irps 2019: 1-5 [doi]

Current Filament Dynamics Under ESD Stress in High Voltage (Bidirectional) SCRs and It's Implications on Power Law BehaviorNagothu Karmel Kranthi, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava. irps 2019: 1-5 [doi]

2016

Improved inductive-system-level IEC ESD performance for automotive applications using mutual ballasted ESD protection techniqueAkram A. Salman, Farzan Farbiz, Ann Concannon, Hal Edwards, Gianluca Boselli. mr, 57:47-52, 2016. [doi]

2012

Electronic design automation (EDA) solutions for ESD-robust design and verificationMichael G. Khazhinsky, Shuqing Cao, Harald Gossner, Gianluca Boselli, Melanie Etherton. cicc 2012: 1-8 [doi]

2006

Gate oxide failures due to anomalous stress from HBM ESD testersCharvaka Duvvury, Robert Steinhoff, Gianluca Boselli, Vijay Reddy, Hans Kunz, Steve Marum, Roger Cline. mr, 46(5-6):656-665, 2006. [doi]

2005

A MOSFET power supply clamp with feedback enhanced triggering for ESD protection in advanced CMOS technologiesJeremy C. Smith, Gianluca Boselli. mr, 45(2):201-210, 2005. [doi]

2001

Investigations on double-diffused MOS transistors under ESD zap conditionsGianluca Boselli, Stan Meeuwsen, Ton J. Mouthaan, Fred G. Kuper. mr, 41(3):395-405, 2001. [doi]

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