Table of Contents

• V-Ramp test and gate oxide screening under the "lucky" defect modelKin P. Cheung. 1-4 [doi]
• The Correct Hot Carrier Degradation ModelJoseph B. Bernstein, Emmanuel Bender, Alain Bensoussan 0002. 1-5 [doi]
• Innovative reliability solution for WLCSP packagesKlodjan Bidaj, Lauriane Gateka, Benjamin Ardaillon. 1-4 [doi]
• Analysis of TDDB lifetime projection in low thermal budget HfO2/SiO2 stacks for sequential 3D integrationsAndrea Vici, Robin Degraeve, Philippe J. Roussel, Jacopo Franco, Ben Kaczer, Ingrid De Wolf. 1-7 [doi]
• Consideration on the extrapolation of the low insulator field TDDB in 4H-SiC power MOSFETsPatrick Fiorenza, Francesco Cordiano, Mario Santo Alessandrino, Alfio Russo, Edoardo Zanetti, Mario Saggio, C. Bongiorno, Filippo Giannazzo, Fabrizio Roccaforte. 1-4 [doi]
• Effect of Frequency on Reliability Of High-K MIM CapacitorsX. Federspiel, A. Griffon, M. Barlas, P. Lamontagne. 1-6 [doi]
• Unique Dependence of the Breakdown Behavior of Normally-OFF Cascode AlGaN/GaN HEMTs on Carrier Transport Through the Carbon-Doped GaN BufferVipin Joshi, Sayak Dutta Gupta, Rajarshi Roy Chaudhuri, Mayank Shrivastava. 1-4 [doi]
• Impact of gate stack processing on the hysteresis of 300 mm integrated WS2 FETsL. Panarella, Ben Kaczer, Quentin Smets, Devin Verreck, Tom Schram, Daire Cott, Dennis Lin, Stanislav Tyaginov, I. Asselberghs, Cesar J. Lockhart de la Rosa, Gouri Sankar Kar, Valeri Afanas'ev. 1-6 [doi]
• Impact of Thin-oxide Gate on the On-Resistance of HV-PNP Under ESD StressM. Monishmurali, Nagothu Karmel Kranthi, Gianluca Boselli, Mayank Shrivastava. 1-5 [doi]
• Localized thermal effects in Gate-all-around devicesColin Landon, Lei Jiang, Daniel Pantuso, Inanc Meric, Kam Komeyli, Jeffrey Hicks, Daniel Schroeder. 1-5 [doi]
• Decomposition of Vertical and Lateral Charge Loss in Long-term Retention of 3-D NAND Flash MemoryJounghun Park, Gilsang Yoon, Donghyun Go, Donghwi Kim, Ukju An, Jongwoo Kim, Jungsik Kim, Jeong-Soo Lee. 1-4 [doi]
• The Effects of $\gamma$ Radiation-Induced Trapped Charges on Single Event Transient in DSOI TechnologyYuchong Wang, Siyuan Chen, Fanyu Liu, Bo Li 0051, Jiangjiang Li, Yang Huang, Tiexin Zhang, Xu Zhang, Zhengsheng Han, Tianchun Ye 0001, Jing Wan. 1-6 [doi]
• Effect of Precursor Defects in Oxide Layer on Ionizing Radiation Damage of Bipolar Junction TransistorsFengkai Liu, Lei Wu, Kai Wang, Enhao Guan, Xingji Li. 1-6 [doi]
• Towards a Universal Model of Dielectric BreakdownAndrea Padovani, Paolo La Torraca, Jack Strand, Alexander L. Shluger, Valerio Milo, Luca Larcher. 1-8 [doi]
• Estimation of SOH Degradation of Coin Cells Subjected to Accelerated Life Cycling with Randomized Cycling Depths and C-RatesPradeep Lall, Ved Soni, Guneet Sethi, Kok Yiang. 1-10 [doi]
• TCAD study of the Holding-Voltage Modulation in Irradiated SCR-LDMOS for HV ESD ProtectionLaura Zunarelli, Luigi Balestra, Susanna Reggiani, Raj Sankaralingam, Mariano Dissegna, Gianluca Boselli. 1-6 [doi]
• Comprehensive study on prediction of endurance properties from breakdown voltage in high-reliable STT-MRAMH. Sato, H. M. Shin, H. Jung, S. W. Lee, H. Bae, H. Kwon, K. H. Ryu, W. C. Lim, Y. S. Han, J.-H. Jeong, J. M. Lee, D. S. Kim, K. Lee, J. H. Lee, J. H. Park, Y. J. Song, Y. Ji, B. I. Seo, J. W. Kim, H. H. Kim. 1-5 [doi]
• Machine Learning Based V-ramp VBD Predictive Model Using OCD-measured Fab Parameters for Early Detection of MOL Reliability RiskSungMan Rhee, Hyunjin Kim, Sangku Park, Taiki Uemura, Yuchul Hwang, Seungjin Choo, Jinju Kim, Hwasung Rhee, Shin-Young Chung. 1-4 [doi]
• Analysis of SSD Acoustic Noise Generation Mechanism depending on NAND operationYusuf Cinar, Junghoon Kim, Eunho Oh, Sungki Lee, Changsik Kwon, Jonggyu Park. 1-4 [doi]
• Backside Failure Analysis of IGBT power devices assembled in STPAKElisa Vitanza, C. Realmuto, M. La Marca, L. Torrisi. 1-4 [doi]
• Carrot-like crystalline defects on the 4H-SiC powerMOSFET yield and reliabilityBeatrice Carbone, Mario Santo Alessandrino, Alfio Russo, Elisa Vitanza, Filippo Giannazzo, Patrick Fiorenza, Fabrizio Roccaforte. 1-5 [doi]
• Depassivation of Traps in the Polysilicon Channel of 3D NAND Flash Arrays: Impact on Cell High-Temperature Data RetentionMattia Giulianini, Gerardo Malavena, Luca Chiavarone, Alessandro S. Spinelli, Christian Monzio Compagnoni. 1-6 [doi]
• ESD Avalanche Diodes Degradation in EOS RegimeHossein Sarbishaei, Vladislav A. Vashchenko. 1-4 [doi]
• Industrial approach to the chip and package reliability of SiC MOSFETs (Invited)Elena Mengotti, Enea Bianda, David Baumann, Gerd Schlottig, Francisco Canales. 1-6 [doi]
• Reliable FeFET-based Neuromorphic Computing through Joint Modeling of Cycle-to-Cycle Variability, Device-to-Device Variability, and Domain StochasticitySimon Thomann, Albi Mema, Kai Ni 0004, Hussam Amrouch. 1-5 [doi]
• SiC MOSFET threshold voltage stability during power cycling testing and the impact on the result interpretationChristian Schwabe, Xing Liu, Tobias N. Wassermann, Paul Salmen, Thomas Basler. 1-6 [doi]
• A Physical Unclonable Function Leveraging Hot Carrier Injection AgingRachael J. Parker, Jyothi Bhaskarr Velamala, Kuan-Yueh James Shen, David Johnston, Yao-Feng Chang, Stephen M. Ramey, Siang-jhih Sean Wu, Padma Penmatsa. 1-5 [doi]
• Reliability of GaN MOSc-HEMTs: From TDDB to Threshold Voltage Instabilities (Invited)William Vandendaele, Camille Leurquin, R. Lavieville, Marie-Anne Jaud, Abygaël Viey, Romain Gwoziecki, B. Mohamad, E. Nowak, A. Constant, Ferdinando Iucolano. 1-8 [doi]
• Demonstration on Warpage Estimation Approach Utilized in Fan-Out Panel-Level Packaging Enabled by Multi-Scale Process-Oriented SimulationChi-Wei Wang, Che-Pei Chang, Chang-Chun Lee. 1-4 [doi]
• Characterizing BTI and HCD in 1.2V 65nm CMOS Oscillators made from Combinational Standard Cells and Processor Logic PathsVictor M. van Santen, Jose M. Gata-Romero, Juan Núñez 0002, Rafael Castro-López, Elisenda Roca, Hussam Amrouch. 1-6 [doi]
• Lifetime Modeling of the 4H-SiC MOS Interface in the HTRB Condition Under the Influence of Screw DislocationsEdward Van Brunt, Daniel J. Lichtenwalner, J. H. Park, Satyaki Ganguly, J. W. McPherson. 1-4 [doi]
• Soft- and Hard-Error Radiation Reliability of 228 KB $3\mathrm{T}+1\mathrm{C}$ Oxide Semiconductor MemoryH. Takahashi, Y. Okamoto, Toshiki Hamada, Y. Komura, S. Watanabe, K. Tsuda, H. Sawai, Takanori Matsuzaki, Yoshinori Ando, Tatsuya Onuki, H. Kunitake, Shunpei Yamazaki, D. Kobayashi, A. Ikuta, Takahiro Makino, Takeshi Ohshima. 1-6 [doi]
• Collector Engineering of ESD PNP in BCD TechnologiesYujie Zhou, David LaFonteese, Elyse Rosenbaum. 1-6 [doi]
• Polarity Dependency and 1/E Model of Gate Oxide TDDB Degradation in 3D NANDLina Qu, Shengwei Yang, Ming He, Rui Fang, XiaoJuan Zhu, Kun Han, Yi He. 1-4 [doi]
• A detailed comparison of various off-state breakdown methodologies for scaled Tri-gate technologiesK. Joshi, D. Nminibapiel, M. Ghoneim, D. Ali, R. Ramamurthy, L. Pantisano, Inanc Meric, Stephen Ramey. 1-6 [doi]
• A New Methodology to Precisely Induce Wake-Up for Reliability Assessment of Ferroelectric DevicesTiang Teck Tan, Yu-Yun Wang, Joel Tan, Tian-Li Wu, Nagarajan Raghavan, Kin Leong Pey. 1-7 [doi]
• Experimental Study of Self-Heating Effect in InGaAs HEMTs for Quantum Technologies Down to 10KF. Serra Di Santa Maria, Francis Balestra, Christoforos G. Theodorou, Gérard Ghibaudo, Cezar B. Zota, Eunjung Cha. 1-4 [doi]
• RF long term aging behavior and reliability in 22FDX WiFi Power Amplifier designs for 5G applicationsP. Srinivasan 0002, J. Lestage, Shafi Syed, X. Hui, Stephen Moss, Oscar D. Restrepo, Oscar H. Gonzalez, Y. Chen, T. McKay, Anirban Bandyopadhyay, Ned Cahoon, Fernando Guarin, Byoung Min, Martin Gall, S. Ludvik. 1-6 [doi]
• Impact of Design and Process on Alpha-Induced SER in 4 nm Bulk-FinFET SRAMTaiki Uemura, Byungjin Chung, Shin-Young Chung, Seungbae Lee, Yuchul Hwang, Sangwoo Pae. 1-8 [doi]
• Thermomigration-induced void formation in Cu-interconnects - Assessment of main physical parametersYouqi Ding, O. Varela Pedreira, Melina Lofrano, Houman Zahedmanesh, T. Chavez, Hosain Farr, Ingrid De Wolf, Kris Croes. 1-7 [doi]
• A Unified Framework to Explain Random Telegraph Noise Complexity in MOSFETs and RRAMsSara Vecchi, Paolo Pavan, Francesco Maria Puglisi. 1-6 [doi]
• Towards the understanding of ferroelectric-intrinsic variability and reliability issues on MCAMYishan Wu, Puyang Cai, Zhiwei Liu, Pengpeng Ren, Zhigang Ji. 1-6 [doi]
• Thermal Induced Retention Degradation of RRAM-based Neuromorphic Computing ChipsAwang Ma, Bin Gao 0006, Xing Mou, Peng Yao, Yiwei Du, Jianshi Tang, He Qian, Huaqiang Wu. 1-6 [doi]
• Interval time dependent wake-up effect of HfZrO ferroelectric capacitorYaru Ding, Xinwei Yu, Chu Yan, Zeping Weng, Yiming Qu, Yi Zhao. 1-4 [doi]
• Monolithic 3D Integrated BEOL Dual-Port Ferroelectric FET to Break the Tradeoff Between the Memory Window and the Ferroelectric ThicknessOm Prakash 0007, Kai Ni 0004, Hussam Amrouch. 1-4 [doi]
• Advanced Methods of Detecting Physical Damages in Packaging and BEOL InterconnectsJorge Mendoza, Jimmy-Bao Le, Choong-Un Kim, Hung-Yun Lin. 1-6 [doi]
• Short-Flow Compatible Wafer-Level Reliability Assessment and Monitoring for PCM Embedded Non-Volatile MemoryMeindert Lunenborg, Tomasz Brozek, Laura Lorenzi, Christoph Dolainsky, Violet Liu, Xiaoyi Feng. 1-6 [doi]
• The Role of Mobility Degradation in the BTI-Induced RO Aging in a 28-nm Bulk CMOS Technology: (Student paper)D. Sangani, Javier Diaz-Fortuny, Erik Bury, Ben Kaczer, Georges G. E. Gielen. 1-6 [doi]
• Reliability Improvement with Optimized BEOL Process in Advanced DRAMJ. H. Lee, B. W. Woo, Y. M. Lee, N. H. Lee, S.-H. Lee, Y. S. Lee, H. S. Kim, S. Pae. 1-4 [doi]
• Scaling Trends and the Effect of Process Variations on the Soft Error Rate of advanced FinFET SRAMsBalaji Narasimham, H. Luk, C. Paone, A-R. Montoya, T. Riehle, Mike Smith, Liming Tsau. 1-4 [doi]
• Nickel Silicide Electromigration on Micro Ring Modulators for Silicon Photonics TechnologyBrian T. McGowan, Michal Rakowski, Seungman Choi. 1-8 [doi]
• Development and Product Reliability Characterization of Advanced High Speed 14nm DDR5 DRAM with On-die ECCS. Lee, N. H. Lee, K. W. Lee, J. H. Kim, J. H. Jin, Y. S. Lee, Y. C. Hwang, H. S. Kim, S. Pae. 1-4 [doi]
• Reliability Characterization of HBM featuring $\text{HK}+\text{MG}$ Logic Chip with Multi-stacked DRAMsSungmock Ha, S. Lee, G. H. Bae, D.-S. Lee, S. H. Kim, B. W. Woo, N. H. Lee, Y. S. Lee, S. Pae. 1-7 [doi]
• Reliability challenges in Forksheet Devices: (Invited Paper)Erik Bury, Michiel Vandemaele, Jacopo Franco, Adrian Chasin, Stanislav Tyaginov, A. Vandooren, Romain Ritzenthaler, Hans Mertens, Javier Diaz-Fortuny, N. Horiguchi, Dimitri Linten, Ben Kaczer. 1-8 [doi]
• Drain voltage impact on charge redistribution in GaN-on-Si E-mode MOSc-HEMTsCamille Leurquin, William Vandendaele, Romain Gwoziecki, B. Mohamad, G. Despesse, Ferdinando Iucolano, Roberto Modica, A. Constant. 1-6 [doi]
• Current Scalability Issues in Multi-Bank 5V PMOS ESD structures: Root cause and Design GuidelineNagothu Karmel Kranthi, Yang Xiu, Yang Xiao, Rajkumar Sankaralingam. 1-4 [doi]
• Impact of Barrier Metal Thickness on SRAM ReliabilityRakesh Ranjan, Pavitra Ramadevi Perepa, Ki-Don Lee, Hokyung Park, Peter Kim, Ganesh Chakravarthy Yerubandi, Jon Haefner, Caleb Dongkyun Kwon, Minjung Jin, Wenhao Zhou, Hyewon Shim, Shin-Young Chung. 1-6 [doi]
• Enhancing reliability of a strong physical unclonable function (PUF) solution based on virgin-state phase change memory (PCM)L. Cattaneo, Matteo Baldo, Nicola Lepri, F. Sancandi, Massimo Borghi, Elisa Petroni, A. Serafini, R. Annunziata, Andrea Redaelli, Daniele Ielmini. 1-6 [doi]
• Semantic Autoencoder for Modeling BEOL and MOL Dielectric Lifetime DistributionsWeiman Yan, Ernest Wu, Alexander G. Schwing, Elyse Rosenbaum. 1-9 [doi]
• Characterization and modeling of DCR and DCR drift variability in SPADsMathieu Sicre, X. Federspiel, Bastien Mamdy, David Roy 0001, Francis Calmon. 1-5 [doi]
• Static, Dynamic, and Short-circuit Characteristics of Split-Gate 1.2 kV 4H-SiC MOSFETsDongyoung Kim, Skylar DeBoer, Stephen A. Mancini, Sundar Babu Isukapati, Justin Lynch, Nick Yun, Adam J. Morgan, Seung Yup Jang, WoongJe Sung. 1-4 [doi]
• MTJ degradation in multi-pillar SOT-MRAM with selective writingSimon Van Beek, Kaiming Cai, Kaiquan Fan, Giacomo Talmelli, Anna Trovato, Nico Jossart, Siddharth Rao, Adrian Vaisman Chasin, Sebastien Couet. 1-7 [doi]
• In-Product BTI Aging Sensor for Reliability Screening and Early Detection of Material at RiskTomasz Brozek, Alberto A. P. Cattaneo, Larg Weiland, Michele Quarantelli, Alberto Coccoli, Sharad Saxena, Christopher Hess, Andrzej J. Strojwas. 1-4 [doi]
• Integrated Test Circuit for Off-State Dynamic Drain Stress EvaluationJ. Hai, Florian Cacho, X. Federspiel, Tidjani Garba-Seybou, A. Divay, Estelle Lauga-Larroze, Jean-Daniel Arnould. 1-6 [doi]
• Unveiling Retention Physical Mechanism of Ge-rich GST ePCM TechnologyLuca Laurin, Matteo Baldo, Elisa Petroni, Giulia Samanni, L. Turconi, A. Motta, Massimo Borghi, A. Serafini, D. Codegoni, M. Scuderi, S. Ran, A. Claverie, Daniele Ielmini, R. Annunziata, Andrea Redaelli. 1-7 [doi]
• Ultra Long-term Measurement Results of BTI-induced Aging Degradation on 7-nm Ring OscillatorsKazutoshi Kobayashi, Tomoharu Kishita, Hiroki Nakano, Jun Furuta, Mitsuhiko Igarashi, Shigetaka Kumashiro, Michitarou Yabuuchi, Hironori Sakamoto. 1-7 [doi]
• A Physics-based Model for Long Term Data Retention Characteristics in 3D NAND Flash MemoryRashmi Saikia, Aseer Ansari, Souvik Mahapatra. 1-6 [doi]
• Engineering Custom TLP I-V Characteristic Using a SCR-Diode Series ESD Protection ConceptHarsha B. Variar, Satendra Kumar Gautam, Ashita Kumar, K. M. Amogh, Juan Luo, Ning Shi, David Marreiro, Shekar Mallikarjunaswamy, Mayank Shrivastava. 1-5 [doi]
• Circuit Reliability of $\text{MoS}_{2}$ Channel Based 2D TransistorsAnand Kumar Rai, Harsha B. Variar, Mayank Shrivastava. 1-4 [doi]
• Low-Frequency Noise Characteristics of Ferroelectric Field-Effect TransistorsOmkar Phadke, Khandker Akif Aabrar, Yuan-Chun Luo, Sharadindu Gopal Kirtania, Asif Islam Khan, Suman Datta, Shimeng Yu. 1-4 [doi]
• Impact of Non-Conducting HCI Degradation on Small-Signal Parameters in RF SOI MOSFETDora A. Chaparro-Ortiz, Alan Y. Otero-Carrascal, Edmundo A. Gutiérrez-D., Reydezel Torres-Torres, Oscar Huerta-Guevara, P. Srinivasan 0002, Fernando Guarin. 1-6 [doi]
• Characterization of Backside ESD Impacts on Integrated CircuitsTakuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa, Kazuki Monta, Takuji Miki, Makoto Nagata. 1-6 [doi]
• Investigation of Channel Dimension Dependence of BTI Degradation and Variation in Planar HKMG MOSFETS. Q. Zhang, Y. S. Sun, D. Gao, H. Jiang, Z. Q. Yu, H. Zheng, J.-L. Huang. 1-4 [doi]
• The Concept of Safe Operating Area for Gate Dielectrics: the SiC/SiO2 Case StudyPeter Moens, F. Geenen, L. De Schepper, JF Cano, J. Lettens, S. Maslougkas, J. Franchi, Martin Domeij. 1-5 [doi]
• Insight Into HCI Reliability on I/O Nitrided DevicesC. Doyen, V. Yon, Xavier Garros, Luigi Basset, Tadeu Mota Frutuoso, C. Dagon, Cheikh Diouf, X. Federspiel, V. Millon, Frederic Monsieur, C. Pribat, David Roy 0001. 1-5 [doi]
• Optimization of SCR for High-Speed Digital and RF Applications in 45-nm SOI CMOS TechnologyShudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean-Jacques Hajjar, Elyse Rosenbaum. 1-7 [doi]
• Towards accurate temperature prediction in BEOL for reliability assessment (Invited)Melina Lofrano, Herman Oprins, Xinyue Chang, Bjorn Vermeersch, Olalla Varela Pedreira, Alicja Lesniewska, Vladimir Cherman, Ivan Ciofi, Kristof Croes, Seongho Park, Zsolt Tokei. 1-7 [doi]
• Classification of Commercial SiC-MOSFETs Based on Time-Dependent Gate-current CharacteristicsE. Murakami, T. Takeshita, K. Oda, M. Kobayashi, K. Asayama, M. Okamoto. 1-7 [doi]
• Silicon based degradation model for various types of highly integrated MOL resistor devicesA. Thiessen, M. Haack, Markus Herklotz. 1-5 [doi]
• Signal duration sensitive degradation in scaled devicesGennadi Bersuker, E. Tang, Dmitry Veksler. 1-5 [doi]
• Trapping in $\text{Al}_{2}\mathrm{O}_{3}/\text{GaN}$ MOScaps investigated by fast capacitive techniquesManuel Fregolent, Alberto Marcuzzi, Carlo De Santi, Eldad Bahat-Treidel, Gaudenzio Meneghesso, Enrico Zanoni, Matteo Meneghini. 1-5 [doi]
• Soft Error Rate Predictions for Terrestrial Neutrons at the 3-nm Bulk FinFET TechnologyYoni Xiong, Yueh Chiang, Nicholas J. Pieper, Dennis R. Ball, Bharat L. Bhuva. 1-6 [doi]
• A New Ramp Stress Reliability Assessment on Pulse Energy Based OTS Switching OperationP. C. Chang, P. J. Liao, C. H. Wu, Y. C. Chang, D. H. Hou, Elia Ambrosi, H. Y. Lee, J. H. Lee, X. Y. Bao. 1-5 [doi]
• The Effects of Process Variations and BTI in Packaged FinFET DevicesEmmanuel Bender, Joseph B. Bernstein, Duane S. Boning. 1-5 [doi]
• Towards Chip-Package-System Co-optimization of Thermally-limited System-On-Chips (SOCs)Subrat Mishra, Sankatali Venkateswarlu, Bjorn Vermeersch, Moritz Brunion, Melina Lofrano, D. Abdi, Herman Oprins, D. Biswas, Odysseas Zografos, Gaspard Hiblot, Geert Van der Plas, Pieter Weckx, Geert Hellings, J. Myers, Francky Catthoor, Julien Ryckaert. 1-7 [doi]
• Multi Level Cell Reliability in Ge-rich GeSbTe-based Phase Change Memory ArraysV. Meli, Gabriele Navarro, J. Rottner, Niccolo Castellani, S. Martin, N. P. Tran, Guillaume Bourgeois, C. Sabbione, Marie-Claire Cyrille. 1-5 [doi]
• Influence of Back Gate Bias on the Hot Carrier Reliability of DSOI nMOSFETXinyi Zhang, Kewei Wang, Fang Wang, Jiangjiang Li, Zhicheng Wu, Duoli Li, Bo Li, Jianhui Bu, Zhengsheng Han. 1-5 [doi]
• Investigating Nanowire, Nanosheet and Forksheet FET Hot-Carrier Reliability via TCAD Simulations: Invited PaperMichiel Vandemaele, Ben Kaczer, Erik Bury, Jacopo Franco, Adrian Chasin, Alexander Makarov, Hans Mertens, Geert Hellings, Guido Groeseneken. 1-10 [doi]
• Characterizing SEU Cross Sections of 12- and 28-nm SRAMs for 6.0, 8.0, and 14.8 MeV NeutronsKazusa Takami, Yuibi Gomi, Shin-ichiro Abe, Wang Liao, Seiya Manabe, Tetsuro Matsumoto, Masanori Hashimoto. 1-6 [doi]
• Reliability Studies on Advanced FinFET Transistors of the Intel 4 CMOS TechnologyM. Jamil, S. Mukhopadhay, M. Ghoneim, A. Shailos, Chetan Prasad, Inanc Meric, Stephen Ramey. 1-5 [doi]
• Location of Oxide Breakdown Events under Off-state TDDB in 28nm N-MOSFETs dedicated to RF applicationsTidjani Garba-Seybou, Xavier Federspiel, Frederic Monsieur, Mathieu Sicre, Florian Cacho, Joycelyn Hai, Alain Bravaix. 1-8 [doi]
• Investigation of resistance fluctuations in ReRAM: physical origin, temporal dependence and impact on memory reliabilityL. Reganaz, Damien Deleruyelle, Quentin Rafhay, Joel Minguet Lopez, Niccolo Castellani, Jean-François Nodin, Alessandro Bricalli, Giuseppe Piccolboni, Gabriel Molas, François Andrieu. 1-6 [doi]
• Challenges and solutions to the defect-centric modeling and circuit simulation of time-dependent variabilityJavier Martín-Martínez, Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández 0001, Montserrat Nafría. 1-9 [doi]
• Recent Advances on Electromigration in Cu/SiO2 to Cu/SiO2 Hybrid Bonds for 3D Integrated CircuitsStéphane Moreau, David Bouchu, J. Jourdon, Bassel Ayoub, S. Lhostis, Hélène Frémont, P. Lamontagne. 1-7 [doi]
• Dynamic On-State Resistance in SiC MOSFETsR. Green, A. Lelis, D. Urciuoli, E. Schroen, D. Habersat. 1-2 [doi]
• Using dedicated device arrays for the characterization of TDDB in a scaled HK/MG technologyPablo Saraza-Canflanca, Javier Diaz-Fortuny, Andrea Vici, Erik Bury, Robin Degraeve, Ben Kaczer. 1-6 [doi]
• High- Temperature PBTI in Trench-Gate Vertical GaN Power MOSFETs: Role of Border and Semiconductor TrapsDavide Favero, A. Cavaliere, Carlo De Santi, Matteo Borga, W. Gonçalez Filho, Karen Geens, Benoit Bakeroot, Stefaan Decoutere, Gaudenzio Meneghesso, Enrico Zanoni, Matteo Meneghini. 1-6 [doi]
• A Unified Aging Model Framework Capturing Device to Circuit Degradation for Advance Technology NodesS. Mukhopadhyay, C. Chen, M. Jamil, Jihan Standfest, Inanc Meric, Balkaran Gill, Stephen Ramey. 1-4 [doi]
• Protection Schemes for Plasma Induced Damage from Well-Side AntennasHsi-Yu Kuo, Yu-Lin Chu, Hung-Da Dai, Chun-Chi Wang, Pei-Jung Lin, Ethan Guo, Yu-Ti Su, Chia-Lin Hsu, Kuan-Hung Chen, Tsung-Yuan Chen, Ryan Lu, Victor Liang, Kuo-Ji Chen, Kejun Xia. 1-5 [doi]
• Reliability issues of gate oxides and $p-n$ junctions for vertical GaN metal-oxide-semiconductor field-effect transistors (Invited)Tetsuo Narita, Daigo Kikuta, Kenji Ito, Tomoyuki Shoji, Tomohiko Mori, Satoshi Yamaguchi, Yasuji Kimoto, Kazuyoshi Tomita, Masakazu Kanechika, Takeshi Kondo, Tsutomu Uesugi, Jun Kojima, Jun Suda, Yoshitaka Nagasato, Satoshi Ikeda, Hiroki Watanabe, Masayoshi Kosaki, Tohru Oka. 1-10 [doi]
• Investigation of Safe Operating Area on 4H-SiC 600V VDMOSFET with TLP and UIS Test MethodsChao-Yang Ke, Yu-Chia Tsui, Bing-Yue Tsui, Ming-Dou Ker. 1-4 [doi]
• Customized wafer level verification methodology: quality risk pre-diagnosis with enhanced screen-ability of stand-by stress-related deteriorationsJiyoung Yoon, Bumgi Lee, Jaehee Song, Bokyoung Kang, Sangho Lee, Doh-Soon Kwak, Heonsang Lim, Ilsang Park, Jonghoon Kim, Sangwoo Pae. 1-6 [doi]
• Write Recovery Time Degradation by Thermal Neutrons in DDR4 DRAM ComponentsHyeongseok Oh, Myungsun Chun, Jiwon Lee, Shi-Jie Wen, Nick Yu, Byung-Gun Park, Sanghyeon Baeg. 1-6 [doi]
• GaN HEMTs Design and Modeling for 5GYueying Liu, John Wood, Zongyang Hu, Satyaki Ganguly, Jeremy Fisher, Mike Watts, Scott T. Sheppard, Donald A. Gajewski, Basim Noori. 1-4 [doi]
• Atomic-level Insight and Quantum Chemistry of Ambient Reliability Issues of the TMDs DevicesJeevesh Kumar, Hemanjaneyulu Kuruva, Harsha B. Variar, Utpreksh Patbhaje, Mayank Shrivastava. 1-6 [doi]
• Investigation of different screening methods on threshold voltage and gate oxide lifetime of SiC Power MOSFETsLimeng Shi, Shengnan Zhu, Jiashu Qian, Michael Jin, Monikuntala Bhattacharya, Marvin H. White, Anant K. Agarwal, Atsushi Shimbori, Tianshi Liu. 1-7 [doi]
• Polarity Dependency of MOL-TDDB in FinFETManisha Sharma, Hokyung Park, Yinghong Zhao, Ki-Don Lee, Liangshan Chen, Joonah Yoon, Rakesh Ranjan, Caleb Dongkyan Kwon, Hyewon Shim, Myungsoo Yeo, Shin-Young Chung, Jon Haefner. 1-3 [doi]
• Extended Analysis of Power Cycling Behavior of TO-Packaged SiC Power MOSFETsIvana Kovacevic-Badstuebner, Salvatore Race, Ulrike Grossner, Elena Mengotti, Christoph Kenel, Enea Bianda, Joni P. A. Jormanainen. 1-6 [doi]
• Comprehensive Analysis of Hole-Trapping in SiN Films with a Wide Range of Time Constants Based on Dynamic C-VHarumi Seki, Reika Ichihara, Yusuke Higashi, Yasushi Nakasaki, Masumi Saitoh, Masamichi Suzuki. 1-7 [doi]
• Cross-coupled Self-Heating and Consequent Reliability Issues in GaN-Si Hetero-integration: Thermal Keep-Out-Zone QuantifiedSruthi M. P, Md. Asaduz Zaman Mamun, Deleep R. Nair, Anjan Chakravorty, Nandita DasGupta, Amitava Dasgupta, Muhammad Ashraful Alam. 1-6 [doi]
• Investigation of Hot Carrier Enhanced Body Bias Effect in Advanced FinFET TechnologyZixuan Sun, Haoran Lu, Yongkang Xue, Wenpu Luo, Zirui Wang, Jiayang Zhang, Zhigang Ji, Runsheng Wang, Ru Huang. 1-6 [doi]
• Reliability Comparison of Commercial Planar and Trench 4H-SiC Power MOSFETsShengnan Zhu, Limeng Shi, Michael Jin, Jiashu Qian, Monikuntala Bhattacharya, Hema Lata Rao Maddi, Marvin H. White, Anant K. Agarwal, Tianshi Liu, Atsushi Shimbori, Chingchi Chen. 1-5 [doi]
• A common hard-failure mechanism in GaN HEMTs in accelerated switching and single-pulse short-circuit testsD. Wieland, S. Ofner, M. Stabentheiner, B. Butej, Christian Koller, J. Sun, Andrea Minetto, K. Reiser, Oliver Häberlen, Michael Nelhiebel, Michael Glavanovics, Dionyz Pogany, Clemens Ostermaier. 1-6 [doi]
• Multi-finger turn-on: A potential cause of premature failure in Drain Extended HV Nanosheet DevicesJatin, M. Monishmurali, Mayank Shrivastava. 1-4 [doi]
• Unveiling Field Driven Performance Unreliabilities Governed by Channel Dynamics in MoSe2 FETsUtpreksh Patbhaje, Rupali Verma, Jeevesh Kumar, Ansh, Mayank Shrivastava. 1-6 [doi]
• Material instabilities in the TaOx-based resistive switching devices (Invited)Marek Skowronski. 1-5 [doi]
• Impact of Process Variation on MIM Capacitor LifetimeJoost Melai, V. Subramanian, I. Pouwel. 1-4 [doi]
• Unique Lattice Temperature Dependent Evolution of Hot Electron Distribution in GaN HEMTs on C-doped GaN Buffer and its Reliability ConsequencesRajarshi Roy Chaudhuri, Vipin Joshi, Amratansh Gupta, Tanmay Joshi, Rasik Rashid Malik, Mehak Ashraf Mir, Sayak Dutta Gupta, Mayank Shrivastava. 1-5 [doi]
• Reliability of InGaZnO Transparent ReRAM with Optically Active Pt-NanodisksKavita Vishwakarma, Rishabh Kishore, Suman Gora, Mandeep Jangra, Arnab Datta. 1-4 [doi]
• Analysis of Intermittent Single-bit Failure on 10-nm node generation DRAM DevicesHyewon Seo, Taiuk Rim, Eunsun Lee, Sekyoung Jang, Kyosuk Chae, Jeonghoon Oh, Hyodong Ban, Jooyoung Lee. 1-6 [doi]
• The Role of Defects and Interface Degradation on Ferroelectric HZO Capacitors AgingLorenzo Benatti, Sara Vecchi, Milan Pesic, Francesco Maria Puglisi. 1-6 [doi]
• GHz AC to DC TDDB Modeling with Defect Accumulation Efficiency ModelXinwei Yu, Chu Yan, Yaru Ding, Yiming Qu, Yi Zhao. 1-6 [doi]
• Extremely Large Breakdown to Snapback Voltage Offset $(\mathrm{V}_{\mathrm{t}1} > > \mathrm{V}_{\text{BD}})$: Another Way to Improve ESD Resilience of LDMOS DevicesAakanksha Mishra, Boeila Sampath Kumar, M. Monishmurali, Shaik Ahamed Suzaad, Shubham Kumar, Kiran Pote Sanjay, Amit Kumar Singh, Ankur Gupta, Mayank Shrivastava. 1-5 [doi]
• Dielectric Thickness and Fin Width Dependent OFF-State Degradation in AlGaN/GaN SLCFETsAkhil S. Kumar, Michael J. Uren, Matthew D. Smith 0003, Martin Kuball, Justin Parke, H. George Henry, Robert S. Howell. 1-4 [doi]
• 8 Endurance and Excellent RetentionM. Y. Li, J. P. Lee, C.-H. Liu, J.-C. Guo, Steve S. Chung. 1-7 [doi]
• Differentiated Silicon Technologies for mmwave 5G and 6G applications (Invited)Anirban Bandyopadhyay. 1-4 [doi]
• Impact of Gate Stack Thermal Budget on NBTI Reliability in Gate-All-Around Nanosheet P-type DevicesHuimei Zhou, Miaomiao Wang, Nicolas Loubet, Andrew Gaul, Yasir Sulehria. 1-6 [doi]
• Excellent Reliability performances of a truly 5V nBOXFET for Automotive and IOT applicationsD. Lipp, Z. Zhao, G. Krause, Wafa Arfaoui, Elodie Ebrard, Germain Bossu, S. Evseev, Markus Herklotz, Mahesh Siddabathula. 1-5 [doi]
• Performing Machine Learning Based Outlier Detection for Automotive Grade ProductsY. L. Yang, P. C. Tsao, C.-W. Lin, Ross Lee, Olivia Ni, T. T. Chen, Y. J. Ting, C. T. Lai, Jason Yeh, Arnold Yang, Wayne Huang 0003, Peng Chen, Charly Tsai, Ryan Yang, Y.-S. Huang, B. C. Hsu, M. Z. Lee, T. H. Lee, Michael Huang, Coming Chen, Liham Chu, H. W. Kao, N. S. Tsai. 1-5 [doi]
• A 13-bit Radiation-Hardened SAR-ADC with Error Correction by Adaptive Topology TransformationYuya Aoki, Tatsuya Iwata, Takuji Miki, Kazutoshi Kobayashi, Takefumi Yoshikawa. 1-8 [doi]
• Modeling of NBTI Induced Threshold Voltage Shift Based on Activation Energy Maps Under Consideration of VariabilityChristian Bogner, Christian Schlünder, Michael Waltl, Hans Reisinger, Tibor Grasser. 1-7 [doi]
• Physical Insights into the DC and Transient Reverse Bias Reliability of β-Ga2O3 Based Vertical Schottky Barrier DiodesHarsh Raj, Vipin Joshi, Rajarshi Roy Chaudhuri, Rasik Rashid Malik, Mayank Shrivastava. 1-4 [doi]
• Voltage Ramp Stress Test Optimization for Wafer Level Hot Carrier Monitoring in FinFETRi-an Zhao, Matthew Koskinen, Yang Liu, Xinggong Wan. 1-6 [doi]
• Risk Management Informed by an Uncertain Bathtub Curve (Invited)Jason Jopling. 1-8 [doi]
• Improving the Tamper-Aware Odometer Concept by Enhancing Dynamic Stress OperationJavier Diaz-Fortuny, Dishant Sangani, Pablo Saraza-Canflanca, Erik Bury, Robin Degraeve, Ben Kaczer. 1-9 [doi]
• 3D Approaches to Engineer Holding Voltage of SCRSatendra Kumar Gautam, Harsha B. Variar, Juan Luo, Ning Shi, David Marreiro, Shekar Mallikarjunaswamy, Mayank Shrivastava. 1-4 [doi]
• A Concise Electrothermal Model to Characterize the Thermal Safe-Operating Area of Power TransistorJian-Hsing Lee, Gong-Kai Lin, Chun-Chih Chen, Li-Fan Chen, Chien-Wei Wang, Shao-Chang Huang, Ching-Ho Li, Chih-Cherng Liao, Jung-Tsun Chuang, Ke-Horng Chen. 1-6 [doi]
• Effects of Collected Charge and Drain Area on SE Response of SRAMs at the 5-nm FinFET NodeN. J. Pieper, Yoni Xiong, Dennis R. Ball, J. Pasternak, Bharat L. Bhuva. 1-6 [doi]
• Studying the Impact of Temperature Gradient on Electromigration Lifetime Using a Power Grid Test Structure with On-Chip HeatersYong Hyeon Yi, Chris H. Kim, Chen Zhou, Armen Kteyan, Valeriy Sukharev. 1-5 [doi]
• OFF State Reliability Challenges of Monolayer WS2 FET Photodetector: Impact on the Dark and Photo-Illuminated StateRupali Verma, Utpreksh Patbhaje, Jeevesh Kumar, Anand Kumar Rai, Mayank Shrivastava. 1-5 [doi]
• Reliability of 3D NAND Flash for Future Storage Systems (Invited)Akira Goda, Kishore Kumar Muchherla, Peter Feeley. 1-10 [doi]
• Reliability Challenges from 2.5D to 3DIC in Advanced Package DevelopmentRyan Lu, Yao-Chun Chuang, Jyun-Lin Wu, Jun He. 1-4 [doi]
• Radiation Hardened Flip-Flops with low Area, Delay and Power Overheads in a 65 nm bulk processShotaro Sugitani, Ryuichi Nakajima, Keita Yoshida, Jun Furuta, Kazutoshi Kobayashi. 1-5 [doi]
• Impact of Phase-Change Memory Drift on Energy Efficiency and Accuracy of Analog Compute-in-Memory Deep Learning Inference (Invited)Martin M. Frank, Ning Li, Malte J. Rasch, Shubham Jain, Ching-Tzu Chen, Ramachandran Muralidhar, Jin-Ping Han, Vijay Narayanan, Timothy Philip, Kevin Brew, Andrew Simon, Iqbal Saraf, Nicole Saulnier, Irem Boybat, Stanislaw Wozniak, Abu Sebastian, Pritish Narayanan, Charles Mackin, An Chen, Hsinyu Tsai, Geoffrey W. Burr. 1-10 [doi]
• Reliability of Memristive Devices for High-Performance Neuromorphic Computing: (Invited Paper)Yue Xi, Xinyi Li, Junhao Chen, Ruofei Hu, Qingtian Zhang, Zhixing Jiang, Feng Xu, Jianshi Tang. 1-7 [doi]
• Self-Heating Aware Threshold Voltage Modulation Conforming to Process and Ambient Temperature Variation for Reliable Nanosheet FETSunil Rathore, Rajeewa Kumar Jaisawal, P. N. Kondekar, Navneet Gandhi, Shashank Banchhor, Young Suh Song, Navjeet Bagga. 1-5 [doi]
• Thermally-activated failure mechanisms of 0.25 \ \mu \mathrm{m}$ RF AIGaN/GaN HEMTs submitted to long-term life testsZhan Gao, Francesca Chiocchetta, Fabiana Rampazzo, Carlo De Santi, Mirko Fornasier, Gaudenzio Meneghesso, Matteo Meneghini, Enrico Zanoni. 1-5 [doi]
• Reliability Modeling of Middle-Of-Line Interconnect Dielectrics in Advanced process nodesRahim Kasim, Cheyun Lin, Christopher Perini, James Palmer, N. Gilda, S. Imam, Justin R. Weber, C. Wallace, Jeffery Hicks. 1-8 [doi]
• Double-sided Row Hammer Effect in Sub-20 nm DRAM: Physical Mechanism, Key Features and MitigationLongda Zhou, Jie Li, Zheng Qiao, Pengpeng Ren, Zixuan Sun, Jianping Wang, Blacksmith Wu, Zhigang Ji, Runsheng Wang, Kanyu Cao, Ru Huang. 1-10 [doi]
• Reliability assessment of hafnia-based ferroelectric devices and arrays for memory and AI applications (Invited)Laurent Grenouillet, Justine Barbot, J. Laguerre, Simon Martin 0006, Catherine Carabasse, M. Louro, Messaoud Bedjaoui, S. Minoret, S. Kerdilès, C. Boixaderas, T. Magis, Carine Jahan, François Andrieu, Jean Coignus. 1-8 [doi]
• Neuromorphic Computation-in-Memory System (Invited)Ken Takeuchi. 1-4 [doi]
• ReRAM CiM Fluctuation Pattern Classification by CNN Trained on Artificially Created DatasetAyumu Yamada, Naoko Misawa, Chihiro Matsui, Ken Takeuchi. 1-6 [doi]
• Investigation on NBTI Control Techniques of HKMG Transistors for Low-power DRAM applicationsWonju Sung, Hyun-Seung Kim, Jung-Hoon Han, Se Guen Park, Jeonghoon Oh, Hyodong Ban, Jooyoung Lee. 1-5 [doi]
• Dynamic Interplay of Surface and Buffer Traps in Determining Drain Current Injection induced Device Instability in OFF-state of AlGaN/GaN HEMTsMehak Ashraf Mir, Vipin Joshi, Rajarshi Roy Chaudhuri, Mohammad Ateeb Munshi, Rasik Rashid Malik, Mayank Shrivastava. 1-6 [doi]
• Enhanced DRAM Single Bit Characteristics from Process Control of ChlorineTaiuk Rim, Kyosuk Che, Sehyun Kwon, Jin-Seong Lee, Jeonghoon Oh, Hyodong Ban, Jooyoung Lee. 1-4 [doi]
• Write-error-rate of Spin-Transfer-Torque MRAM (Invited)Daniel C. Worledge. 1-4 [doi]
• Reliability of SPST Series-stacked SOI CMOS RF Switches for mmWave ApplicationsAarti Rathi, Abhisek Dixit, Naga Satish, P. Srinivasan 0002, Fernando Guarin. 1-6 [doi]
• Electrostatic Shielding of NAND Flash Memory from Ionizing RadiationMatchima Buddhanoy, Biswajit Ray. 1-5 [doi]
• Insights into device and material origins and physical mechanisms behind cross temperature in 3D NANDMilan Pesic, Bastien Beltrando, Tommaso Rollo, Cristian Zambelli, Andrea Padovani, Rino Micheloni, Rita Maji, Lisa Enman, Mark Saly, Yang Ho Bae, Jung-Bae Kim, Dong Kil Yim, Luca Larcher. 1-8 [doi]
• Thermal and statistical analysis of various AlN/GaN HEMT geometries for millimeter Wave applicationsN. Said, Kathia Harrouche, Farid Medjdoub, Nathalie Labat, Jean-Guy Tartarin, Nathalie Malbert. 1-5 [doi]
• Investigation of Sub-20nm 4th generation DRAM cell transistor's parasitic resistance and scalable methodology for Sub-20nm eraShinwoo Jeong, Jin-Seong Lee, Jiuk Jang, Jooncheol Kim, Hyunsu Shin, Ji-Hun Kim, Jeongwoo Song, Dongsoo Woo, Jeonghoon Oh, Jooyoung Lee. 1-6 [doi]
• Signatures of Positive Gate Over-Drive Induced Hole Trap Generation and its Impact on p-GaN Gate Stack Instability in AlGaN/GaN HEMTsRasik Rashid Malik, Vipin Joshi, Rajarshi Roy Chaudhuri, Mehak Ashraf Mir, Zubear Khan, Avinas N. Shaji, Madhura Bhattacharya, Anup T. Vitthal, Mayank Shrivastava. 1-4 [doi]
• High Temperature and High Humidity Reliability Evaluation of Large-Area 1200V and 1700V SiC DiodesIn-Hwan Ji, Anoop Mathew, Jae Hyung Park, Neal Oldham, Matthew McCain, Shadi Sabri, Edward Van Brunt, Brett Hull, Daniel J. Lichtenwalner, Donald A. Gajewski, John W. Palmour. 1-4 [doi]
• Microscopic Characterization of Failure Mechanisms in Long-Term Implanted Microwire Neural ElectrodesZ. J. Zhang, Q. Li, Z. Y. Dong, W. T. Wang, S. T. Lai, X. Yang, F. Liang, C. L. Wang, C. Luo, L. J. Lyu, Z. Li, J. M. Xu, X. Wu. 1-5 [doi]
• A Novel Data Recovery Technique for 3D TLC NAND Flash Memory Using Intercell ProgramY. L. Chou, W. J. Tsai, G. W. Wu, W. Chang, T. C. Lu, K.-C. Chen, C. Y. Lu. 1-4 [doi]
• A Novel Methodology to Predict Process-Induced Warpage in Advanced BEOL InterconnectsY.-H. Lin, C. C. Lee, C.-Y. Liao, M. H. Lin, W. C. Tu, Robin Chen, H. P. Chen, Winston S. Shue, Min Cao. 1-4 [doi]
• Stress Migration of Aluminum Backside Interconnect in Xtacking®Kang Yang, Suhui Yang, Yan Ouyang, Shengwei Yang, Kun Han, Yi He. 1-4 [doi]
• A pragmatic network-aware paradigm for system-level electromigration predictions at scaleHouman Zahedmanesh, Philippe Roussel, Ivan Ciofi, Kristof Croes. 1-6 [doi]
• Backhopping-based STT-MRAM Poisson Spiking Neuron for Neuromorphic ComputationJ. Tan, J.-H. Lim, Jae-Hyun Kwon, Vinayak Bharat Naik, Nagarajan Raghavan, Kin Leong Pey. 1-6 [doi]
• Cryogenic Endurance of Anti-ferroelectric and Ferroelectric $\text{Hf}_{1-\mathrm{x}}\text{Zr}_{\mathrm{X}}\mathrm{O}_{2}$ for Quantum Computing ApplicationsK.-Y. Hsiang, J. Y. Lee, Z.-F. Lou, F. S. Chang, Z. X. Li, C. W. Liu, T.-H. Hou, P. Su, M. H. Lee. 1-4 [doi]
• Evidence of Carbon Doping Effect on VTH Drift and Dynamic-RON of 100V p-GaN Gate AlGaN/GaN HEMTsMarcello Cioni, G. Giorgino, Alessandro Chini, Carmine Miccoli, Maria Eloisa Castagna, M. Moschetti, C. Tringali, Ferdinando Iucolano. 1-5 [doi]
• Wafer Level Chip Scale Package Failure Mode Prediction using Finite Element ModelingViktor Dudash, Kashi Vishwanath Machani, Bjoern Boehme, Simone Capecchi, Jungtae Ok, Karsten Meier, Frank Kuechenmeister, Marcel Wieland, Karlheinz Bock. 1-6 [doi]
• Full reliability characterization of three-terminal SOT-MTJ devices and corresponding arraysXinyi Xu, Hongchao Zhang, Chuanpeng Jiang, Jinhao Li, Shiyang Lu, Yunpeng Li, Honglei Du, Xueying Zhang, Zhaohao Wang, Kaihua Cao, Weisheng Zhao, Shuqin Lyu, Hao Xu, Bonian Jiang, Le Wang, Bowen Man, Cong Zhang, Dandan Li, Shuhui Li, Xiaofei Fan, Gefei Wang, Hong-xi Liu. 1-6 [doi]
• Transient Leakage Current as a Non-destructive Probe of Wire-bond Electrochemical FailuresMd. Asaduz Zaman Mamun, Amar Mavinkurve, Michiel van Soestbergen, Muhammad Ashraful Alam. 1-7 [doi]
• Knowledge Based Qualification for Thermal Interface Material ReliabilityE. Armagan, A. Saha, K. C. Liu, B. Gebrehiwot, M. Cartas, A. Das, T. Rawlings, P. Raghavan. 1-7 [doi]
• Novel Operation Scheme for Suppressing Disturb in HfO2-based FeFET Considering Charge- Trapping-Coupled Polarization DynamicsTakamasa Hamai, Kunifumi Suzuki, Reika Ichihara, Yusuke Higashi, Yoko Yoshimura, Kiwamu Sakuma, Kensuke Ota, Kota Takahashi, Kazuhiro Matsuo, Shosuke Fujii, Masumi Saitoh. 1-5 [doi]
• TID Response of an Analog In-Memory Neural Network AcceleratorB. Tolleson, Christopher H. Bennett, T. Patrick Xiao, Donald Wilson, J. Short, J. Kim, David R. Hughart, N. Gilbert, Sapan Agarwal, Hugh J. Barnaby, Matthew J. Marinella. 1-6 [doi]
• Current Injection Effect on ESD Behaviors of the Parasitic Bipolar Transistors inside P+/N-well diodeHui Wang, Pengyu Lai, Zhong Chen. 1-6 [doi]
• Voltage Acceleration of Power NLDMOS Hot Carrier DegradationVladislav A. Vashchenko, H. Sarbishaei. 1-4 [doi]
• Towards Understanding the Physics of Gate Switching Instability in Silicon Carbide MOSFETsMaximilian W. Feil, Katja Waschneck, Hans Reisinger, Judith Berens, Thomas Aichinger, Paul Salmen, Gerald Rescher, Wolfgang Gustin, Tibor Grasser. 1-10 [doi]
• Near Zero Field Magnetoresistance Spectroscopy: A New Tool in Semiconductor Reliability PhysicsPatrick M. Lenahan, E. B. Frantz, Sean W. King, Mark A. Anders 0002, S. J. Moxim, James P. Ashton, Kyle J. Myers, M. E. Flatté, N. J. Harmon. 1-6 [doi]
• GHz Cycle-to-Cycle Variation in Ultra-scaled FinFETs: From the Time-Zero to the Aging StatesYiming Qu, Chu Yan, Xinwei Yu, Yaru Ding, Yi Zhao. 1-6 [doi]
• Impact of Trapped Charge Vertical Loss and Lateral Migration on Lifetime Estimation of 3-D NAND Flash MemoriesY. H. Liu, T. C. Zhan, Y.-S. Yang, C. C. Hsu, A.-C. Liu, W. Lin. 1-6 [doi]
• Reliability Assessment of 3nm GAA Logic Technology Featuring Multi-Bridge-Channel FETsSeongkyung Kim, Hyerim Park, Eunyu Choi, Young Han Kim, Dahyub Kim, Hyewon Shim, Shin-Young Chung, Paul Jung. 1-8 [doi]
• Impact of via geometry and line extension on via-electromigration in nano-interconnectsA. S. Saleh, Houman Zahedmanesh, Hajdin Ceric, Ingrid De Wolf, Kris Croes. 1-4 [doi]