Abstract is missing.
- Analysis of Transient HTRB Leakage in a SiC Field Ring TerminationR. R. Potera, T. Witt, Y. Zheng. 1-5 [doi]
- Threshold Voltage Shift in a-Si: H Thin film Transistors under ESD stress ConditionsRajat Sinha, Prasenjit Bhattacharya, Sanjiv Sambandan, Mayank Shrivastava. 1-6 [doi]
- Ruggedness of SiC devices under extreme conditionsPeter Friedrichs. 1-5 [doi]
- Hybrid HCI Degradation in Sub-micron NMOSFET due to Mixed Back-end Process DamagesKuilong Yu, XiaoJuan Zhu, Rui Fang, Tingting Ma, Kun Han, Zhongyi Xia. 1-4 [doi]
- Understanding ESD Induced Thermal Mechanism in FinFETs Through Predictive TCAD SimulationZhiqing Li, B. Zhu, A. Nath, M. Miao, A. Loiseau, Y. Li, J. B. Johnson, S. Mitra, R. Gauthier. 1-4 [doi]
- Charge Trapping and Stability of E-Mode p-gate GaN HEMTs Under Soft- and Hard- Switching ConditionsF. Masin, Matteo Meneghini, E. Canato, A. Barbato, Carlo De Santi, Arno Stockman, A. Banerjee, Peter Moens, E. Zanonivl, Gaudenzio Meneghesso. 1-4 [doi]
- Open Block Characterization and Read Voltage Calibration of 3D QLC NAND FlashNikolaos Papandreou, Haralampos Pozidis, Nikolas Ioannou, Thomas P. Parnell, Roman A. Pletka, Milos Stanisavljevic, Radu Stoica, Sasa Tomic, Patrick Breen, Gary A. Tressler, Aaron Fry, Timothy Fisher, Andrew Walls. 1-6 [doi]
- Reliability Characteristics of a High Density Metal- Insulator-Metal Capacitor on Intel's 10+ ProcessC. Y. Lin, U. E. Avci, M. A. Blount, R. Grover, J. Hicks, R. Kasim, A. Kundu, C. M. Pelto, C. Ryder, Anthony Schmitz, K. Sethi, D. Seghete, D. J. Towner, A. J. Welsh, J. Weber, C. Auth. 1-4 [doi]
- Non-Isothermal Simulations to Optimize SiC MOSFETs for Enhanced Short-Circuit RuggednessDongyoung Kim, Adam J. Morgan, Nick Yun, WoongJe Sung, Anant Agarwal, Robert Kaplar. 1-6 [doi]
- Silicon Reliability Characterization of Intel's Foveros 3D Integration Technology for Logic-on-Logic Die StackingChetan Prasad, Sunny Chugh, Hannes Greve, I-chen Ho, Enamul Kabir, Cheyun Lin, Mahjabin Maksud, Steven R. Novak, Benjamin Orr, Keun-Woo Park, Anthony Schmitz, Zhizheng Zhang, Peng Bai, Doug B. Ingerly, Emre Armagan, Hsinwei Wu, Patrick N. Stover, Lance Hibbeler, Michael O'Day, Daniel Pantuso. 1-5 [doi]
- Superior Data Retention of Programmable Linear RAM (PLRAM) for Compute-in-Memory ApplicationShifan Gao, Yu Cong, Zeyu Zhang, Xiang Qiu, Choonghyun Lee, Yi Zhao. 1-5 [doi]
- Silicon Based RF Reliability Challenges for 5G CommunicationsP. Colestock, P. Srinivasan, Fernando Guarin. 1-4 [doi]
- Understanding and empirical fitting the breakdown of MgO in end-of-line annealed MTJsSimon Van Beek, Barry J. O'Sullivan, Sebastien Couet, Davide Crotti, Dimitri Linten, Gouri Sankar Kar. 1-5 [doi]
- A Compact Physics Analytical Model for Hot-Carrier DegradationStanislav Tyaginov, Alexander Grill, Michiel Vandemaele, Tibor Grasser, Geert Hellings, Alexander Makarov, Markus Jech, Dimitri Linten, Ben Kaczer. 1-7 [doi]
- Effects of Wiring Density and Pillar Structure on Chip Package Interaction for Advanced Cu Low-k ChipsWeishen Chu, Laura Spinella, Dwayne R. Shirley, Paul S. Ho. 1-4 [doi]
- Quantum Mechanical Charge Trap Modeling to Explain BTI at Cryogenic TemperaturesJ. Michl, A. Grill, Dieter Claes, Gerhard Rzepa, Ben Kaczer, D. Tinten, I. Radu, Tibor Grasser, M. WaltT. 1-6 [doi]
- Specific aspects regarding evaluation of power cycling tests with SiC devicesMartina Gerlach, Peter Seidel, Josef Lutz. 1-6 [doi]
- How to Achieve Moving Current Filament in High Voltage LDMOS Devices: Physical Insights & Design Guidelines for Self-Protected ConceptsNagothu Karmel Kranthi, Chirag Garg, B. Sampath Kumar, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava. 1-6 [doi]
- Facile Route for Low-temperature Eco-friendly Solution Processed ZnSnO Thin-film TransistorsTian Shi Zhao, Chun Zhao, Ivona Z. Mitrovic, Eng Gee Lim, Li Yang, Chenghu Qiu, Ce Zhou Zhao. 1-4 [doi]
- Modeling Framework for Transistor Aging Playback in Advanced Technology NodesI. Meric, S. Ramey, S. Novak, S. Gupta, S. P. Mudanai, J. Hicks. 1-6 [doi]
- Measurement of the Pre-Breakdown Characteristics in Silicon Carbide Power Devices by the Use of Radioactive Gamma SourcesMauro Ciappa, Marco Pocaterra. 1-7 [doi]
- Triggering Optimization on NAND ESD Clamp and Its ESD Protection IO Scheme for CMOS DesignsJian Liu 0027, Divya Acharya, Nathaniel Peachey. 1-6 [doi]
- The Role of RF Operational Life Testing in Evaluating III-V Devices Addressing RF Through Millimeter-wave ApplicationsElias Reese. 1-4 [doi]
- Circuit Reliability Analysis of RRAM-based Logic-in-Memory Crossbar Architectures Including Line Parasitic Effects, Variability, and Random Telegraph NoiseTommaso Zanotti, Francesco Maria Puglisi, Paolo Pavan. 1-5 [doi]
- Stress Induced Voiding Behavior of Electroplated Copper Thin Films in Highly Scaled Cu/low-k interconnectsClement Huang, Alex Juan, K. C. Su. 1-3 [doi]
- Characterizing Energetic Dependence of Low-Energy Neutron-induced MCUs in 65 nm bulk SRAMsWang Liao, Kojiro Ito, Yukio Mitsuyama, Masanori Hashimoto. 1-5 [doi]
- A Novel 'I-V Spectroscopy' Technique to Deconvolve Threshold Voltage and Mobility Degradation in LDMOS TransistorsYen-Pu Chen, Bikram Kishore Mahajan, Dhanoop Varghese, Srikanth Krishnan, Vijay Reddy, Muhammad Ashraful Alam. 1-6 [doi]
- Study of Lower Voltage Protection against Plasma Process Induced Damage by Quantitative Prediction TechniqueYohei Hiura, Shinichi Miyake, Shigetaka Mori, Koichi Matsumoto, Hidetoshi Ohnuma. 1-5 [doi]
- Challenges and Peculiarities in Developing New Standards for SiCD. A. Gajewski. 1-5 [doi]
- A novel approach to in-field, in-mission reliability monitoring based on Deep DataEvelyn Landman, Noam Brousard, Tamar Naishlos. 1-8 [doi]
- Radiation Tolerance of 3-D NAND Flash Based Neuromorphic Computing SystemMd Mehedi Hasan, Md Raquibuzzaman, Indranil Chatterjee, Biswajit Ray. 1-4 [doi]
- Advanced methods for CPU product reliability modeling and enhancementOren Zonensain, Roman Rechter, Robert Kwasnick, Keun-Woo Park, Anisur Rahman, Almog Reshef, Tal Raz, Maxim Levit. 1-5 [doi]
- Demonstration of Bilayer Gate Insulator for Improved Reliability in GaN-on-Si Vertical TransistorsKalparupa Mukherjee, Carlo De Santi, Gaudenzio Meneghesso, Enrico Zanoni, Matteo Meneghini, Shuzhen You, Karen Geens, Matteo Borga, Benoit Bakeroot, Stefaan Decoutere. 1-5 [doi]
- Novel Re-configurable Circuits For Aging Characterization: Connecting Devices to CircuitsKetul B. Sutaria, Jihan Standfest, Inanc Meric, Amirhossein H. Davoody, Swaroop Kumar Namalapuri, T. Mutyala, Supriya P., Balkaran Gill, Stephen Ramey, Jeffery Hicks. 1-5 [doi]
- High Frequency TDDB of Reinforced Isolation Dielectric SystemsTom Bonifield, Honglin Guo, Jeff West, Hisashi Shichijo, Talha Tahir. 1-4 [doi]
- In-Situ Monitoring of Self-Heating Effect in Aggressively Scaled FinFETs and Its Quantitative Impact on Hot Carrier Degradation Under Dynamic Circuit OperationYiming Qu, Jiwu Lu, Junkang Li, Zhuo Chen, Jie Zhang, Chunlong Li, Shiuh-Wuu Lee, Yi Zhao. 1-6 [doi]
- AC stress reliability study of a new high voltage transistor for logic memory circuitsJ. Locati, Vincenzo Della Marca, C. Rivero, Arnaud Régnier, Stephan Niel, K. Coulie. 1-5 [doi]
- Reliability Stressing Control Using Jacobian Feedback Kelvin Measurement on Intel TechnologiesP. Xiao, H. Hadziosmanovic, R. Jiang, M. Rostami-asrabad, S. Ramey, I. Tsamaret. 1-4 [doi]
- Breakdown Lifetime Analysis of HfO2-based Ferroelectric Tunnel Junction (FTJ) Memory for In-Memory Reinforcement LearningMarina Yamaguchi, Shosuke Fujii, Kensuke Ota, Masumi Saitoh. 1-6 [doi]
- The Mysterious Bipolar Bias Temperature Stress from the Perspective of Gate-Sided Hydrogen ReleaseTibor Grasser, Ben Kaczer, Barry J. O'Sullivan, Gerhard Rzepa, Bernhard Stampfer, Michael Waltl. 1-6 [doi]
- Estimation of Product Reliability using TDDB Simulation and Statistical EM MethodJae-Gyung Ahn, Ping-Chin Yeh, Jonathan Chang. 1-6 [doi]
- A fast and test-proven methodology of assessing RTN/fluctuation on deeply scaled nano pMOSFETsR. Gao, M. Mehedi, H. Chen, X. Wang, J. F. Zhang, X. L. Lin, Z. Y. He, Y. Q. Chen, D. Y. Lei, Y. Huang, Y. F. En, Z. Ji, R. Wang. 1-5 [doi]
- Early Diagnosis and Prediction of Wafer Quality Using Machine Learning on sub-10nm Logic TechnologyHeung-Kook Ko, Sena Park, Jihyun Ryu, Sung-Ryul Kim, Giwon Lee, DongJoon Lee, Sangwoo Pae, Euncheol Lee, Yongsun Ji, Hia Jiang, Taeyoung Jeong, Taiki Uemura, Dongkyun Kwon, Hyungrok Do, Hyungu Kahng, Yoon-Sang Cho, Jiyoon Lee, Seoung Bum Kim. 1-5 [doi]
- Threshold Voltage Instability of Commercial 1.2 kV SiC Power MOSFETsSusanna Yu, Tianshi Liu, Shengnan Zhu, Diang Xing, Arash Salemi, Minseok Kang, Kristen Booth, Marvin H. White, Anant K. Agarwal. 1-5 [doi]
- ON-state retention of Atom Switch eNVM for IoT/AI Inference SolutionKoichiro Okamoto, Ryusuke Nebashi, Naoki Banno, Xu Bai, Hideaki Numata, Noriyuki Iguchi, Makoto Miyamura, Hiromitsu Hada, Kazunori Funahashi, Tadahiko Sugibayashi, Toshitsugu Sakamoto, Munehiro Tada. 1-4 [doi]
- Gate-oxide reliability and failure-rate reduction of industrial SiC MOSFETsThomas Aichinger, M. Schmidt. 1-6 [doi]
- Magnetic Immunity Guideline for Embedded MRAM Reliability to Realize Mass ProductionT.-Y. Lee, K. Yamane, L. Y. Hau, R. Chao, N. L. Chung, V. B. Naik, K. Sivabalan, J. Kwon, J.-H. Lim, Wah-Peng Neo, Kevin Khua, N. Thiyagarajah, S. H. Jang, B. Behin-Aein, E. H. Toh, Y. Otani, D. Zeng, N. Balasankaran, L. C. Goh, T. Ling, J. Hwang, L. Zhang, R. Low, S. L. Tan, C. S. Seet, J. W. Ting, S. Ong, Y. S. You, S. T. Woo, E. Quek, S. Y. Siah. 1-4 [doi]
- Anomalous accelerated negative-bias- instability (NBI) at low drain biasK. P. Cheung. 1-3 [doi]
- ®) under circuitry-relevant operation conditionsD. Veksler, Gennadi Bersuker, A. W. Bushmaker, M. Mason, P. R. Shrestha, K. P. Cheung, Jason P. Campbell, Thomas Rueckes, L. Cleveland, H. Luan, D. C. Gilmer. 1-4 [doi]
- Fast Neutron Irradiation Effects on Multiple Gallium Nitride (GaN) Device Reliability in Presence of Ambient VariationsLuis Soriano, Hector Valencia, Ke-Xun Sun, Ronald Nelson. 1-6 [doi]
- Impact of Intrinsic Series Resistance on the Reversible Dielectric Breakdown Kinetics in HfO2 MemristorsMireia Bargallo González, M. Maestro-Izquierdo, Francesca Campabadal, S. Aldana, F. Jiménez-Molinos, Juan Bautista Roldán. 1-4 [doi]
- On the Correlation of Laser-induced and High-Energy Proton Beam-induced Single Event LatchupBahar Ajdari, Samwel Sekwao, Ricardo Ascazubi, Adam Neale, Norbert Seifert. 1-5 [doi]
- Reliability of 200mm E-mode GaN-on-Si Power HEMTsDavid C. Zhou, William Li, Jingyu Shen, Leilei Chen, Thomas Zhao, Kent Lin, Martin Zhang, Larry Chen, H. C. Chiu, Jeff Zhang, Roy K.-Y. Wong. 1-3 [doi]
- Metal reliability mechanisms in Ruthenium interconnectsO. Varela Pedreira, Michele Stucchi, A. Gupta, V. Vega Gonzalez, M. van der Veen, S. Lariviere, C. J. Wilson, Zsolt Tokei, K. Croes imec. 1-7 [doi]
- Effect of Ambient on the Recovery of Hot-Carrier Degraded DevicesMaurits J. de Jong, Cora Salm, Jurriaan Schmitz. 1-6 [doi]
- Backside Die-Edge and Underfill Fillet Cracks Induced by Additional Tensile Stress from Increasing Die-to-Package Ratio in Bare-Die FCBGAKhai Nguyen, Ernie Opiniano, Randolph Mah. 1-4 [doi]
- Thermal Characterization and TCAD Modeling of a Power Amplifier in 45RFSOI for 5G mmWave ApplicationsPeter C. Paliwoda, M. A. Rabie, O. D. Restrepo, E. Cruz Silva, E. Kaltalioglu, F. Guarin, K. Barnett, J. Johnson, W. Taylor, M. Boenke, B. Min. 1-5 [doi]
- How to write a compact reliability model with the Open Model Interface (OMI)W. Rhett Davis, Colin Shaw, Ahmed Ramadan Hassan. 1-2 [doi]
- Reliability and Variability of Advanced CMOS Devices at Cryogenic TemperaturesA. Grill, Erik Bury, J. Michl, Stanislav Tyaginov, Dimitri Linten, Tibor Grasser, Bertrand Parvais, Ben Kaczer, Michael Waltl, I. Radu. 1-6 [doi]
- ESD Robustness of GaN-on-Si Power Devices under Substrate Biases by means of TLP/VFTLP TestsWen Yang, Nicholas Stoll, Jiann-shiun Yuan. 1-5 [doi]
- Dielectric Reliability Study of 21 nm Pitch Interconnects with Barrierless Ru FillAlicja Lesniewska, Philippe J. Roussel, D. Tierno, V. Vega Gonzalez, M. H. van der Veen, P. Verdonck, Nicolas Jourdan, C. J. Wilson, Zsolt Tokei, Kris Croes. 1-6 [doi]
- Further Investigation on Mechanism of Trap Level Modulation in Silicon Nitride Films by Fluorine IncorporationHarumi Seki, Yasushi Nakasaki, Yuichiro Mitani. 1-7 [doi]
- Modeling of Charge Failure Mechanisms during the Short Term Retention Depending on Program/Erase Cycle Counts in 3-D NAND Flash MemoriesChangbeom Woo, Shinkeun Kim, Jaeyeol Park, Hyungcheol Shin, HaeSoo Kim, Gil-Bok Choi, Moon-Sik Seo, Keum Hwan Noh. 1-6 [doi]
- Inverse Design of FinFET SRAM CellsRui Zhang 0048, Zhaocheng Liu, Kexin Yang, Taizhi Liu, Wenshan Cai, Linda Milor. 1-6 [doi]
- Exploring the DC reliability metrics for scaled GaN-on-Si devices targeted for RF/5G applicationsV. Putcha, Erik Bury, Jacopo Franco, A. Walke, S. E. Zhao, U. Peralagu, M. Zhao, A. Alian, Ben Kaczer, Niamh Waldron, Dimitri Linten, Bertrand Parvais, Nadine Collaert. 1-8 [doi]
- Reliability on EUV Interconnect Technology for 7nm and beyondTae-Young Jeong, Miji Lee, Yunkyung Jo, Jinwoo Kim, Min Kim, Myungsoo Yeo, Jinseok Kim 0005, Hyunjun Choi, Joosung Kim, Yoojin Jo, Yongsung Ji, Taiki Uemura, Hai Jiang, Dongkyun Kwon, Hwasung Rhee, Sangwoo Pae, Brandon Lee. 1-4 [doi]
- Analysis of charge-to-hot-carrier degradation in Ge pFinFETsWataru Mizubayashi, Hiroshi Oka, Koichi Fukuda, Yuki Ishikawa, Kazuhiko Endo. 1-4 [doi]
- Towards a Robust Approach to Threshold Voltage Characterization and High Temperature Gate Bias QualificationDaniel B. Habersat, Aivars J. Lelis, Ronald Green. 1-4 [doi]
- High-Current State triggered by Operating-Frequency ChangeL. Xu, J. Cao, S.-J. Wen, R. Fung, J. Markevitch, D. R. Ball, Bharat L. Bhuva. 1-4 [doi]
- Neuromorphic Computing with Phase Change, Device Reliability, and Variability ChallengesCharles Mackin, Pritish Narayanan, Stefano Ambrogio, Hsinyu Tsai, Katie Spoon, Andrea Fasoli, An Chen, Alexander Friz, Robert M. Shelby, Geoffrey W. Burr. 1-10 [doi]
- Effect of Drain-to-Source Voltage on Random Telegraph Noise Based on Statistical Analysis of MOSFETs with Various Gate ShapesR. Akimoto, Rihito Kuroda, Akinobu Teramoto, T. Mawaki, S. Ichino, Tomoyuki Suwa, Shigetoshi Sugawa. 1-6 [doi]
- Comparing Variation-tolerance and SEU/TID-Resilience of Three SRAM Cells in 28nm FD-SOI Technology: 6T, Quatro, and we-QuatroLe Dinh Trang Dang, Trinh Dinh Linh, Ngyuen Thanh Dat, Changhong Min, Jinsang Kim, Ik Joon Chang, Jin-Woo Han. 1-5 [doi]
- Analysis of The Hole Trapping Detrapping Component of NBTI Over Extended Temperature RangeNilotpal Choudhury, Narendra Parihar, Souvik Mahapatra. 1-5 [doi]
- On the Root Cause of Dynamic ON Resistance Behavior in AlGaN/GaN HEMTsSayak Dutta Gupta, Vipin Joshi, Rajarshi Roy Chaudhuri, Anant kr Singh, Sirsha Guha, Mayank Shrivastava. 1-4 [doi]
- Impact of Ferroelectric Wakeup on Reliability of Laminate based Si-doped Hafnium Oxide (HSO) FeFET Memory CellsT. Ali, K. Kühnel, M. Czernohorsky, M. Rudolph, B. Pätzold, R. Olivo, D. Lehninger, K. Mertens, F. Müller, M. Lederer, R. Hoffmann, Clemens Mart, M. N. Kalkani, P. Steinke, T. Kämpfe, J. Müller, J. Van Houdt, K. Seidel, L. M. Eng. 1-9 [doi]
- Investigating of SER in 28 nm FDSOI-Planar and Comparing with SER in Bulk-FinFETTaiki Uemura, Byungjin Chung, Jeongmin Jo, Hai Jiang, Yongsung Ji, Tae-Young Jeong, Rakesh Ranjan, Youngin Park, Kiil Hong, Seungbae Lee, Hwasung Rhee, Sangwoo Pae, Euncheol Lee, Jaehee Choi, Shota Ohnishi, Ken Machida. 1-5 [doi]
- NBTI Impact of Surface Orientation in Stacked Gate-All-Around Nanosheet TransistorHuimei Zhou, Miaomiao Wang, Jingyun Zhang, Koji Watanabe, Curtis Durfee, Shogo Mochizuki, Ruqiang Bao, Richard G. Southwick, Maruf Bhuiyan, Basker Veeraraghavan. 1-6 [doi]
- Thermomechanical behaviour of inverse diode in SiC MOSFETs under surge current stressS. Palanisamy, Josef Lutz, R. Boldyrjew-Mast, T. Basler. 1-6 [doi]
- Robust avalanche in GaN leading to record performance in avalanche photodiodeDong Ji, Burcu Ercan, Garret Benson, A. K. M. Newaz, Srabanti Chowdhury. 1-4 [doi]
- The Influence of Gate Bias on the Anneal of Hot-Carrier DegradationMichiel Vandemaele, Kai-Hsin Chuang, Erik Bury, Stanislav Tyaginov, Guido Groeseneken, Ben Kaczer. 1-7 [doi]
- Hot-Carrier induced Breakdown events from Off to On mode in NEDMOSAlain Bravaix, Edith Kussener, David Ney, Xavier Federspiel, Florian Cacho. 1-8 [doi]
- Comparison of variability of HCI induced drift for SiON and HKMG devicesX. Federspiel, C. Diouf, F. Cacho, E. Vincent. 1-5 [doi]
- Reversible dielectric breakdown in h-BN stacks: a statistical study of the switching voltagesJuan Bautista Roldán, D. Maldonado, Francisco Jiménez-Molinos, Christian Acal, Juan Eloy Ruiz-Castro, Ana M. Aguilera, F. Hui, J. Kong, Y. Shi, X. Jing, C. Wen, Marco Antonio Villena, Mario Lanza. 1-5 [doi]
- Hot Carrier Degradation in Cryo-CMOSW. Chakraborty, U. Sharma, S. Datta, S. Mahapatra. 1-5 [doi]
- A new technique for evaluating stacked nanosheet inner spacer TDDB reliabilityTian Shen, Koji Watanabe, Huimei Zhou, Michael Belyansky, Erin Stuckert, Jingyun Zhang, Andrew Greene, Veeraraghavan S. Basker, Miaomiao Wang. 1-5 [doi]
- Advanced Self-heating Model and Methodology for Layout Proximity Effect in FinFET TechnologyHai Jiang, Hyun-Chul Sagong, Jinju Kim, Hyewon Shim, Yoohwan Kim, Junekyun Park, Taiki Uemura, Yongsung Ji, Taeyoung Jeong, Dongkyun Kwon, Hwasung Rhee, Sangwoo Pae, Brandon Lee. 1-5 [doi]
- Self-healing LDMOSFET for high-voltage application on high-k/metal gate CMOS processJ. C. Liao, Paul Ko, M.-H. Hsieh, Zheng Zeng. 1-3 [doi]
- Improved Turn-on Uniformity & Failure Current Density by n-& p-Tap Engineering in Fin Based SCRsM. Monishmurali, Milova Paul, Mayank Shrivastava. 1-6 [doi]
- Correlation of Dielectric Breakdown and Nanoscale Adhesion in Silicon Dioxide Thin FilmsAlok Ranjan 0001, Sean J. O'Shea, Michel Bosman, J. Molina, Nagarajan Raghavan, Kin Leong Pey. 1-7 [doi]
- Physical Insights into Phosphorene Transistor Degradation Under Exposure to Atmospheric Conditions and Electrical StressJeevesh Kumar, Ansh, Asha Yadav, Anant Singh, Andrew Naclerio, Dmitri Zakharov, Piran Kidambi, Mayank Shrivastava. 1-4 [doi]
- Temperature Dependence of Single-Event Transient Pulse Widths for 7-nm Bulk FinFET TechnologyJ. Cao, L. Xu, S.-J. Wen, R. Fung, Balaji Narasimham, Lloyd W. Massengill, Bharat L. Bhuva. 1-5 [doi]
- Reliability and Breakdown Study of Erase Gate Oxide in Split-Gate Non-Volatile Memory DeviceL. Luo, Kalya Shubhakar, Sen Mei, Nagarajan Raghavan, F. Zhang, D. Shum, Kin Leong Pey. 1-6 [doi]
- On the impact of mechanical stress on gate oxide trappingA. Kruv, Ben Kaczer, A. Grill, M. Gonzalez, J. Franco, Dimitri Linten, Wolfgang Gös, Tibor Grasser, Ingrid De Wolf. 1-5 [doi]
- Dynamic vs Static Burn-in for 16nm ProductionJeffrey Zhang, Antai Xu, Daniel Gitlin, Desmond Yeo. 1-3 [doi]
- Sub-nanosecond Reverse Recovery Measurement for ESD DevicesAlex Ayling, Shudong Huang, Elyse Rosenbaum. 1-8 [doi]
- Comparative Study on the Energy Profile of NBTI-Related Defects in Si and Ferroelectric p-FinFETsLongda Zhou, Qingzhu Zhang, Hong Yang, Zhigang Ji, Zhaohao Zhang, Renren Xu, Huaxiang Yin, Wenwu Wang. 1-6 [doi]
- Failure Analysis of 100 nm AlGaN/GaN HEMTs Stressed under On- and Off-State StressTobias Kemmer, Michael Dammann, Martina Baeumler, Vladimir Polyakov, Peter Brückner, Helmer Konstanzer, Rüdiger Quay, Oliver Ambacher. 1-6 [doi]
- At-Speed Defect Localization by Combining Laser Scanning Microscopy and Power Spectrum AnalysisMary A. Miller, Edward I. Cole, Garth M. Kraus, Perry J. Robertson. 1-5 [doi]
- "Shift and Match" (S...M) method for channel mobility correction in degraded MOSFETsLinglin Jing, Rui Gao, Zhigang Ji, Runsheng Wang. 1-8 [doi]
- Degradation Detection of Power Switches in a Live Three Phase Inverter using SSTDR Signal Embedded PWM SequenceSourov Roy, Abu Hanif, Faisal Khan. 1-7 [doi]
- Aging Challenges in On-chip Voltage Regulator DesignVenkata Chaitanya Krishna Chekuri, Arvind Singh, Nael Mizanur Rahman, Edward Lee, Saibal Mukhopadhyay. 1-8 [doi]
- Conduction and Breakdown Mechanisms in Low-k Spacer and Nitride Spacer Dielectric Stacks in Middle of Line InterconnectsChen Wu, Adrian Chasin, S. Demuynck, N. Horiguchi, Kris Croes. 1-6 [doi]
- A New Implementation Approach for Reliability Design Rules against Plasma Induced Charging Damage from Well Configurations of Complex ICsAndreas Martin, Angelika Kamp. 1-9 [doi]
- Effects of Thermal Boundary Resistance on the Thermal Performance of GaN HEMT on DiamondA. El Helou, M. Tadjer, K. Hobart, P. E. Raad. 1-4 [doi]
- Device-aware inference operations in SONOS nonvolatile memory arraysChristopher H. Bennett, T. Patrick Xiao, Ryan Dellana, Ben Feinberg, Sapan Agarwal, Matthew J. Marinella, Vineet Agrawal, Venkatraman Prabhakar, Krishnaswamy Ramkumar, Long Hinh, Swatilekha Saha, Vijay Raghavan, Ramesh Chettuvetty. 1-6 [doi]
- Influence of high-voltage gate-oxide pulses on the BTI behavior of SiC MOSFETsS. Maaß, H. Reisinger, Thomas Aichinger, Gerald Rescher. 1-6 [doi]
- Reliability of Metal-Dielectric Structures Under Intermittent Current PulsingC. S. Lee, P. Vaitheeswaran, G. Subbarayan, Y. J. Park, J. Chung, S. Krishnan. 1-6 [doi]
- Enhanced Threshold Voltage Stability in ZnO Thin-Film-Transistors by Excess of Oxygen in Atomic Layer Deposited Al2O3Rodolfo A. Rodriguez-Davila, R. A. Chapman, M. Catalano, Manuel Quevedo-Lopez, C. D. Young. 1-5 [doi]
- Gate-Oxide Trapping Enabled Synaptic Logic TransistorX. Ju, D. S. Ang. 1-6 [doi]
- Analysis of BTI, SHE Induced BTI and HCD Under Full VG/VD Space in GAA Nano-Sheet N and P FETsNilotpal Choudhury, Uma Sharma, Huimei Zhou, Richard G. Southwick, Miaomiao Wang, Souvik Mahapatra. 1-6 [doi]
- BEoL Reliability, XPS and REELS Study on low-k Dielectrics to understand Breakdown MechanismsB. Wehring, R. Hoffmann, L. Gerlich, M. Czernohorsky, B. Uhlig, R. Seidel, T. Barchewitz, F. Schlaphof, Lutz Meinshausen, C. Leyens. 1-5 [doi]
- Influence of the magnetic field on dielectric breakdown in memristors based on h-BN stacksD. Maldonado, Juan Bautista Roldán, Andrés M. Roldán, Francisco Jiménez-Molinos, F. Hui, Y. Shi, Xu Jing, C. Wen, M. Lanza. 1-5 [doi]
- Statistical Analysis of Bit-Errors Distribution for Reliability of 3-D NAND Flash MemoriesNian-Jia Wang, Kuan-Yi Lee, Hsin-Yi Lin, Wei-Hao Hsiao, Ming-Yi Lee, Li-Kuang Kuo, Ding-Jhang Lin, Yen-Hai Chao, Chih-Yuan Lu. 1-5 [doi]
- Experimental Monitoring of Aging in CMOS RF Linear Power Amplifiers: Correlation Between Device and Circuit DegradationRosana Rodríguez, Albert Crespo-Yepes, Javier Martín-Martínez, Montserrat Nafría, Xavier Aragonès, Diego Mateo, Enrique Barajas. 1-7 [doi]
- Trends and Functional Safety Certification Strategies for Advanced Railway Automation SystemsJyotika Athavale, Andrea Baldovin, Michael Paulitsch. 1-7 [doi]
- Defect Spectroscopy in SiC DevicesMichael Waltl. 1-9 [doi]
- Double Layers Omega FETs with Ferroelectric HfZrO2 for One-Transistor MemoryK.-T. Chen, C. Lo, Y. Y. Lin, C.-Y. Chueh, C. Chang, G.-Y. Siang, Y.-J. Tseng, Y. J. Yang, F.-C. Hsieh, S. H. Chang, H. Liang, S.-H. Chiang, J. H. Liu, Y. D. Lin, P. C. Yeh, C. Y. Wang, H. Y. Yang, P.-J. Tzeng, M. H. Liao, S. T. Chang, Y.-Y. Tseng, M. H. Lee. 1-4 [doi]
- Reliability Characterization of Logic-Compatible NAND Flash Memory based Synapses with 3-bit per Cell Weights and 1μA Current StepsMinsu Kim, Jeehwan Song, Chris H. Kim. 1-4 [doi]
- Temperature Dependence and Temperature-Aware Sensing in Ferroelectric FETAniket Gupta, Kai Ni 0006, Om Prakash, Xiaobo Sharon Hu, Hussam Amrouch. 1-5 [doi]
- BTI and HCD Degradation in a Complete 32 × 64 bit SRAM Array - including Sense Amplifiers and Write Drivers - under Processor ActivityVictor M. van Santen, Simon Thomann, Chaitanya Pasupuleti, Paul R. Genssler, Narendra Gangwar, Uma Sharma, Jörg Henkel, Souvik Mahapatra, Hussam Amrouch. 1-7 [doi]
- Embracing the Unreliability of Memory Devices for Neuromorphic ComputingMarc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean Michel Portal, Damien Querlioz. 1-5 [doi]
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- Reliability Physics of GaN HEMT Microwave Devices: The Age of ScalingEnrico Zanoni, Matteo Meneghini, Gaudenzio Meneghesso, Fabiana Rampazzo, Daniele Marcon, Veronica Gao Zhan, Francesca Chiocchetta, Andreas Graff, Frank Altmann, Michél Simon-Najasek, David Poppitz. 1-10 [doi]
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- Front-plane and Back-plane Bias Temperature Instability of 22 nm Gate-last FDSOI MOSFETsYang Wang, Chen Wang, Tao Chen, Hao Liu, Chinte Kuo, Ke Zhou, Binfeng Yin, Lin Chen, Qing-Qing Sun. 1-5 [doi]
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- Study of the Walk-Out Effect of Junction Breakdown Instability of the High-Voltage Depletion-Mode N-Channel MOSFET for NAND Flash Peripheral Device and an Efficient Layout SolutionChieh Roger Lo, Teng-Hao Yeh, Wei-Chen Chen, Hang-Ting Lue, Keh-Chung Wang, Chih-Yuan Lu, Yao-Wen Chang, Yung-Hsiang Chen, Chu-Yung Liu. 1-6 [doi]
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- Design Optimization of MV-NMOS for ESD Self-protection in 28nm CMOS technologyKyong Jin Hwang, Sagar Premnath Karalkar, Vishal Ganesan, Sevashanmugam Marimuthu, Alban Zaka, Tom Herrmann, Bhoopendra Singh, Robert Gauthier. 1-4 [doi]
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