Lu Wan - researchr alias

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Viewing Publication 1 - 16 from 16

2024

Uncovering the Interactions Between the Enterprise AI Transformation, Supply Chain Concentration, and Corporate Risk-Taking CapacityYuhuan Sun, Lu Wan, Sachin Kumar Mangla, Xiaofeng Xu, Malin Song 0001. tem, 71:11315-11327, 2024. [doi]

2023

Optimal Design of Single-Layer and Multi-Layer Air-Core Inductors Considering Uncertainty FactorsLu Wan, Arun D. Khilnani, Xinglong Wu, Xiaokang Liu, Sergio Amedeo Pignari, David W. P. Thomas, Mark Sumner, Flavia Grassi. access, 11:134460-134472, 2023. [doi]

2020

Kansei design method based on product narrative design element analysisLu Wan, Li Lin. ijart, 12(4):283-300, 2020. [doi]

2019

Brain-to-Brain Synchrony and Learning Outcomes Vary by Student-Teacher Dynamics: Evidence from a Real-world Classroom Electroencephalography StudyDana Bevilacqua, Ido Davidesco, Lu Wan, Kim Chaloner, Jess Rowland, Mingzhou Ding, David Poeppel, Suzanne Dikker. jocn, 31(3), 2019. [doi]

2018

C-Mine: Data Mining of Logic Common Cases for Improved Timing Error Resilience with Energy EfficiencyChen-Hsuan Lin, Lu Wan, Deming Chen. todaes, 23(2), 2018. [doi]

2014

C-Mine: Data Mining of Logic Common Cases for Low Power Synthesis of Better-Than-Worst-Case DesignsChen-Hsuan Lin, Lu Wan, Deming Chen. dac 2014: 1-6 [doi]

2013

Quantifying cognitive state from EEG using phase synchronyLu Wan, Bilal H. Fadlallah, Andreas Keil, José C. Príncipe. embc 2013: 5809-5812 [doi]

2012

Analysis and optimization of digital circuit dynamic behaviorLu Wan. PhD thesis, University of Illinois Urbana-Champaign, USA, 2012. [doi]

CCP: common case promotion for improved timing error resilience with energy efficiencyLu Wan, Deming Chen. islped 2012: 135-140 [doi]

Analysis of Digital Circuit Dynamic Behavior With Timed Ternary Decision Diagrams for Better-Than-Worst-Case DesignLu Wan, Deming Chen. tcad, 31(5):662-675, 2012. [doi]

A Coarse-Grained Reconfigurable Architecture with Compilation for High PerformanceLu Wan, Chen Dong, Deming Chen. ijrc, 2012, 2012. [doi]

2011

Temperature aware statistical static timing analysisArtem Rogachev, Lu Wan, Deming Chen. iccad 2011: 103-110 [doi]

2010

LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and OptimizationDeming Chen, Jason Cong, Yiping Fan, Lu Wan. tvlsi, 18(4):564-577, 2010. [doi]

Analysis of circuit dynamic behavior with timed ternary decision diagramLu Wan, Deming Chen. iccad 2010: 516-523 [doi]

2009

Blueshift: Designing processors for timing speculation from the ground upBrian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey J. Cook, Josep Torrellas, Deming Chen, Craig B. Zilles. hpca 2009: 213-224 [doi]

DynaTune: Circuit-level optimization for timing speculation considering dynamic path behaviorLu Wan, Deming Chen. iccad 2009: 172-179 [doi]

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