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    Journal: IEEE Design & Test of Computers

    Volume 15, Issue 4

    3 -- 0Yervant Zorian. Challenges and Options
    4 -- 6Mukund Modi. IEEE Standards Coordinating Committee 20
    7 -- 11Bill Bottoms. The Third Millennium s Test Dilemma
    12 -- 16Ramesh Karri, Michael Nicolaidis. Guest Editors Introduction: Online VLSI Testing
    17 -- 24Hussain Al-Asaad, Brian T. Murray, John P. Hayes. Online BIST for Embedded Systems
    25 -- 35Samuel Norman Hamilton, Alex Orailoglu. Efficient Self-Recovering ASIC Design
    36 -- 41Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig. Synthesizing Fast, Online-Testable Control Units
    42 -- 48Cecilia Metra, Michele Favalli, Bruno Riccò. Concurrent Checking of Clock Signal Correctness
    49 -- 56Jien-Chung Lo. Online Current Testing
    57 -- 65Eberhard Böhl, Thomas Lindenkreuz, Matthias Meerwein. On-Chip IDDQ Testing in the AE11 Fail-Stop Controller
    66 -- 74Cristiana Bolchini, Fabio Salice, Donatella Sciuto. Fault Analysis for Networks with Concurrent Error Detection
    75 -- 81Glenn H. Chapman, Benoit Dufort. Using Laser Defect Avoidance to Build Large-Area FPGAs
    82 -- 88. Deep-Submicron Noise
    89 -- 92. IEEE Design & Test of Computers, 1998 Annual Index, Volume 15
    93 -- 94. TTTC Newsletter
    95 -- 0. Design Automation Technical Committee Newsletter
    96 -- 0Scott Davidson. The Last Byte

    Volume 15, Issue 3

    2 -- 0. Conference Reports
    3 -- 0Yervant Zorian. Once Again, a Super Issue
    4 -- 7Wilfred Corrigan. ASIC Challenges: Emerging from a Primordial Soup
    8 -- 9David E. Schimmel, Chryssa Dislis. Guest Editors Introduction: Early Modeling and Analysis of Packaged Systems
    10 -- 19Peter Sandborn, Mike Vertal. Analyzing Packaging Trade-Offs During System Design
    20 -- 26Michael Scheffler, Daniel Ammann, Andreas Thiel, Claus M. Habiger, Gerhard Tröster. Modeling and Optimizing the Costs of Electronic Systems
    28 -- 34Earl E. Swartzlander Jr.. VLSI, MCM, and WSI: A Design Comparison
    35 -- 43Claudio Truzzi. The Role of the Good-Die Project in Miniaturized-System Design
    44 -- 55Koppolu Sasidhar, Leon Alkalai, Abhijit Chatterjee. Testing NASA s 3D-Stack MCM Space Flight Computer
    56 -- 57Wayne M. Needham. Guest Editor s Introduction: Microprocessor Testing Today
    58 -- 63Jeff Brauch, Jay Fleischman. Design of Cache Test Hardware on the HP PA8500
    64 -- 69R. Scott Fetherston, Imtiaz P. Shaik, Siyad C. Ma. Testability Features of the AMD-K6 Microprocessor
    70 -- 76Dale Amason, Alfred L. Crouch, Renny Eisele, Grady Giles, Michael Mateja. Test Development for Second-Generation ColdFire Microprocessors
    77 -- 82Adrian Carbine, Derek Feltham. Pentium Pro Processor Design for Test and Debug
    83 -- 89Thomas G. Foote, Dale E. Hoffman, William V. Huott, Timothy J. Koprowski, Mary P. Kusko, Bryan J. Robbins. Testing the 500-MHz IBM S/390 Microprocessor
    90 -- 97Carol Pyron, Javier Prado, James Golab. Test Strategy for the PowerPC 750 Microprocessor
    98 -- 104Carol Stolicny, Richard Davies, Pamela McKernan, Tuyen Truong. Alpha 21164 Manufacturing Test Development and Coverage Analysis
    105 -- 111Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian. Effective Built-In Self-Test for Booth Multipliers
    112 -- 118Michel Dubois, Jaeheon Jeong, Yong Ho Song, Adrian Moga. Rapid Hardware Prototyping on RPM-2
    119 -- 124. A D&T Roundtable: Challenges for Low-Power and High-Performance Chips
    125 -- 126. Test Technology TC Newsletter
    126 -- 127. Design Automation Technical Committee Newsletter
    128 -- 0Scott Davidson. Minutes Found on a Cave Wall

    Volume 15, Issue 2

    1 -- 0. Our new world
    3 -- 0. Letters
    4 -- 0Patrick Dewilde. Date 98
    5 -- 7. Panel Summaries
    8 -- 13Colin Maunder. The Future: Plug and Pray?
    14 -- 21Vladimir Székely, Márta Rencz, Bernard Courtois. Tracing the Thermal Behavior of ICs
    22 -- 33Kayhan Küçükçakar, Chih-Tung Chen, Jie Gong, Wim Philipsen, Thomas E. Tkacik. Matisse: An Architectural Design Tool for Commodity ICs
    34 -- 44Peter J. Ashenden, Philip A. Wilsey, Dale E. Martin. SUAVE: Extending VHDL to Improve Data Modeling Support
    45 -- 54Rolf Ernst. Codesign of Embedded Systems: Status and Trends
    56 -- 64Yeong-Ruey Shieh, Cheng-Wen Wu. Control and Observation Structures for Analog Circuits
    65 -- 72Wen-Jong Fang, Allen C.-H. Wu. Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs
    73 -- 79Samvel K. Shoukourian. A Unified Design Methodology for Offline and Online Testing
    86 -- 92Meh-Ron Amerian, William D. Atwell Jr., Ian Burgess, Gary D. Fleeman, David Y. Lepejian, T. W. Williams, Farzad Zarrinfar, Yervant Zorian. A D&T Roundtable: Testing Mixed Logic and DRAM Chips
    93 -- 0. DATC Newsletter
    94 -- 95. Test Technology TC Newsletter
    96 -- 0Scott Davidson. The Newer Colossus

    Volume 15, Issue 1

    0 -- 0Dilip K. Bhavsar, Yervant Zorian. ITC 97 Panel Sessions
    1 -- 0Yervant Zorian. D&T: 15th Year in Service
    4 -- 5. News
    6 -- 0Teruhiko Yamada. 1997 Asian Test Symposium
    8 -- 9Fabrizio Lombardi. Field-Programmable Gate Arrays
    10 -- 15Vaughn Betz, Jonathan Rose. How Much Logic Should Go in an FPGA Logic Block?
    16 -- 23Miriam Leeser, Waleed Meleis, Mankuan Michael Vai, Silviu M. S. A. Chiricescu, Weidong Xu, Paul M. Zavracky. Rothko: A Three-Dimensional FPGA
    24 -- 29Shanzhen Xing, William W. H. Yu. FPGA Adders: Performance Evaluation and Optimal Design
    30 -- 38Roger Woods, David W. Trainor, Jean-Paul Heron. Applying an XC6200 to Real-Time Image Processing
    39 -- 44Tomoo Inoue, Satoshi Miyazaki, Hideo Fujiwara. Universal Fault Diagnosis for Lookup Table FPGAs
    45 -- 50Michel Renovell, Jean Michel Portal, Joan Figueras, Yervant Zorian. Testing the Interconnect of RAM-Based FPGAs
    51 -- 62Kenneth L. Shepard, Vinod Narayanan. Conquering Noise in Deep-Submicron Digital ICs
    63 -- 70Stefano Barbagallo, Davide Medina, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda. Integrating Online and Offline Testing of a Switching Memory
    71 -- 82Felice Balarin, Luciano Lavagno, Praveen K. Murthy, Alberto L. Sangiovanni-Vincentelli. Scheduling for Embedded Real-Time Systems
    83 -- 90. A D&T Roundtable: Relative Effectiveness of Tests
    92 -- 94. Test Technology TC Newsletter
    95 -- 0. Design Automation TC Newsletter
    96 -- 0Hideo Fujiwara. Needed: Third-generation ATPG Benchmarks
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