Hussain Al-Asaad - researchr alias

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Viewing Publication 1 - 32 from 32

2024

Advancements in Secure Computing: Exploring Automated Repair Debugging and Verification Techniques for Hardware DesignAlireza Abolhasani Zeraatkar, Parnian Shabani Kamran, Hussain Al-Asaad. ccwc 2024: 357-364 [doi]

On the Performance of Malware Detection Classifiers Using Hardware Performance CountersAlireza Abolhasani Zeraatkar, Parnian Shabani Kamran, Inderpreet Kaur, Nagabindu Ramu, Tyler Sheaves, Hussain Al-Asaad. smartnets 2024: 1-6 [doi]

2022

A Brief Survey of Fault Tolerant Techniques for Field Programmable Gate ArraysRaihana Yarzada, Divya Singh, Hussain Al-Asaad. ccwc 2022: 823-828 [doi]

2010

Time-Redundant Logic-Level Protection Mechanisms from Soft Errors in Digital SystemsHussain Al-Asaad. cdes 2010: 17-21

Efficient techniques for reducing error latency in on-line periodic built-in self-testHussain Al-Asaad. imm, 13(4):28-32, 2010. [doi]

A Comparison of NMOS to PMOS Starved Buffer Implementations for the Delay Line in a PWM DC-DC ConvertersCalvin Chiem, Hussain Al-Asaad. cdes 2010: 10-16

2009

Detection and Isolation of Faulty Processors in Multiprocessor Systems via TMR-Based Time Redundant Task SchedulingHussain Al-Asaad. cdes 2009: 42-47

Low Power Methodologies and Challenges for PWM DC-DC ConvertersCalvin Chiem, Hussain Al-Asaad. cdes 2009: 70-75

2008

A Novel Mutation-Based Validation Paradigm for High-Level Hardware DescriptionsJorge Campos, Hussain Al-Asaad. tvlsi, 16(11):1499-1512, 2008. [doi]

2007

Efficient Global Fault Collapsing for Combinational Library ModulesHussain Al-Asaad. cdes 2007: 37-43

A New Statistical Approach for Glitch Estimation in Combinational CircuitsAhmed Sayed, Hussain Al-Asaad. iscas 2007: 1641-1644 [doi]

2006

Circuit Profiling Mechanisms for High-Level {ATPG}Jorge Campos, Hussain Al-Asaad. mtv 2006: 9-14 [doi]

Survey and Evaluation of Low-Power Flip-FlopsAhmed Sayed, Hussain Al-Asaad. cdes 2006: 77-83

2005

2004

Approaches for Monitoring Vectors on Microprocessor BusesHector Arteaga, Hussain Al-Asaad. csreaESA 2004: 393-398

Mutation-based validation of high-level microprocessor implementationsJorge Campos, Hussain Al-Asaad. hldvt 2004: 81-86 [doi]

Survey and Evaluation of Low-Power Full-Adder CellsAhmed Sayed, Hussain Al-Asaad. csreaESA 2004: 332-338

2003

Fault Tolerance for Multiprocessor Systems Via Time Redundant Task SchedulingHussain Al-Asaad, Alireza Sarvi. vlsi 2003: 51-57

2000

ESIM: A Multimodel Design Error and Fault Simulator for Logic CircuitsHussain Al-Asaad, John P. Hayes. vts 2000: 221-230 [doi]

Logic Design Validation via Simulation and Automatic Test Pattern GenerationHussain Al-Asaad, John P. Hayes. et, 16(6):575-589, 2000. [doi]

1998

Lifetime validation of digital systems via fault modeling and test generationHussain Al-Asaad. PhD thesis, University of Michigan, USA, 1998. [doi]

Online BIST for Embedded SystemsHussain Al-Asaad, Brian T. Murray, John P. Hayes. dt, 15(4):17-24, 1998. [doi]

Scalable Test Generators for High-Speed Datapath CircuitsHussain Al-Asaad, John P. Hayes, Brian T. Murray. et, 12(1-2):111-125, 1998. [doi]

High-level design verification of microprocessors via error modelingDavid Van Campenhout, Hussain Al-Asaad, John P. Hayes, Trevor N. Mudge, Richard B. Brown. todaes, 3(4):581-599, 1998. [doi]

1995

Design verification via simulation and automatic test pattern generationHussain Al-Asaad, John P. Hayes. iccad 1995: 174-180 [doi]

1994

Distributed Reconfiguration of Fault Tolerant VLSI Mulipipeline Arrays with Constant Interstage Path LengthsHussain Al-Asaad, Mankuan Michael Vai, James Feldman. iccd 1994: 75-78

1993

A Two-Phase Reconfiguration Strategy for Extracting Linear Arrays Out of Two-Dimensional ArchitecturesHussain Al-Asaad, Elias S. Manolakos. dft 1993: 56-63

Concurrent error correction in iterative circuits by recomputing with partitioning and votingHussain Al-Asaad, Edward C. Czeck. vts 1993: 174-177 [doi]

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