External Links

Journal: IEEE Transactions on Computers

Volume 31, Issue 9

809 -- 819Peter M. Flanders. A Unified Approach to a Class of Data Movements on an Array Processor
820 -- 824Masahiro Sowa, Tadao Murata. A Data Flow Computer Architecture with Program and Token Memories
825 -- 834Forbes J. Burkowski. A Hardware Hashing Scheme in the Design of a Multiterm String Comparator
835 -- 850Wesley W. Chu, Paul Hurley. Optimal Query Processing for Distributed Database Systems
851 -- 863Martin C. Wei, Howard A. Sholl. An Expression Model for Extraction and Evaluation of Parallelism in Control Structures
863 -- 870Dhiraj K. Pradhan, Sudhakar M. Reddy. A Fault-Tolerant Communication Architecture for Distributed Systems
870 -- 882Hung Chi Lai, Saburo Muroga. Logic Networks of Carry-Save Adders
883 -- 891Martin de Prycker. On the Development of a Measurement System for High Level Language Program Statistics
892 -- 897Thomas Ottmann, Arnold L. Rosenberg, Larry J. Stockmeyer. A Dictionary Machine (for VLSI)
898 -- 899V. A. Signaevskii. Comments on Multiprocessor Scheduling with Memory Allocation - A Deterministic Approach
899 -- 906Farhad Kamangar, K. R. Rao. Fast Algorithms for the 2-D Discrete Cosine Transform
907 -- 913Romas Aleliunas, Arnold L. Rosenberg. On Embedding Rectangular Grids in Square Grids
913 -- 917Michael K. Molloy. Performance Analysis Using Stochastic Petri Nets

Volume 31, Issue 8

709 -- 714George W. Gerrity. Computer Representation of Real Numbers
715 -- 722Donald F. Towsley, G. Venkatesh. Window Random Access Protocols for Local Computer Networks
723 -- 729Paul D. Amer. A Measurement Center for the NBS Local Area Computer Network
730 -- 738Gerard J. Holzmann. A Theory for Protocol Validation
746 -- 751To-Yat Cheung. A Method for Equijoin Queries in Distributed Relational Databases
752 -- 771Vittal Kini, Daniel P. Siewiorek. Automatic Generation of Symbolic Reliability Functions for Processor-Memory-Switch Structures
771 -- 784Edmund M. Clarke, Christos Nikolaou. Distributed Reconfiguration Strategies for Fault-Tolerant Multiprocessor Systems
784 -- 791Gérard Memmi, Yves Raillard. Some New Results About the (::::d, k::::) Graph Problem
791 -- 795Noel R. Strader, V. Thomas Rhyne. A Canonical Bit-Sequential Multiplier
795 -- 800J. M. Herron, J. Farley, Kendall Preston Jr., H. Sellner. A General-Purpose High-Speed Logical Transform Image Processor
800 -- 801John P. Robinson, Chia-Lung Yeh. A Method for Modulo-2 Minimization
802 -- 805S. Dormido, M. A. Canto. An Upper Bound for the Synthesis of Generalized Parallel Counters

Volume 31, Issue 7

577 -- 588Ytzhak H. Levendel, Premachandran R. Menon. Test Generation Algorithms for Computer Hardware Description Languages
589 -- 595Janak H. Patel, Leona Y. Fung. Concurrent Error Detection in ALU s by Recomputing with Shifted Operands
596 -- 602Shigeo Kaneda, Eiji Fujiwara. Single Byte Error Correcting - Double Byte Error Detecting Codes for Memory Systems
602 -- 608David J. Taylor, James P. Black. Principles of Data Structure Error Correction
609 -- 616Tülin Erdim Mangir, Algirdas Avizienis. Fault-Tolerant Design for VLSI: Effect of Interconnect Requirements on Yield Improvement of VLSI Designs
616 -- 630P. M. Melliar-Smith, Richard L. Schwartz. Formal Specification and Mechanical Verification of SIFT: A Fault-Tolerant Flight Control System
630 -- 636Harry Rudin, Colin H. West. A Validation Technique for Tightly Coupled Protocols
637 -- 647Jean-Michel Ayache, Jean-Pierre Courtiat, Michel Diaz. REBUS, A Fault-Tolerant Distributed System for Industrial Real-Time Control
648 -- 657John F. Meyer. Closed-Form Solutions of Performability
658 -- 671Xavier Castillo, Stephen R. McConnel, Daniel P. Siewiorek. Derivation and Calibration of a Transient Error Reliability Model
672 -- 677Miron Abramovici. A Hierarchical, Path-Oriented Approach to Fault Diagnosis in Modular Combinational Circuits
677 -- 681Javad Khakbaz. Totally Self-Checking Checker for 1-out-of-::::n:::: Code Using Two-Rail Codes
681 -- 685David J. Lu. Watchdog Processors and Structural Integrity Checking
685 -- 689Ali Mili. Self-Stabilizing Programs: The Fault-Tolerant Capability of Self-Checking Programs
689 -- 692Robert E. Glaser, Gerald M. Masson. The Containment Set Approach to Upsets in Digital Systems
692 -- 697Santosh K. Shrivastava, Fabio Panzieri. The Design of a Reliable Remote Procedure Call Mechanism
697 -- 706Ravishankar K. Iyer, Steven E. Butner, Edward J. McCluskey. A Statistical Failure/Load Relationship: Results of a Multicomputer Study

Volume 31, Issue 6

478 -- 487Der-Tsai Lee. On ::::k::::-Nearest Neighbor Voronoi Diagrams in the Plane
488 -- 514Svetlana P. Kartashev, Steven I. Kartashev. Distribution of Programs for a System with Dynamic Architecture
514 -- 520Howard Trickey. Good Layouts for Pattern Recognizers
521 -- 530Bella Bose, T. R. N. Rao. Theory of Unidirectional Error Correcting/Detecting Codes
531 -- 540Flaviu Cristian. Exception Handling and Software Fault Tolerance
540 -- 546Fred J. Taylor. A VLSI Residue Arithmetic Multiplier
546 -- 547Daniel M. Dias, Manoj Kumar. Comments on Interference Analysis of Shuffle/Exchange Networks
547 -- 551John J. Metzner. Convolutionally Encoded Memory Protection
551 -- 554William A. Porter. Error Tolerant Design of Multivalued Logic Functions
554 -- 555Akira Shiozaki. Single Asymmetric Error-Correcting Cyclic AN Codes
555 -- 560Hideo Fujiwara, Shunichi Toida. The Complexity of Fault Detection Problems for Combinational Logic Circuits
564 -- 568Bella Bose, Dhiraj K. Pradhan. Optimal Unidirectional Error Detecting/Correcting Codes

Volume 31, Issue 5

349 -- 362Neil R. Lincoln. Technology and Design Tradeoffs in the Creation of a Modern Supercomputer
363 -- 376David J. Kuck, Richard A. Stokes. The Burroughs Scientific Processor (BSP)
377 -- 384Kenneth E. Batcher. Bit-Serial Parallel Processing Systems
385 -- 398Robert G. Arnold, Robert O. Berg, James W. Thomas. A Modular Approach to Real-Time Supersystems
399 -- 409Earl E. Swartzlander Jr., Barry K. Gilbert. Supersystems: Technology and Architecture
410 -- 418James P. Ignizio, David F. Palmer, Catherine M. Murphy. A Multicriteria Approach to Supersystem Architecture Definition
419 -- 434Keki B. Irani, Nicholas G. Khabbaz. A Methodology for the Design of Communication Networks and the Distributuion of Data in Distributed Supercomputer Systems
435 -- 442Duncan H. Lawrie, Chandra R. Vora. The Prime Memory System for Array Access
443 -- 454George B. Adams III, Howard Jay Siegel. The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems
455 -- 473Bruce W. Arden, Ran Ginosar. MP/C: A Multiprocessor/Computer Architecture

Volume 31, Issue 4

270 -- 277George B. Adams III, Howard Jay Siegel. On the Number of Permutations Performable by the Augmented Data Manipulator Network
278 -- 288Jarek Deminet. Experience with Multiprocessor Algorithms
288 -- 295John P. Fishburn, Raphael A. Finkel. Quotient Networks
296 -- 304Janak H. Patel. Analysis of Multiprocessors with Private Cache Memories
305 -- 310Gabriel M. Silberman. Determining Fault Ratios in Multilevel Delayed-Staging Storage Hierarchies
311 -- 317Catherine Bellon, Gabriele Saucier. Protection Against External Errors in a Dedicated System
318 -- 321Chung-Ho Chen. An Algebraic Model of Arithmetic Codes
321 -- 325Fred J. Taylor, Chao H. Huang. An Autoscale Residue Multiplier
325 -- 327Henk J. Sips. Comments on An ::::O(n):::: Parallel Multiplier with Bit-Sequential Input and Output
327 -- 328Eiichi Tanaka, King-sun Fu. Correction to Error-Correcting Parsers for Formal Languages
328 -- 335Alan Feldstein, Richard Goodman. Loss of Significance in Floating Point Subtraction and Addition
335 -- 338Laxmi N. Bhuyan, Dharma P. Agrawal. On the Generalized Binary System
338 -- 341David Nassimi, Sartaj Sahni. Optimal BPC Permutations on a Cube Connected SIMD Computer

Volume 31, Issue 3

181 -- 187Hans-Werner Six, Derick Wood. Counting and Reporting Intersections of ::::d::::-Ranges
188 -- 193Toshihide Ibaraki, Tsunehiko Kameda. Deadlock-Free Systems for a Bounded Number of Processes
194 -- 207Werner E. Kluge, Kurt Lautenbach. The Orderly Resolution of Memory Access Conflicts Among Competing Channel Processes
208 -- 218Leah J. Siegel, Howard Jay Siegel, Arthur E. Feather. Parallel Processing Approaches to Image Correlation
219 -- 222Will E. Leland, Marvin H. Solomon. Dense Trivalent Graphs for Processor Interconnection
223 -- 231Gregor von Bochmann. Hardware Specification with Temporal Logic: En Example
231 -- 239Jochen A. G. Jess, H. G. M. Kees. A Data Structure for Parallel ::::L/U:::: Decomposition
239 -- 248. Markovs Models for Multiple Bus Multiprocessor Systems
249 -- 260Robert Geist, Kishor S. Trivedi. Optimal Design of Multilevel Storage Hierarchies
260 -- 264Richard P. Brent, H. T. Kung. A Regular Layout for Parallel Adders
265 -- 266Noel R. Strader II. Comments on Magnetic Bubble Memory Architectures for Supporting Associative Searching of Relational Databases
265 -- 0Marek Kubale. Comments on Decomposition of Permutation Networks

Volume 31, Issue 2

93 -- 109Louis J. Hafer, Alice C. Parker. Automated Synthesis of Digital Hardware
110 -- 118David D. Riley, Robert J. Baron. Design and Evaluation of a Synchronous Triangular Interconnection Scheme for Interprocessor Communications
119 -- 129Stefano Ceri, Giuseppe Pelagatti. Allocation of Operations in Distributed Database Access
129 -- 139Yacoub M. El-Ziq, Stephen Y. H. Su. Fault Diagnosis of MOS Combinational Networks
140 -- 147X. Chen, S. L. Hurst. A Comparison of Universal-Logic-Module Realizations and Their Application in the Synthesis of Combinatorial and Sequential Logic Networks
148 -- 154David Nassimi, Sartaj Sahni. Parallel Algorithms to Set Up the Benes Permutation Network
155 -- 163Martin de Prycker. A Performance Analysis of the Implementation of Addressing Methods in Block-Structured Languages
163 -- 164Michael J. O Donnell, Carl H. Smith. A Combinatorial Problem Concerning Processor Interconnection Networks
164 -- 170Pramod K. Varshney, Carlos R. P. Hartmann, Jamie M. de Faria Jr.. Application of Information Theory to Sequential Fault Diagnosis
170 -- 175Kuang Y. Liu. Architecture for VLSI Design of Reed-Solomon Encoders
175 -- 177Peter R. Roeser, M. E. Jernigan. Fast Haar Transform Algorithms

Volume 31, Issue 12

1133 -- 1141Lee A. Hollaar. Direct Implementation of Asynchronous Control Units
1142 -- 1156Takanobu Baba, Ken Ishikawa, Kenzo Okuda. A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric Functions
1157 -- 1164Erol Gelenbe, Alain Lichnewsky, Andreas Stafylopatis. Experience with the Parallel Solutions of Partial Differential Equations on a Distributed Computing System
1165 -- 1172Miron Abramovici, Melvin A. Breuer. Fault Diagnosis in Synchronous Sequential Circuits Based on an Effect-Cause Analysis
1173 -- 1179Shinji Nakamura, Gerald M. Masson. Lower Bounds on Crosspoints in Concentrators
1179 -- 1191Marco Ajmone Marsan, Gianfranco Balbo, Gianni Conte. Comparative Performance Analysis of Single Bus Multiprocessor Architectures
1192 -- 1201Hiroto Yasuura, Naofumi Takagi, Shuzo Yajima. The Parallel Enumeration Sorting Scheme for VLSI
1202 -- 1214Robert J. McMillen, Howard Jay Siegel. Routing Schemes for the Augmented Data Manipulator Network in an MIMD System
1215 -- 1224Kai Hwang, Yeng-Heng Cheng. Partitioned Matrix Algorithms for VLSI Arithmetic Systems
1225 -- 1227D. T. Lee, Charles B. Silio Jr.. An Optimal Illumination Region Algorithm for Convex Polygons
1227 -- 1234Tomás Lang, Mateo Valero, Ignacio Alegre. Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors

Volume 31, Issue 11

1035 -- 1044Richard E. Buehrer, Hans-Joerg Brundiers, Hans Benz, Bernard Bron, Hansmartin Friess, Walter Haelg, Hans Jürgen Halin, Anders Isacson, Milan Tadian. The ETH-Multiprocessor EMPRESS: A Dynamically Configurable MIMD System
1045 -- 1053Kang G. Shin, Yann-Hang Lee, J. Sasidhar. Design of HM:::2:::p - A Hierarchical Multimicroprocessor for General Purpose Applications
1054 -- 1066Sun-Yuan Kung, K. S. Arun, Ron J. Gal-Ezer, D. V. Bhaskar Rao. Wavefront Array Processor: Language, Architecture, and Applications
1067 -- 1075Keki B. Irani, Kuo-Wei Chen. Minimization of Interprocessor Communication for Parallel Computation
1076 -- 1082Robert K. Montoye, Duncan H. Lawrie. A Practical Algorithm for the Solution of Triangular Systems on a Parallel Processing System
1083 -- 1099Michel Dubois, Faye A. Briggs. Effects of Cache Coherency in Multiprocessors
1099 -- 1109Philip Heidelberger, Kishor S. Trivedi. Queueing Network Models for Parallel Processing with Asynchronous Tasks
1109 -- 1116Mark A. Franklin, Donald F. Wann, William J. Thomas. Pin Limitations and Partitioning of VLSI Interconnection Networks
1116 -- 1121David W. L. Yen, Janak H. Patel, Edward S. Davidson. Memory Interference in Synchronous Multiprocessor Systems
1121 -- 1126Dan I. Moldovan. On the Analysis and Synthesis of VLSI Algorithms
1126 -- 1130Bruce W. Weide. Modeling Unusual Behavior of Parallel Algorithms

Volume 31, Issue 10

923 -- 933Chuan-lin Wu, Tse-Yun Feng, Min-Chang Lin. Star: A Local Network System for Real-Time Management of Imagery Data
934 -- 942Michael R. Warpenburg, Leah J. Siegel. SIMD Image Resampling
943 -- 951Todd Kushner, Angela Y. Wu, Azriel Rosenfeld. Image Processing on ZMOB
952 -- 962Dharma P. Agrawal, Ramesh Jain. A Pipelined Pseudoparallel System Architecture for Real-Time Dynamic Scene Analysis
963 -- 968Wesley E. Snyder, Carla D. Savage. Content Adressable Read/Write Memories for Image Analysis
969 -- 983Faye A. Briggs, King-sun Fu, Kai Hwang, Benjamin W. Wah. PUMPS Architecture for Pattern Analysis and Image Database Management
983 -- 996Kazunori Yamaguchi, Tosiyasu L. Kunii. PICCOLO Logic for a Picture Database Computer and Its Implementation
997 -- 1000Dan Antonsson, Björn Gudmundsson, Tomas Hedblom, Björn Kruse, Arne Linge, Peter Lord, Tomas Ohlsson. PICAP - A System Approach to Image Processing
1000 -- 1009Ashok V. Kulkarni, David W. L. Yen. Systolic Processing and an Implementation for Signal and Image Processing
1009 -- 1017Howard A. Sholl, Kevin Morris, James Norris. A Multimicroprocessor System for Real-Time Classification of Railroad Track Flaws
1017 -- 1022Lionel M. Ni, Kwan Y. Wong, Daniel T. Lee, Ronnie K. Poon. A Microprocessor-Based Office Image Processing System
1022 -- 1025Leonard Uhr. Comparing Serial Computers, Arrays, and Networks Using Measures of Active Resources
1025 -- 1031Prashant D. Vaidya, Linda G. Shapiro, Robert M. Haralick, Gary J. Minden. Design and Architectural Implications of a Spatial Information System

Volume 31, Issue 1

2 -- 15Thomas W. Williams, Kenneth P. Parker. Design for Testability - A Survey
16 -- 22Richard R. Shively. Architecture of a Programmable Digital Signal Processor
22 -- 29Vijay K. Vaishnavi. Computing Point Enclosures
29 -- 33Michael Feuer. Connectivity of Random Logic
34 -- 40André Thayse. Synthesis and Optimization of Programs by Means of ::::P::::-Funktions
41 -- 47Perng-Yi Richard Ma, Edward Y. S. Lee, Masahiro Tsuchiya. A Task Allocation Model for Distributed Computing Systems
48 -- 59Hector Garcia-Molina. Elections in a Distributed Computing System
60 -- 69Bruce W. Arden, Hikyu Lee. A Regular Network for Multicomputer Systems
70 -- 75Vojin G. Oklobdzija, Milos D. Ercegovac. A On-Line Square Root Algorithm
75 -- 77Gerhard Wustmann. Autocorrelation Function of Filtered ::::p::::-Level Maximal-Length Sequences
77 -- 78G. Lacroix, Philippe Marchegay, G. Piel. Comments on The Anomalous Behavior of Flip-Flops in Synchronizer Circuits
78 -- 81Richard W. Heuft, Warren D. Little. Improved Time and Parallel Processor Bounds for Fortran-Like Loops
runs on