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| 1816 | -- | 1824 | Jiacheng Wang, Wang Ling Goh, Xin Liu, Jun Zhou. A 12.77-MHz 31 ppm/°C On-Chip RC Relaxation Oscillator With Digital Compensation Technique |
| 1825 | -- | 1832 | Glauco Rogerio Cugler Fiorante, Javad Ghasemi, Payman Zarkesh-Ha, Sanjay Krishna. Spatio-Temporal Bias-Tunable Readout Circuit for On-Chip Intelligent Image Processing |
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| 1845 | -- | 1853 | Wei-Sung Chang, Tai-Cheng Lee. A 5 GHz Fractional-N ADC-Based Digital Phase-Locked Loops With -243.8 dB FOM |
| 1854 | -- | 1865 | Harald Homulle, Stefan Visser, Edoardo Charbon. A Cryogenic 1 GSa/s, Soft-Core FPGA ADC for Quantum Computing Applications |
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| 1933 | -- | 1943 | Alfonso Sánchez-Macián, Pedro Reviriego, Juan Antonio Maestro. Combined SEU and SEFI Protection for Memories Using Orthogonal Latin Square Codes |
| 1944 | -- | 1953 | Raziyeh Salarifard, Siavash Bayat Sarmadi, Mohammad Farmani. m) in Dual and Triangular Bases |
| 1954 | -- | 1963 | Wen Yan, Milos D. Ercegovac, He Chen. An Energy-Efficient Multiplier With Fully Overlapped Partial Products Reduction and Final Addition |
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| 2010 | -- | 2021 | Hui Liu, Haibo Wan, Chi K. Tse, Jinhu Lu. An Encryption Scheme Based on Synchronization of Two-Layered Complex Dynamical Networks |
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| 2098 | -- | 2107 | Amit Kumar Singha, Santanu Kapat. A Unified Framework for Analysis and Design of a Digitally Current-Mode Controlled Buck Converter |