Journal: IEEE Trans. on Circuits and Systems

Volume 66-I, Issue 9

3253 -- 0Elena Blokhina. Guest Editorial Special Issue on the 2019 International Symposium on Integrated Circuits and Systems
3254 -- 3265Matthew Schormans, Dai Jiang, Virgilio Valente, Andreas Demosthenous. Short-Range Quality-Factor Modulation (SQuirM) for Low Power High Speed Inductive Data Transfer
3266 -- 3278Xiaojun Bi, Zhen Gu, Qinfen Xu. Analysis and Design of Ultra-Large Dynamic Range CMOS Transimpedance Amplifier With Automatically-Controlled Multi-Current-Bleeding Paths
3279 -- 3287Xiong Song, Zhenghao Lu, Liying Cai, Xiaopeng Yu, Kiat Seng Yeo, Jer-Ming Chen. A Wideband dB-Linear VGA With Temperature Compensation and Active Load
3288 -- 3295Hao-Chung Cheng, Yen-Ting Chen, Po-Hung Chen, Yu-Te Liao. An Optically-Powered 432 MHz Wireless Tag for Batteryless Internet-of-Things Applications
3296 -- 3306Erfan Ghaderi, Ajith Sivadhasan Ramani, Arya A. Rahimi, Deukhyoun Heo, Sudip Shekhar, Subhanshu Gupta. An Integrated Discrete-Time Delay-Compensating Technique for Large-Array Beamformers
3307 -- 3316Ka-Fai Un, Gengzhen Qi, Jun Yin, Shiheng Yang, Shupeng Yu, Chio-In Ieong, Pui-In Mak, Rui P. Martins. 2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-µs Settling Time for Multi-ISM-Band ULP Radios
3317 -- 3329Jingcheng Tao, Chun-Huat Heng. A 2.2-GHz 3.2-mW DTC-Free Sampling ΔΣ Fractional-N PLL With -110-dBc/Hz In-Band Phase Noise and -246-dB FoM and -83-dBc Reference Spur
3330 -- 3339Xiaoteng Zhao, Yong Chen 0005, Pui-In Mak, Rui P. Martins. m Cell
3340 -- 3351Nikolaus Hammler, Andreia Cathelin, Philippe Cathelin, Boris Murmann. A Spectrum-Sensing DPD Feedback Receiver With 30× Reduction in ADC Acquisition Bandwidth and Sample Rate
3352 -- 3364Mohammad H. Naderi, Chulhyun Park, Suraj Prakash, Martin Kinyua, Eric G. Soenen, José Silva-Martínez. A 27.7 fJ/conv-step 500 MS/s 12-Bit Pipelined ADC Employing a Sub-ADC Forecasting Technique and Low-Power Class AB Slew Boosted Amplifiers
3365 -- 3372Xuewei Lei, Chi-Hang Chan, Yan Zhu 0001, Rui Paulo Martins. A 4-b 7-µW Phase Domain ADC With Time Domain Reference Generation for Low-Power FSK/PSK Demodulation
3373 -- 3383Dadian Zhou, Carlos Briseno-Vidrios, Junning Jiang, Chulhyun Park, Qiyuan Liu 0001, Eric G. Soenen, Martin Kinyua, José Silva-Martínez. A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration
3384 -- 3392Mahmoud Sadollahi, Gabor C. Temes. A 10-MHz BW 77.9 dB SNDR DT MASH Δ!Σ ADC With NC-VCO-Based Quantizer and OPAMP Sharing
3393 -- 3401Sangeeta Kumar, Rajashekar Goroju, Dileep Kumar Bhat, K. S. Rakshitdatta, Nagendra Krishnapura. Design Considerations for Low-Distortion Filter and Oscillator ICs for Testing High-Resolution ADCs
3402 -- 3413Elisabetta Moisello, Michele G. G. Vaiana, Maria Eloisa Castagna, Giuseppe Bruno, Piero Malcovati, Edoardo Bonizzoni. An Integrated Micromachined Thermopile Sensor With a Chopper Interface Circuit for Contact-Less Temperature Measurements
3414 -- 3422Chen Yuan, Sudip Shekhar. A Supply-Noise-Insensitive Digitally-Controlled Oscillator
3423 -- 3436Devrishi Khanna, Chirn Chye Boon, Pilsoon Choi, Liter Siek, Bei Liu, Chenyang Li. A Low-Noise, Positive-Input, Negative-Output Voltage Generator for Low-to-Moderate Driving Capacity Applications
3437 -- 3444Zhicong Luo, Li-Chin Yu, Ming-Dou Ker. An Efficient, Wide-Output, High-Voltage Charge Pump With a Stage Selection Circuit Realized in a Low-Voltage CMOS Process
3445 -- 3456Yannick Wenger, Bernd Meinerzhagen. Low-Voltage Current and Voltage Reference Design Based on the MOSFET ZTC Effect
3457 -- 3466Lidan Wang, Chenchang Zhan. A 0.7-V 28-nW CMOS Subthreshold Voltage and Current Reference in One Simple Circuit
3467 -- 3479Hao-Chiao Hong, Long-Yi Lin. Accurate and Fast On-Wafer Test Circuitry for Device Array Characterization in Wafer Acceptance Test
3480 -- 3493Chen Yang 0005, Yizhou Wang, Xiaoli Wang, Li Geng. WRA: A 2.2-to-6.3 TOPS Highly Unified Dynamically Reconfigurable Accelerator Using a Novel Winograd Decomposition Algorithm for Convolutional Neural Networks
3494 -- 3503Xiaojin Zhao, Peizhou Gan, Qiang Zhao, Dejian Liang, Yuan Cao 0003, Xiaofang Pan, Amine Bermak. A 124 fJ/Bit Cascode Current Mirror Array Based PUF With 1.50% Native Unstable Bit Ratio
3504 -- 3516Shang-Yuan Chang, Bing-Chen Wu, Yi-Long Liou, Rui-Xuan Zheng, Pei-Lin Lee, Tzi-Dar Chiueh, Tsung-Te Liu. An Ultra-Low-Power Dual-Mode Automatic Sleep Staging Processor Using Neural-Network-Based Decision Tree
3517 -- 3530Thomas Paireder, Christian Motz, Ram Sunil Kanumalli, Silvester Sadjina, Mario Huemer. Ultra-Low Complex Blind I/Q-Imbalance Compensation
3531 -- 3543Nagendra Krishnapura, Anoop Narayan Bhat, Subhashish Mukherjee, Kumar Anurag Shrivastava, Madhulatha Bonu. Maximizing the Data Rate of an Inductively Coupled Chip-to-Chip Link by Resetting the Channel State Variables
3544 -- 3556João L. A. de Melo, Nuno Pereira 0002, Pedro V. Leitão, Nuno Paulino 0002, João Goes. A Systematic Design Methodology for Optimization of Sigma-Delta Modulators Based on an Evolutionary Algorithm
3557 -- 3570Vadim Issakov, Sebastian Kehl-Waas, Sascha Breun. Analytical Equivalent Circuit Extraction Procedure for Broadband Scalable Modeling of Three-Port Center-Tapped Symmetric On-Chip Inductors
3571 -- 3584Wei-cheng Sun, Yu-Chieh Su, Yeong-Luh Ueng, Chia-Hsiang Yang. An LDPC-Coded SCMA Receiver With Multi-User Iterative Detection and Decoding
3585 -- 3597Cheng-Han Li, Yen-Lin Chen, Wan-Nong Hu, Chiao-En Chen, Yuan-Hao Huang. A 4 × 64 MIMO Detector for Generalized Spatial Modulation Systems
3598 -- 3609Arunkumar Salimath, Edoardo Botti, Giovanni Gonano, Paolo Cacciagrano, Davide Luigi Brambilla, Tommaso Barbieri, Franco Maloberti, Edoardo Bonizzoni. in SIMO DC-DC Converter Embedded in a Car-Radio IC
3610 -- 3619Guigang Cai, Chenchang Zhan, Yan Lu 0002. A Fast-Transient-Response Fully-Integrated Digital LDO With Adaptive Current Step Size Control
3620 -- 3630Qiong Wei Low, Liter Siek. A Single-Stage Dual-Output Tri-Mode AC-DC Regulator for Inductively Powered Application
3631 -- 3641Fu-Yan Xie, Bing-Chen Wu, Tsung-Te Liu. A Ripple Reduction Method for Switched-Capacitor DC-DC Voltage Converter Using Fully Digital Resistance Modulation

Volume 66-I, Issue 7

2405 -- 2414Hui Liu, Xinpeng Xing, Georges G. E. Gielen. An 85-MHz-BW ASAR-Assisted CT 4-0 MASH $\Delta\Sigma$ Modulator With Background Half-Range Dithering-Based DAC Calibration in 28-nm CMOS
2415 -- 2425Akshay Jayaraj, Mohammadhadi Danesh, Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal. Highly Digital Second-Order $\Delta\Sigma$ VCO ADC
2426 -- 2439Yann Donnelly, Michael Peter Kennedy. Wandering Spurs in MASH 1-1 Delta-Sigma Modulators
2440 -- 2453Hamidreza Maghami, Pedram Payandehnia, Hossein Mirzaie, Ramin Zanbaghi, Siladitya Dey 0002, Kartikeya Mayaram, Terri S. Fiez. A Highly Linear OTA-Free VCO-Based 1-1 MASH $\Delta\Sigma$ ADC
2454 -- 2467Wei-ling Chang, Chinchun Meng, Jung-Hung Ni, Kai-Chun Chang, Chih-Kai Chang, Po-Yi Lee, Yen-Lin Huang. Analytical Noise Optimization of Single-/Dual-Band MOS LNAs With Substrate and Metal Loss Effects of Inductors
2468 -- 2477Jinbo Li, Qun Jane Gu. Harmonic-Based Nonlinearity Factorization of Switching Behavior in Up-Conversion Mixers
2478 -- 2488Frank Herzel, Silvio Waldmann, Dietmar Kissinger. Numerical Jitter Minimization for PLL-Based FMCW Radar Systems
2489 -- 2495Giancarlo Lombardi, Bruno Neri. On the Relationships Between Input and Output Stability in Two-Ports
2496 -- 2507Boyoung Lee, Seunggoo Nam, Juseop Lee. Optimization-Free Design Equations for Narrowband Equal-Division Filtering Power Divider With Pre-Specified Filtering Response and Wideband Isolation
2508 -- 2518Pei-Yuan Chou, Jinn-Shyan Wang. An All-Digital On-Chip Peak-to-Peak Jitter Measurement Circuit With Automatic Resolution Calibration for High PVT-Variation Resilience
2519 -- 2532Dhruv Patel, Adam Neale, Derek Wright, Manoj Sachdev. Hybrid Latch-Type Offset Tolerant Sense Amplifier for Low-Voltage SRAMs
2533 -- 2545Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Xueqing Li, Wei-Hao Chen, Sumeet Kumar Gupta, Meng-Fan Chang, Swaroop Ghosh, Jack Sampson, Vijaykrishnan Narayanan. ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support
2546 -- 2559Kleanthis Papachatzopoulos, Vassilis Paliouras. Static Delay Variation Models for Ripple-Carry and Borrow-Save Adders
2560 -- 2571Ugo Mureddu, Nathalie Bochard, Lilian Bossuet, Viktor Fischer. Experimental Study of Locking Phenomena on Oscillating Rings Implemented in Logic Devices
2572 -- 2583Chun-Hun Wu, Pei-Yun Tsai. An SVD Processor Based on Golub-Reinsch Algorithm for MIMO Precoding With Adjustable Precision
2584 -- 2592Aleksandr Cariow, Dorota Majorkowska-Mech, Janusz P. Paplinski, Galina Cariowa. A New Fast Algorithm for Discrete Fractional Hadamard Transform
2593 -- 2605Tianchan Guan, Peiye Liu, Xiaoyang Zeng, Martha A. Kim, Mingoo Seok. Recursive Binary Neural Network Training Model for Efficient Usage of On-Chip Memory
2606 -- 2614Brent Maundy, Ahmed S. Elwakil, Costas Psychalinos. Correlation Between the Theory of Lissajous Figures and the Generation of Pinched Hysteresis Loops in Nonlinear Circuits
2615 -- 2626Jeeson Kim, Hussein Nili, Nhan Duy Truong, Taimur Ahmed, Jiawei Yang, Doo Seok Jeong, Sharath Sriram, Damith Chinthana Ranasinghe, Samuel James Ippolito, Hosung Chun, Omid Kavehei. Nano-Intrinsic True Random Number Generation: A Device to Data Study
2627 -- 2638Martin Weiher, Melanie Herzig, Ronald Tetzlaff, Alon Ascoli, Thomas Mikolajick, Stefan Slesazeck. x Memristors
2639 -- 2650Gabriel Antonio Fanelli de Souza, Rodrigo Bispo dos Santos, Lester de Abreu Faria. Low-Power Current-Mode Interval Type-2 Fuzzy Inference Engine Circuit
2651 -- 2661Moslem Heidarpur, Arash Ahmadi, Majid Ahmadi, Mostafa Rahimi Azghadi. CORDIC-SNN: On-FPGA STDP Learning With Izhikevich Neurons
2662 -- 2670Abdulhamid Zahedi, Saeed Haghiri, Mohsen Hayati. Multiplierless Digital Implementation of Time-Varying FitzHugh-Nagumo Model
2671 -- 2684Victor M. van Santen, Hussam Amrouch, Jörg Henkel. Modeling and Mitigating Time-Dependent Variability From the Physical Level to the Circuit Level
2685 -- 2698Ragh Kuttappa, Adarsha Balaji, Vasil Pano, Baris Taskin, Hamid Mahmoodi. RotaSYN: Rotary Traveling Wave Oscillator SYNthesizer
2699 -- 2708Asma Ben Ahmed, Olfa Mosbahi, Mohamed Khalgui, Zhiwu Li. Boundary Scan Extension for Testing Distributed Reconfigurable Hardware Systems
2709 -- 2722Hui Zhou, Yi Zhang, Wenxue Li. Synchronization of Stochastic Lévy Noise Systems on a Multi-Weights Network and Its Applications of Chua's Circuits
2723 -- 2734Qiang Song 0001, Guoping Lu, Guanghui Wen, Jinde Cao, Fang Liu. Bipartite Synchronization and Convergence Analysis for Network of Harmonic Oscillator Systems With Signed Graph and Time Delay
2735 -- 2748Marco Crepaldi, Gian Nicola Angotzi, Luca Berdondini. 2 1 Gb/s Non-Coherent UWB Receiver Architecture With Pulse Enhancement and Double PLL Clock/Data Packet Recovery
2749 -- 2762Sudabeh Fotoohi Piraghaj, Saeed Saeedi. Analysis of Timing Accuracy and Sensitivity in a RF Correlation-Based Impulse Radio Receiver With Phase Interpolation for Data Synchronization
2763 -- 2774Mojtaba Mahdavi, Ove Edfors, Viktor Öwall, Liang Liu 0002. A Low Latency FFT/IFFT Architecture for Massive MIMO Systems Utilizing OFDM Guard Bands
2775 -- 2783H. Bo Marr. Fundamental Energy Limits of Digital Phased Arrays
2784 -- 2793Salar Chamanian, Berkay Çiftci, Hasan Ulusan, Ali Muhtaroglu, Haluk Külah. Power-Efficient Hybrid Energy Harvesting System for Harnessing Ambient Vibrations
2794 -- 2802Ali Lotfi, Akihiko Katsuki, Fujio Kurokawa, Hiroo Sekiya, Marian K. Kazimierczuk, Frede Blaabjerg. Analysis of Class-DE PA Using MOSFET Devices With Non-Equally Grading Coefficient
2803 -- 2812Yong Li 0026, Jiefeng Hu, Xiaofei Li, Ka Wai Eric Cheng. A Flexible Load-Independent Multi-Output Wireless Power Transfer System Based on Cascaded Double T-Resonant Circuits: Analysis, Design and Experimental Verification

Volume 66-I, Issue 5

1669 -- 0Elena Blokhina. Guest Editorial Special Issue on the IEEE International Symposium on Circuits and Systems 2018
1670 -- 1680Arzu Ergintav, Frank Herzel, Gunter Fischer, Dietmar Kissinger. A Study of Phase Noise and Frequency Error of a Fractional-N PLL in the Course of FMCW Chirp Generation
1681 -- 1691Sarthak Kalani, Tanbir Haque, Rupal Gupta, Peter R. Kinget. Benefits of Using VCO-OTAs to Construct TIAs in Wideband Current-Mode Receivers Over Inverter-Based OTAs
1692 -- 1703Runze Han, Peng Huang 0004, Yachen Xiang, Chen Liu, Zhen Dong, Zhiqiang Su, Yongbo Liu, Lu Liu, Xiaoyan Liu, JinFeng Kang. A Novel Convolution Computing Paradigm Based on NOR Flash Array With High Computing Speed and Energy Efficiency
1704 -- 1715Benoit Larras, Paul Chollet, Cyril Lahuec, Fabrice Seguin, Matthieu Arzel. A Fully Flexible Circuit Implementation of Clique-Based Neural Networks in 65-nm CMOS
1716 -- 1727Hongshuai Zhang, Hong Zhang 0009, Yan Song, Ruizhi Zhang. A 10-Bit 200-kS/s 1.76- $\mu$ W SAR ADC With Hybrid CAP-MOS DAC for Energy-Limited Applications
1728 -- 1736Josip Mikulic, Gregor Schatzberger, Adrijan Baric. A 1-MHz Relaxation Oscillator Core Employing a Self-Compensating Chopped Comparator Pair
1737 -- 1745Alessandro Garghetti, Andrea L. Lacaita, Salvatore Levantino. A Novel Single-Inductor Injection-Locked Frequency Divider by Three With Dual-Injection Secondary Locking
1746 -- 1757Chutham Sawigun, Surachoke Thanapitak. A Nanopower Biopotential Lowpass Filter Using Subthreshold Current-Reuse Biquads With Bulk Effect Self-Neutralization
1758 -- 1768Ramy Tantawy, Vipul J. Patel, Dale Shane Smith, S. M. Shahriar Rashid, Matthew Casto, Lucas Duncan, Roman Fragasse, Brian Dupaix, Luciano Boglione, Joel Goodman, Waleed Khalil. Wide-Bandwidth, High-Linearity, 2.8-GS/s, 10-bit Accurate Sample and Hold Amplifier in 130-nm SiGe BiCMOS
1769 -- 1779Yecheng Lyu, Lin Bai, Xinming Huang 0001. ChipNet: Real-Time LiDAR Processing for Drivable Region Segmentation on an FPGA
1780 -- 1793Xiaoming Chen, Kai Ni, Michael T. Niemier, Yinhe Han, Suman Datta, Xiaobo Sharon Hu. Power and Area Efficient FPGA Building Blocks Based on Ferroelectric FETs
1794 -- 1804Donghyeon Han, Jinsu Lee, Jinmook Lee, Hoi-Jun Yoo. A Low-Power Deep Neural Network Online Learning Processor for Real-Time Object Tracking Application
1805 -- 1817Ram Kuber Singh, Ying Xu, Runchun Wang, Tara Julia Hamilton, Susan L. Denham, André van Schaik. CAR-Lite: A Multi-Rate Cochlear Model on FPGA for Spike-Based Sound Encoding
1818 -- 1830Razieh Abedi, Rouzbeh Kananizadeh, Omeed Momeni, Payam Heydari. A CMOS V-Band PLL With a Harmonic Positive Feedback VCO Leveraging Operation in Triode Region for Phase-Noise Improvement
1831 -- 1839Massimo Gottardi, Michela Lecca. A $64\times64$ Pixel Vision Sensor for Local Binary Pattern Computation
1840 -- 1852Hao-Chiao Hong, Long-Yi Lin, Yi Chiu. Design of a 0.20-0.25-V, Sub-nW, Rail-to-Rail, 10-bit SAR ADC for Self-Sustainable IoT Applications
1853 -- 1862Bi Wang, Zhaohao Wang, Bi-Wu, Yumeng Bai, Kaihua Cao, Yuanfu Zhao, Youguang Zhang, Weisheng Zhao. Novel Radiation Hardening Read/Write Circuits Using Feedback Connections for Spin-Orbit Torque Magnetic Random Access Memory
1863 -- 1873Yan Zhang, Yanghyo Kim, Adrian Tang 0002, Jon Kawamura, Theodore Reck, Mau-Chung Frank Chang. Integrated Wide-Band CMOS Spectrometer Systems for Spaceborne Telescopic Sensing
1874 -- 1885Armia Salib, Mark F. Flanagan, Barry Cardiff. A Generic Foreground Calibration Algorithm For ADCs With Nonlinear Impairments
1886 -- 1896Pietro Burrascano, Stefano Laureti, Luca Senni, Marco Ricci. Pulse Compression in Nondestructive Testing Applications: Reduction of Near Sidelobes Exploiting Reactance Transformation
1897 -- 1907Igor M. Filanovsky, Luís B. Oliveira, Nikolay T. Tchamov. Using Modified Bessel Functions for Analysis of Nonlinear Effects in a MOS Transistor Operating in Moderate Inversion
1908 -- 1921Chih-Ting Liu, Tung-Wei Lin, Yi-Heng Wu, Yu-sheng Lin, Heng Lee, Yu Tsao, Shao-Yi Chien. Computation-Performance Optimization of Convolutional Neural Networks With Redundant Filter Removal
1922 -- 1934Sijia Geng, Ian A. Hiskens. Second-Order Trajectory Sensitivity Analysis of Hybrid Systems
1935 -- 1947Nicola Lupo, Eduardo Pérez, Christian Wenger, Franco Maloberti, Edoardo Bonizzoni. Analysis of Parasitic Effects in Filamentary-Switching Memristive Memories Using an Approximated Verilog-A Memristor Model
1948 -- 1959Yande Jiang, Nicoleta Cucu Laurenciu, Sorin Dan Cotofana. On Basic Boolean Function Graphene Nanoribbon Conductance Mapping
1960 -- 1969Graziano Chesi. Stability Test for Complex Matrices Over the Complex Unit Circumference via LMIs and Applications in 2D Systems
1970 -- 1980Yixiong Yang, Xin Shi, Fang Su, Zhibo Wang, Pei Yang, Huazhong Yang, Yongpan Liu. A 2.2-GHz Configurable Direct Digital Frequency Synthesizer Based on LUT and Rotation
1981 -- 1992W. Daniel Leon-Salas, Xiaozhe Fan. Solar Cell Photo-Luminescence Modulation for Optical Frequency Identification Devices

Volume 66-I, Issue 4

1305 -- 1318Michele Spasaro, Federico Alimenti, Domenico Zito. The Theory of Special Noise Invariants
1319 -- 1330Luke Renaud, Joe Baylon, Srinivasan Gopal, Md. Aminul Hoque, Deukhyoun Heo. Analysis of Systematic Losses in Hybrid Envelope Tracking Modulators
1331 -- 1341Tao He 0001, Manjunath Kareppagoudr, Yi Zhang 0023, Emanuel Caceres, Un-Ku Moon, Gabor C. Temes. Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits
1342 -- 1354Jiaxin Liu, Chen-Kai Hsu, Xiyuan Tang, Shaolan Li, Guangjun Wen, Nan Sun. Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters
1355 -- 1368Soheil Ziabakhsh, Ghyslain Gagnon, Gordon W. Roberts. A Second-Order Bandpass $\Delta\Sigma$ Time-to-Digital Converter With Negative Time-Mode Feedback
1369 -- 1381Dries Vercaemer, Johan Raman, Pieter Rombouts. Low-Pass Filtering SC-DAC for Reduced Jitter and Slewing Requirements on CTSDMs
1382 -- 1392Ming Ding, Yao-Hong Liu, Pieter Harpe, Christian Bachmann, Kathleen Philips, Arthur H. M. van Roermund. A Low-Power Fast Start-Up Crystal Oscillator With an Autonomous Dynamically Adjusted Load
1393 -- 1404Longjie Zhong, Xinquan Lai, Donglai Xu, Xinqin Liao, Chuanshi Yang, Zhongyuan Fang, Yuanjin Zheng. Capacitive Touch Panel With Low Sensitivity to Water Drop Employing Mutual-Coupling Electrical Field Shaping Technique
1405 -- 1418Mohammad S. Islam, Siddharth K. Singh, Jaesung Lee, Yong Xie, Christian A. Zorman, Philip X.-L. Feng, Soumyajit Mandal. A Programmable Sustaining Amplifier for Flexible Multimode MEMS-Referenced Oscillators
1419 -- 1430Can Chliskan, Ilker Kalyoncu, Melik Yazici, Yasar Gurbuz. Sub-1-dB and Wideband SiGe BiCMOS Low-Noise Amplifiers for $X$ -Band Applications
1431 -- 1441Kyle D. Holzer, Jeffrey S. Walling. 1-to- $N$ Ring Power Combiners With Common Delta Ports
1442 -- 1453Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi, Shusuke Yoshimoto, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto. A 28-nm FD-SOI 8T Dual-Port SRAM for Low-Energy Image Processor With Selective Sourceline Drive Scheme
1454 -- 1464Chengzhi Wang, Deming Zhang, Lang Zeng, Erya Deng, Jie Chen, Weisheng Zhao. A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation
1465 -- 1473Taha Shahroodi, Siavash Bayat Sarmadi, Hatameh Mosanaei-Boorani. Low-Latency Double Point Multiplication Architecture Using Differential Addition Chain Over $GF(2^m)$
1474 -- 1483Dongsheng Liu, Cong Zhang, Hui Lin, Yuyang Chen, Mingyu Zhang. A Resource-Efficient and Side-Channel Secure Hardware Implementation of Ring-LWE Cryptographic Processor
1484 -- 1495Mohamed F. Tolba, Lobna A. Said, Ahmed H. Madian, Ahmed G. Radwan. FPGA Implementation of the Fractional Order Integrator/Differentiator: Two Approaches and Applications
1496 -- 1506Wangqian Chen, Mo Huang, Xin Lou. Design of Sparse FIR Filters With Reduced Effective Length
1507 -- 1516Mario Garrido, Konrad Möller, Martin Kumm. World's Fastest FFT Architectures: Breaking the Barrier of 100 GS/s
1517 -- 1530Heming Sun, Zhengxue Cheng, Amir Masoud Gharehbaghi, Shinji Kimura, Masahiro Fujita. Approximate DCT Design for Video Encoding Based on Novel Truncation Scheme
1531 -- 1543Vahnood Pourahmad, Farzad Khoeini, Ehsan Afshari. A System of Two Coupled Oscillators With a Continuously Controllable Phase Shift
1544 -- 1557Shashikant Koul, Timothy K. Horiuchi. Waypoint Path Planning With Synaptic-Dependent Spike Latency
1558 -- 1570Corey Lammie, Tara Julia Hamilton, André van Schaik, Mostafa Rahimi Azghadi. Efficient FPGA Implementations of Pair and Triplet-Based STDP for Neuromorphic Architectures
1571 -- 1583Tzofnat Greenberg-Toledo, Roee Mazor, Ameer Haj Ali, Shahar Kvatinsky. Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse
1584 -- 1593Mohammad Saleh Tavazoei. Upper and Lower Bounds for the Maximum Number of Frequencies That Can Be Generated by a Class of Fractional Oscillators
1594 -- 1607Hsiu-Chen Chang, Yunsik Hahn, Patrick Roblin, Taylor W. Barton. New Mixed-Mode Design Methodology for High-Efficiency Outphasing Chireix Amplifiers
1608 -- 1619Hai-feng Zhang, Fang Xu, Zhongkui Bao, Chuang Ma. Reconstructing of Networks With Binary-State Dynamics via Generalized Statistical Inference
1620 -- 1631Hao Li 0003, Carlos E. Saavedra. Linearization of Active Downconversion Mixers at the IF Using Feedforward Cancellation
1632 -- 1642Ilker Kalyoncu, Emre Ozeren, Abdurrahman Burak, Omer Ceylan, Yasar Gurbuz. A Phase-Calibration Method for Vector-Sum Phase Shifters Using a Self-Generated LUT
1643 -- 1656Oana Boncalo, Gyorgy Kolumban-Antal, Alexandru Amaricai, Valentin Savin, David Declercq. Layered LDPC Decoders With Efficient Memory Access Scheduling and Mapping and Built-In Support for Pipeline Hazards Mitigation
1657 -- 1667Abdelali El Aroudi, Luis Benadero, Enrique Ponce, Carlos Olalla, Francisco Torres 0001, Luis Martinez-Salamero. Nonlinear Dynamic Modeling and Analysis of Self-Oscillating H-Bridge Parallel Resonant Converter Under Zero Current Switching Control: Unveiling Coexistence of Attractors

Volume 66-I, Issue 3

885 -- 896Mohammed Abdulaziz, Eric A. M. Klumperink, Bram Nauta, Henrik Sjöland. m-C Notch Filtering
897 -- 908Congyin Shi, Edgar Sánchez-Sinencio. An On-Chip Built-in Linearity Estimation Methodology and Hardware Implementation
909 -- 919Minglei Zhang, Qingsong Cai, Zhong Yang, Xiaoyun Jia, Xiaohua Fan. A 1-MHz-Bandwidth Gm-C-Based Quadrature Bandpass Sigma-Delta Modulator Achieving -153.7-dBFS/Hz NSD With Background Calibration
920 -- 929Fernando Cardes, Victor Medina, Susana Patón, Luis Hernández. Clock Jitter Analysis of Continuous-Time ΣΔ Modulators Based on a Relative Time-Base Projection
930 -- 940Fei Wang, Albert J. P. Theuwissen. Pixel Optimizations and Digital Calibration Methods of a CMOS Image Sensor Targeting High Linearity
941 -- 954Xin Fan, Jan Stuijt, Bo Liu, Tobias Gemmeke. Synthesizable Memory Arrays Based on Logic Gates for Subthreshold Operation in IoT
955 -- 966Lawrence T. Clark, Sai Bharadwaj Medapuram, Divya Kiran Kadiyala, John Brunhaver. Physically Unclonable Functions Using Foundry SRAM Cells
967 -- 977Jianwei Jiang, Yiran Xu, Wenyi Zhu, Jun Xiao, Shichang Zou. Quadruple Cross-Coupled Latch-Based 10T and 12T SRAM Bit-Cell Designs for Highly Reliable Terrestrial Applications
978 -- 988Shourya Gupta, Kirti Gupta, Benton H. Calhoun, Neeta Pandey. Low-Power Near-Threshold 10T SRAM Bit Cells With Enhanced Data-Independent Read Port Leakage for Array Augmentation in 32-nm CMOS
989 -- 1002Amit Kumar Panda, Kailash Chandra Ray. Modified Dual-CLCG Method and its VLSI Architecture for Pseudorandom Bit Generation
1003 -- 1016Jinnan Ding, Shuguo Li, Zhen Gu. High-Speed ECC Processor Over NIST Prime Fields Applied With Toom-Cook Multiplication
1017 -- 1030Sharvil Patil, Suhas Gundu Rao, Yu Chen 0013, Yannis P. Tsividis. Signal Encoding and Processing in Continuous Time Using a Cascade of Digital Delays
1031 -- 1041Han Le Duc, Bruno Feuvrie, Matthieu Pastore, Yide Wang. An Adaptive Cascaded ILA- and DLA-Based Digital Predistorter for Linearizing an RF Power Amplifier
1042 -- 1050Basant K. Mohanty, Pramod Kumar Meher. Area-Delay-Energy Efficient VLSI Architecture for Scalable In-Place Computation of FFT on Real Data
1051 -- 1062Sheng Zhang 0006, Wei Xing Zheng. Mean-Square Analysis of Multi-Sampled Multiband-Structured Subband Filtering Algorithm
1063 -- 1075Mohsin Aziz, Mehdi Vejdani Amiri, Mohamed Helaoui, Fadhel M. Ghannouchi. Statistics-Based Approach for Blind Post-Compensation of Modulator's Imperfections and Power Amplifier Nonlinearity
1076 -- 1089Yiming Sun, Jinyong Yu, Zhengchao Li. Event-Triggered Finite-Time Robust Filtering for a Class of State-Dependent Uncertain Systems With Network Transmission Delay
1090 -- 1103Krishnaiyan Thulasiraman, Mamta Yadav, Kshirasagar Naik. Network Science Meets Circuit Theory: Resistance Distance, Kirchhoff Index, and Foster's Theorems With Generalizations and Unification
1104 -- 1115Giovanni De Luca, Pascal Bolcato, Wil H. A. Schilders. Proper Initial Solution to Start Periodic Steady-State-Based Methods
1116 -- 1129Lanlin Yu, Junlin Xiong. &8734; Model Reduction for Interval Frequency Negative Imaginary Systems
1130 -- 1140Hao Shen, Yunzhe Men, Zheng-Guang Wu, Jinde Cao, Guoping Lu. Network-Based Quantized Control for Fuzzy Singularly Perturbed Semi-Markov Jump Systems and its Application
1141 -- 1152Peijun Wang, Guanghui Wen, Xinghuo Yu, Wenwu Yu, Tingwen Huang. Synchronization of Multi-Layer Networks: From Node-to-Node Synchronization to Complete Synchronization
1153 -- 1165Ahmed El Sayed, Amit K. Mishra, Abdelrahman H. Ahmed, Amir Hossein Masnadi Shirazi, Sang-Pil Woo, Yang-Seok Choi, Shahriar Mirabbasi, Sudip Shekhar. A Hilbert Transform Equalizer Enabling 80 MHz RF Self-Interference Cancellation for Full-Duplex Receivers
1166 -- 1179Ajinkya Kale, Suchendranath Popuri, Michael Koeberle, Johannes Sturm, Vijaya Sankara Rao Pasupureddi. A -40 dB EVM, 77 MHz Dual-Band Tunable Gain Sub-Sampling Receiver Front End in 65-nm CMOS
1180 -- 1191Mehmet Tamer Ozgun, Amr Abdelhamid, Hakan Dogan. A Low Power Receiver Front-End Design With Tunable Notch Filter for TX Leakage and Blocker Suppression
1192 -- 1204Ashwin Ramachandran, Arun Natarajan, Tejasvi Anand. Line Coding Techniques for Channel Equalization: Integrated Pulse-Width Modulation and Consecutive Digit Chopping
1205 -- 1218Yan-Tong Chen, Wei-cheng Sun, Chung-Chao Cheng, Tsung-Lin Tsai, Yeong-Luh Ueng, Chia-Hsiang Yang. An Integrated Message-Passing Detector and Decoder for Polar-Coded Massive MU-MIMO Systems
1219 -- 1230Yen-Chin Liao, Chien Lin, Hsie-Chia Chang, Shu Lin. A (21150, 19050) GC-LDPC Decoder for NAND Flash Applications
1231 -- 1244Alak Majumder, Monalisa Das, Suraj Kumar Saw, Abir J. Mondal, Bidyut K. Bhattacharyya. Variation Aware Design of 50-Gbit/s, 5.027-fJ/bit Serializer Using Latency Combined Mux-Dual Latch for Inter-Chip Communication
1245 -- 1257Sigang Ryu, Seuk Son, Jaeha Kim. An Accurate and Noise-Resilient Spread-Spectrum Clock Tracking Aid for Digitally-Controlled Clock and Data Recovery Loops
1258 -- 1269Boyu Shen, Soumya Bose, Matthew L. Johnston. Fully-Integrated Charge Pump Design Optimization for Above-Breakdown Biasing of Single-Photon Avalanche Diodes in 0.13-µm CMOS
1270 -- 1279Teruki Someya, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya. A 0.90-4.39-V Detection Voltage Range, 56-Level Programmable Voltage Detector Using Fine Voltage-Step Subtraction for Battery Management
1280 -- 1290Dawei Liu 0003, Simon J. Hollis, Bernard H. Stark. A New Design Technique for Sub-Nanosecond Delay and 200 V/ns Power Supply Slew-Tolerant Floating Voltage Level Shifters for GaN SMPS
1291 -- 1303Luigi Costanzo, Alessandro Lo Schiavo, Massimo Vitelli. Power Extracted From Piezoelectric Harvesters Driven by Non-Sinusoidal Vibrations

Volume 66-I, Issue 2

453 -- 462Francesco Chicco, Alessandro Pezzotta, Christian C. Enz. Charge-Based Distortion Analysis of Nanoscale MOSFETs
463 -- 476Ricardo Riaza. Circuit Theory in Projective Space and Homogeneous Circuit Models
477 -- 488Wei Mao, Yongfu Li, Chun-Huat Heng, Yong Lian. A Low Power 12-bit 1-kS/s SAR ADC for Biomedical Signal Processing
489 -- 501Dezhi Xing, Yan Zhu 0001, Chi-Hang Chan, Franco Maloberti, Seng-Pan U, Rui Paulo Martins. Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC With Optimal Code Transfer Technique
502 -- 512You Li 0002, Degang Chen. Low-Cost, High-Precision DAC Design Based on Ordered Element Matching
513 -- 523Fabian Khateb, Tomasz Kulej. Design and Implementation of a 0.3-V Differential Difference Amplifier
524 -- 533Pekka Keränen, Juha Kostamovaara. 256 × TDC Array With Cyclic Interpolators Based on Calibration-Free 2× Time Amplifier
534 -- 545Huan Hu, Tanzila Islam, Alla Kostyukova, Su Ha, Subhanshu Gupta. From Battery Enabled to Natural Harvesting: Enzymatic BioFuel Cell Assisted Integrated Analog Front-End in 130nm CMOS for Long-Term Monitoring
546 -- 554Sinyoung Kim, Kuduck Kwon. A 50-MHz-1-GHz 2.3-dB NF Noise-Cancelling Balun-LNA Employing a Modified Current-Bleeding Technique and Balanced Loads
555 -- 568Shunli Ma, Hao Yu 0001, Qun Jane Gu, Junyan Ren. A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package
569 -- 582Yingying Wang, Jifu Liang, Suranga Handagala, Arjuna Madanayake, Soumyajit Mandal. ΔΣ Noise-Shaping in 2-D Space-Time for Wideband Antenna Array Receivers
583 -- 593Hyunuk Kang, Hwiseob Lee, Wooseok Lee, Hansik Oh, Wonseob Lim, Hyungmo Koo, Cheon-Seok Park, Keum-Cheol Hwang, Kang-Yoon Lee, Youngoo Yang. Octave Bandwidth Doherty Power Amplifier Using Multiple Resonance Circuit for the Peaking Amplifier
594 -- 604Matthew A. Morgan, Wavley M. Groves, Tod A. Boyd. Reflectionless Filter Topologies Supporting Arbitrary Low-Pass Ladder Prototypes
605 -- 615Cheol Kim, Sung-Gi Ahn, Jisu Min, Kee-Won Kwon. Power Efficient and Reliable Nonvolatile TCAM With Hi-PFO and Semi-Complementary Driver
616 -- 629Manami Suzuki, Rei Ueno, Naofumi Homma, Takafumi Aoki. Efficient Fuzzy Extractors Based on Ternary Debiasing Method for Biased Physically Unclonable Functions
630 -- 642Mohd Tasleem Khan, Shaik Rafi Ahamed. Optimal Complexity Architectures for Pipelined Distributed Arithmetic-Based LMS Adaptive Filter
643 -- 654Edouard Giacomin, Tzofnat Greenberg-Toledo, Shahar Kvatinsky, Pierre-Emmanuel Gaillardon. A Robust Digital RRAM-Based Convolutional Block for Low-Power Image Processing and Learning Applications
655 -- 668Jinpeng Song, Shulin Tian, Yu Hen Hu. Analysis and Correction of Combined Channel Mismatch Effects in Frequency-Interleaved ADCs
669 -- 679Temesghen Tekeste, Hani H. Saleh, Baker Mohammad, Mohammed Ismail. Ultra-Low Power QRS Detection and ECG Compression Architecture for IoT Healthcare Devices
680 -- 693Guilherme Paim, Leandro Mateus Giacomini Rocha, Gustavo Madeira Santana, Leonardo Bandeira Soares, Eduardo Antonio Cesar da Costa, Sergio Bampi. Power-, Area-, and Compression-Efficient Eight-Point Approximate 2-D Discrete Tchebichef Transform Hardware Design Combining Truncation Pruning and Efficient Transposition Buffers
694 -- 707Alberto Bernardini, Kurt James Werner, Julius Orion Smith, Augusto Sarti. Generalized Wave Digital Filter Realizations of Arbitrary Reciprocal Connection Networks
708 -- 718Xiaozhen Liu, Jin Sha, Hongxiang Xie, Feifei Gao, Shi Jin, Zaichen Zhang, Xiaohu You, Chuan Zhang. Efficient Channel Estimator With Angle-Division Multiple Access
719 -- 732Olga Krestinskaya, Khaled Nabil Salama, Alex Pappachen James. Learning in Memristive Neural Network Architectures Using Analog Backpropagation Circuits
733 -- 741Li Tang 0001, Jun Zhao 0002. Switched Threshold-Based Fault Detection for Switched Nonlinear Systems With Its Application to Chua's Circuit System
742 -- 755Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik. A Combined Arithmetic-High-Level Synthesis Solution to Deploy Partial Carry-Save Radix-8 Booth Multipliers in Datapaths
756 -- 768Jong Beom Park, William Rhett Davis, Paul D. Franzon. 3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model
769 -- 781Farid Kenarangi, Inna Partin-Vaisband. Exploiting Machine Learning Against On-Chip Power Analysis Attacks: Tradeoffs and Design Considerations
782 -- 795Muhammad Saeed Aslam, Peng Shi 0001, Cheng-Chew Lim. Variable Threshold-Based Selective Updating Algorithms in Feed-Forward Active Noise Control Systems
796 -- 809Di Zhang, Qingling Zhang 0001. Reduced-Order Observer-Based Sliding Mode Control for Singular Markovian Jump System With Time-Varying Transition Rate
810 -- 819Li-Heng Chen, Yuxin Zhao 0001, Shasha Fu, Ming Liu 0014, Jianbin Qiu. Fault Estimation Observer Design for Descriptor Switched Systems With Actuator and Sensor Failures
820 -- 833Huizhen Jenny Qian, Bo Zhang, Xun Luo. High-Resolution Wideband Phase Shifter With Current Limited Vector-Sum
834 -- 847Sheikh Nijam Ali, Pawan Agarwal, Srinivasan Gopal, Shahriar Mirabbasi, Deukhyoun Heo. A 25-35 GHz Neutralized Continuous Class-F CMOS Power Amplifier for 5G Mobile Communications Achieving 26% Modulation PAE at 1.5 Gb/s and 46.4% Peak PAE
848 -- 858Steve Blandino, Giovanni Mangraviti, Claude Desset, André Bourdoux, Piet Wambacq, Sofie Pollin. Multi-User Hybrid MIMO at 60 GHz Using 16-Antenna Transmitters
859 -- 868Adrian Pérez-Resa, Miguel Garcia-Bosque, Carlos Sánchez-Azqueta, Santiago Celma. Chaotic Encryption for 10-Gb Ethernet Optical Links
869 -- 880Cédric Marchand 0001, Emmanuel Boutillon, Hassan Harb, Laura Conde-Canencia, Ali Al Ghouwayel. Hybrid Check Node Architectures for NB-LDPC Decoders

Volume 66-I, Issue 12

4555 -- 4556Andreas Demosthenous. Outgoing Editorial
4557 -- 4570Gianluca Giustolisi, Gaetano Palumbo. In-Depth Analysis of Pole-Zero Compensations in CMOS Operational Transconductance Amplifiers
4571 -- 4581Hamidreza Mafi, Mostafa Yargholi, Mohammad Yavari, Shahriar Mirabbasi. Digital Calibration of Elements Mismatch in Multirate Predictive SAR ADCs
4582 -- 4591Shuenn-Yuh Lee, Chieh Tsou, Yu-Cheng Li. Single-Bin DFT-Based Digital Calibration Technique for CDAC in SAR ADCs
4592 -- 4605Yang Zhang 0034, Debajit Basak, Kong-Pang Pun. A Highly Linear Multi-Level SC DAC in a Power-Efficient Gm-C Continuous-Time Delta-Sigma Modulator
4606 -- 4618Augusto Guilabert, Matthew A. Morgan, Tod A. Boyd. Reflectionless Filters for Generalized Elliptic Transmission Functions
4619 -- 4627Alican Çaglar, Mustafa Berke Yelten. Design of Cryogenic LNAs for High Linearity in Space Applications
4628 -- 4636Ragh Kuttappa, Selçuk Köse, Baris Taskin. FOPAC: Flexible On-Chip Power and Clock
4637 -- 4647Bo-Wei Xu, Shao Yong Zheng, Weimin Wang 0008, Yongle Wu, Yuan'an Liu. A Coupled Line-Based Coupler With Simultaneously Tunable Phase and Frequency
4648 -- 4661Shixuan Zheng, Peng Ouyang, Dandan Song, Xiudong Li, Leibo Liu, Shaojun Wei, Shouyi Yin. An Ultra-Low Power Binarized Convolutional Neural Network-Based Speech Recognition Processor With On-Chip Self-Learning
4662 -- 4672Ramtin Zand, Ronald F. DeMara. MRAM-Enhanced Low Power Reconfigurable Fabric With Multi-Level Variation Tolerance
4673 -- 4686Suresh Mopuri, Amit Acharyya. th Power Computations
4687 -- 4698Mohammad Ansari, Arash Fayyazi, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram. OCTAN: An On-Chip Training Algorithm for Memristive Neuromorphic Circuits
4699 -- 4712Huai-Ting Li, Ching-Yao Chou, Yi-Ta Chen, Sheng-hui Wang, An-Yeu Wu. Robust and Lightweight Ensemble Extreme Learning Machine Engine Based on Eigenspace Domain for Compressed Learning
4713 -- 4726Chih-Feng Wu, Chun-Hung Chen, Muh-Tian Shiue. A Design of Input-Decimation Technique for Recursive DFT/IDFT Algorithm
4727 -- 4739Weiqiang Liu, Qicong Liao, Fei Qiao, Weijie Xia, Chenghua Wang, Fabrizio Lombardi. Approximate Designs for Fast Fourier Transform (FFT) With Application to Speech Recognition
4740 -- 4752Ruijie Zhao, Xiaoying Hong. Matrix-Based Algorithms for the Optimal Design of Variable Fractional Delay FIR Filters
4753 -- 4766Fraser K. Coutts, Ian K. Proudler, Stephan Weiss 0001. Efficient Implementation of Iterative Polynomial Matrix EVD Algorithms Exploiting Structural Redundancy and Parallelisation
4767 -- 4779Ning Wang 0015, Chengqing Li, Han Bao, Mo Chen, Bocheng Bao. Generating Multi-Scroll Chua's Attractors via Simplified Piecewise-Linear Chua's Diode
4780 -- 4792Ismail Öztürk, Recai Kiliç. Higher Dimensional Baker Map and its Digital Implementation With LSB-Extension Method
4793 -- 4806Ciyan Zheng, Dongsheng Yu, Herbert Ho-Ching Iu, Tyrone Fernando, Tingting Sun, Jason Kamran Eshraghian, Hengdao Guo. A Novel Universal Interface for Constructing Memory Elements for Circuit Applications
4807 -- 4816Mikiya Tanaka, Masayuki Yamauchi, Yoshifumi Nishio. Phase-Inversion Waves Propagating in an In-Phase Synchronization on Oscillators Coupled as a Cross
4817 -- 4828Jinliang Liu, Meng Yang, Engang Tian, Jie Cao, Shumin Fei. Event-Based Security Control for State-Dependent Uncertain Systems Under Hybrid-Attacks and Its Application to Electronic Circuits
4829 -- 4839Shengping Luo, Dan Ye. Adaptive Double Event-Triggered Control for Linear Multi-Agent Systems With Actuator Faults
4840 -- 4849Shang Shi, Shengyuan Xu, Jason Gu, Huifang Min. Global High-Order Sliding Mode Controller Design Subject to Mismatched Terms: Application to Buck Converter
4850 -- 4861Chao Fan, Wei-Han Yu, Pui-In Mak, Rui P. Martins. A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS
4862 -- 4875Parvaneh Saffari, Ali Basaligheh, Kambiz Moez. An RF-to-DC Rectifier With High Efficiency Over Wide Input Power Range for RF Energy Harvesting Applications
4876 -- 4887Abhishekh Devaraj, Mohamed Megahed, Yutao Liu, Ashwin Ramachandran, Tejasvi Anand. A Switched Capacitor Multiple Input Single Output Energy Harvester (Solar + Piezo) Achieving 74.6% Efficiency With Simultaneous MPPT
4888 -- 4900Seneke Chamith Chandrarathna, Jong-Wook Lee. A Dual-Stage Boost Converter Using Two- Dimensional Adaptive Input-Sampling MPPT for Thermoelectric Energy Harvesting
4901 -- 4910Chenghui Qian, Ting Qian. An LLC-Type Resonant Forward Converter With Adjustable Turning-Off Time Control
4911 -- 4921Bing Hao Lin, Jin Tong Tsai, Kuo-Lung Lian. A Non-Invasive Method for Estimating Circuit and Control Parameters of Voltage Source Converters

Volume 66-I, Issue 10

3643 -- 3652Sevil Zeynep Lulec, David A. Johns, Antonio Liscidini. A Third-Order Integrated Passive Switched-Capacitor Filter Obtained With a Continuous-Time Design Approach
3653 -- 3663Gabrielle Guitton, Marcelo de Souza, Andre A. Mariano, Thierry Taris. Design Methodology Based on the Inversion Coefficient and its Application to Inductorless LNA Implementations
3664 -- 3675Amirreza Alizadeh, Milad Frounchi, Ali Medi. 23 Power Amplifiers
3676 -- 3689Dan Li 0011, Ming Liu, Shengwei Gao, Yongjun Shi, Yihua Zhang, Zhiyong Li, Patrick Yin Chiang, Franco Maloberti, Li Geng. Low-Noise Broadband CMOS TIA Based on Multi-Stage Stagger-Tuned Amplifier for High-Speed High-Sensitivity Optical Communication
3690 -- 3699Jeng-Han Tsai. Design of a 5.2-GHz CMOS Power Amplifier Using TF-Based 2-Stage Dual-Radial Power Splitting/Combining Architecture
3700 -- 3712Kamlesh Badiyari, Nagarjuna Nallam, Shouri Chatterjee. An N-Path Band-Pass Filter With Parametric Gain-Boosting
3713 -- 3722Shahbaz Abbasi, Omer Ceylan, Yasar Gurbuz. A DROIC Based on PFM ADCs Employing Over-Integration for Error Shaping
3723 -- 3732Jaekwon Kim, Woojin Jang, Yanghoon Lee, Wan Kim, Seunghyun Oh, Jongwoo Lee, Jaehyuk Choi, Jung-Hoon Chun, Thomas Byunghak Cho. Design and Analysis of a 12-b Current-Steering DAC in a 14-nm FinFET Technology for 2G/3G/4G Cellular Applications
3733 -- 3746Zhao Zhang 0004, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu. An 18-23 GHz 57.4-fs RMS Jitter -253.5-dB FoM Sub-Harmonically Injection-Locked All-Digital PLL With Single-Ended Injection Technique and ILFD Aided Adaptive Injection Timing Alignment Technique
3747 -- 3760Armia Salib, Mark F. Flanagan, Barry Cardiff. A High-Precision Time Skew Estimation and Correction Technique for Time-Interleaved ADCs
3761 -- 3774Claudia Palattella, Eric A. M. Klumperink, Mark S. Oude Alink, Bram Nauta. Digital-to-Frequency Converters With a DTC: Theoretical Analysis of the Output SFDR
3775 -- 3785Alessio Santiccioli, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino. Time-Variant Modeling and Analysis of Multiplying Delay-Locked Loops
3786 -- 3796Lianxi Liu, Xufeng Liao, Junchao Mu. rms Noise, 3 ppm/°C TC Bandgap Reference With Offset/Noise Suppression and Five-Piece Linear Compensation
3797 -- 3810Yong-Joon Jeon, Lei Yao, Yuan Gao 0011, Muthukumaraswamy Annamalai Arasu. A 0.034% Charge-Imbalanced Neural Stimulation Front-End (SFE) IC With on-Chip Voltage Compliance Monitoring Circuit and Analysis on Resting Potential by Utilizing the SFE IC
3811 -- 3821Amir-Ebrahimi, Thomas C. Baum, Ke Wang, James R. Scott 0001, Kamran Ghorbani. Differential Transmission Lines Loaded With Magnetic LC Resonators and Application in Common Mode Suppression
3822 -- 3830Yuan-chun Li, Qin-chuang Chen, Quan Xue, Jinchao Mou. Filtering Power Amplifier With Wide Bandwidth Using Discriminating Coupling
3831 -- 3842Li Gao, Tsu-Wei Lin, Gabriel M. Rebeiz. Design of Tunable Multi-Pole Multi-Zero Bandpass Filters and Diplexer With High Selectivity and Isolation
3843 -- 3853Minkyu Kim, Abinash Mohanty, Deepak Kadetotad, Luning Wei, Xiaofei He, Yu Cao 0001, Jae-sun Seo. A Real-Time 17-Scale Object Detection Accelerator With Adaptive 2000-Stage Classification in 65 nm CMOS
3854 -- 3862Raziyeh Salarifard, Siavash Bayat Sarmadi. An Efficient Low-Latency Point-Multiplication Over Curve25519
3863 -- 3873Hans Kanders, Tobias Mellqvist, Mario Garrido, Kent Palmkvist, Oscar Gustafsson. A 1 Million-Point FFT on a Single FPGA
3874 -- 3881Hossein Mahdavi, Somayeh Timarchi. Area-Time-Power Efficient FFT Architectures Based on Binary-Signed-Digit CORDIC
3882 -- 3895Sandeep Patel, Ravindra Dhuli, Brejesh Lall. Analysis of Signals via Non-Maximally Decimated Non-Uniform Filter Banks
3896 -- 3905Seiya Yoshida, Shintaro Izumi, Koichi Kajihara, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto. Energy-Efficient Spectral Analysis Method Using Autoregressive Model-Based Approach for Internet of Things
3906 -- 3916Changju Yang, Shyam Prasad Adhikari, Hyongsuk Kim. On Learning With Nonlinear Memristor-Based Neural Network and its Replication
3917 -- 3927Michele Bonnin, Fabio L. Traversa, Fabrizio Bonani. Colored Noise in Oscillators. Phase-Amplitude Analysis and a Method to Avoid the itô-Stratonovich Dilemma
3928 -- 3940Xiao-Zheng Jin, Chengcheng Jiang, Jiahu Qin, Wei Xing Zheng. Robust Pinning Constrained Control and Adaptive Regulation of Coupled Chua's Circuit Networks
3941 -- 3954Nilan Udayanga, S. I. Hariharan, Soumyajit Mandal, Leonid Belostotski, Len T. Bruton, Arjuna Madanayake. Continuous-Time Algorithms for Solving Maxwell's Equations Using Analog Circuits
3955 -- 3967Muhammad Saeed Aslam, Peng Shi 0001, Cheng-Chew Lim. Robust Active Noise Control Design by Optimal Weighted Least Squares Approach
3968 -- 3977Peng Wang 0046, Jun Zhao 0002. Almost Output Regulation for Switched Positive Systems With Different Coordinates Transformations and its Application to a Positive Circuit Model
3978 -- 3990Roshni Maiti, Kaushik Das Sharma, Gautam Sarkar. 1 Adaptive Controller for Two Link Robot Manipulator
3991 -- 4004Yong Chen 0005, Pui-In Mak, Zunsong Yang, Chirn Chye Boon, Rui P. Martins. pp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis
4005 -- 4017Xiangyun Deng, Jin Sha, Xiaotian Zhou, Yuxiang Fu, Zaichen Zhang, Xiaohu You, Chuan Zhang. Joint Detection and Decoding of Polar-Coded OFDM-IDMA Systems
4018 -- 4031Xinmiao Zhang, Zhenshan Xie. Efficient Architectures for Generalized Integrated Interleaved Decoder
4032 -- 4043Yaoyu Tao, Shuanghong Sun, Zhengya Zhang. Efficient Post-Processors for Improving Error-Correcting Performance of LDPC Codes
4044 -- 4054Maria Jesus Canavate Sanchez, Andrea Segneri, Savvas A. Kosmopoulos, Qiuming Zhu, Theodoros A. Tsiftsis, Apostolos Georgiadis, George Goussetis. Novel Data Pre-Distorter for APSK Signals in Solid-State Power Amplifiers
4055 -- 4067Yongjie Jiang, Sita Asar, Muhammad Swilam Ahmed, Hua Zhang, Ayman Fayed. Output Control Techniques for Dual-Frequency SIMO Buck Converters
4068 -- 4078Hung-Hsien Wu, Chi-Hsiang Huang 0001, Chia-Ling Wei, Jih-Sheng Lai. Bidirectional Single-Inductor Dual-Supply Converter With Automatic State-Transition for IoT Applications
4079 -- 4092Ahmed M. Mohey, Sameh A. Ibrahim, Ismail M. Hafez, HyungWon Kim 0001. Design Optimization for Low-Power Reconfigurable Switched-Capacitor DC-DC Voltage Converter

Volume 66-I, Issue 1

1 -- 19Ian Galton, Colin Weltin-Wu. Understanding Phase Error and Jitter: Definitions, Implications, Simulations, and Measurement
20 -- 30Shubin Liu, Zhangming Zhu, Jingyu Wang, Lianxi Liu, Yintang Yang. A 1.2-V 2.41-GHz Three-Stage CMOS OTA With Efficient Frequency Compensation Technique
31 -- 42Mitra Gilasgar, Antoni Barlabe, Lluis Pradell. A 2.4 GHz CMOS Class-F Power Amplifier With Reconfigurable Load-Impedance Matching
43 -- 53Ahmad Sharkia, Sankaran Aniruddhan, Shahriar Mirabbasi, Sudip Shekhar. A Compact, Voltage-Mode Type-I PLL With Gain-Boosted Saturated PFD and Synchronous Peak Tracking Loop Filter
54 -- 67Deyan Levski, Martin Wäny, Bhaskar Choubey. A 1-µs Ramp Time 12-bit Column-Parallel Flash TDC-Interpolated Single-Slope ADC With Digital Delay-Element Calibration
68 -- 81Longqiang Lai, Xueqing Li, Yushen Fu, Yongpan Liu, Huazhong Yang. Demystifying and Mitigating Code-Dependent Switching Distortions in Current-Steering DACs
82 -- 93Cheng Li 0010, Chi-Hang Chan, Yan Zhu 0001, Rui P. Martins. Analysis of Reference Error in High-Speed SAR ADCs With Capacitive DAC
94 -- 104Spyridon Vlassis, Fabian Khateb, George Souliotis. An On-Chip Linear, Squaring, Cubic and Exponential Analog Function Generator
105 -- 118David E. Bellasi, Marco Crescentini, Domenico Cristaudo, Aldo Romani, Marco Tartagni, Luca Benini. A Broadband Multi-Mode Compressive Sensing Current Sensor SoC in 0.16 µm CMOS
119 -- 132Jian Liu, Xiu Yin Zhang, Quan Xue. Dual-Band Transmission-Line Resistance Compression Network and Its Application to Rectifiers
133 -- 146Alireza Asoodeh, Shahriar Mirabbasi. nth-Order Polyphase All-Pass Filters
147 -- 160Kazuki Kishida, Tadashi Maeda. Simple, Analytical Expressions of an Effect of Local Signal Imperfections on Four-Phase Passive-Mixer-Based Bandpass Filter
161 -- 174Charley Wilson, Brian A. Floyd. Harmonic Performance of Mixer-First Receivers With Circulant-Symmetric Basebands
175 -- 188Thomas Charisoulis, Collin Reiman, Douglas Frey, Miltiadis K. Hatalis. Current Feedback Compensation Circuit for 2T1C LED Displays: Analysis and Evaluation
189 -- 202Honglan Jiang, Cong Liu 0015, Fabrizio Lombardi, Jie Han 0001. Low-Power Approximate Unsigned Multipliers With Configurable Error Recovery
203 -- 214Chiou-Yng Lee, Jiafeng Xie. Digit-Serial Versatile Multiplier Based on a Novel Block Recombination of the Modified Overlap-Free Karatsuba Algorithm
215 -- 225Guanda Wang, Yue Zhang, Beibei Zhang, Bi-Wu, Jiang Nan, Xueying Zhang, Zhizhong Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Zhaohao Wang, Youguang Zhang, Weisheng Zhao. Ultra-Dense Ring-Shaped Racetrack Memory Cache Design
226 -- 238Xiaoqing Zhao, Hongbin Sun 0001, Longjun Liu, Yang Yang 0025, Liangliang Dai, Xiulong Wu, Ruizhi Zhang, Jianxiao Wang, Nanning Zheng. Architectural Exploration to Address the Reliability Challenges for ReRAM-Based Buffer in SSD
239 -- 250Hao Cai, You Wang, Lirida Alves de Barros Naviner, Xinning Liu, Weiwei Shan, Jun Yang 0006, Weisheng Zhao. Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration
251 -- 262Riadul Islam, Matthew R. Guthaus. HCDN: Hybrid-Mode Clock Distribution Networks
263 -- 273Xuan Hu, Michael J. Schultis, Matthew Kramer, Archit Bagla, Akshay Shetty, Joseph S. Friedman. Overhead Requirements for Stateful Memristor Logic
274 -- 287Ali Jafari, Ashwinkumar Ganesan, Chetan Sai Kumar Thalisetty, Varun Sivasubramanian, Tim Oates, Tinoosh Mohsenin. SensorNet: A Scalable and Low-Power Deep Convolutional Neural Network for Multimodal Data Classification
288 -- 301Yizhi Wang, Jun Lin, Zhongfeng Wang. FPAP: A Folded Architecture for Energy-Quality Scalable Convolutional Neural Networks
302 -- 312Rana A. Abdelaal, Hasan Erdem Yantir, Ahmed M. Eltawil, Fadi J. Kurdahi. Power Performance Tradeoffs Using Adaptive Bit Width Adjustments on Resistive Associative Processors
313 -- 326Honglan Jiang, Leibo Liu, Pieter P. Jonker, Duncan G. Elliott, Fabrizio Lombardi, Jie Han 0001. A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits
327 -- 340Masoud Pashaeifar, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram. A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders
341 -- 354Haisheng Li, Ping Fan, Haiying Xia, Huiling Peng, Shuxiang Song. Quantum Implementation Circuits of Quantum Signal Representation and Type Conversion
355 -- 368Brian Hong, Ali Hajimiri. A Phasor-Based Analysis of Sinusoidal Injection Locking in LC and Ring Oscillators
369 -- 382Guoyong Shi. Symbolic Distortion Analysis of Multistage Amplifiers
383 -- 390Federico Bizzarri, Angelo Maurizio Brambilla, Lorenzo Codecasa. Shooting by a Two-Step Galerkin Method
391 -- 402Hangli Ren, Guangdeng Zong, Hamid Reza Karimi. Asynchronous Finite-Time Filtering of Networked Switched Systems and its Application: an Event-Driven Method
403 -- 416Khoa LeTrung, Fakhreddine Ghaffari, Lounis Kessal, David Declercq, Emmanuel Boutillon, Chris Winstead, Bane Vasic. A Probabilistic Parallel Bit-Flipping Decoder for Low-Density Parity-Check Codes
417 -- 427Yangxurui Liu, Liang Liu 0002, Ove Edfors, Viktor Öwall. An Area-Efficient On-Chip Memory System for Massive MIMO Using Channel Data Compression
428 -- 437Ze-kun Zhou, Yue Shi, Yao Wang, Nie Li, Zhiping Xiao, Yunkun Wang, Xiaolin Liu, Zhuo Wang, Bo Zhang. A Resistorless High-Precision Compensated CMOS Bandgap Voltage Reference
438 -- 449Lin Cong, Jin Liu, Hoi Lee. A High-Efficiency Low-Profile Zero-Voltage Transition Synchronous Non-Inverting Buck-Boost Converter With Auxiliary-Component Sharing