Table of Contents

• An Ag/HfO2/Pt Threshold Switching Device with an Ultra-Low Leakage ( 1011), and Low Threshold Voltage (< 0.2 V) for Energy-Efficient Neuromorphic ComputingSolomon Amsalu Chekol, Felix Cüppers, Rainer Waser, Susanne Hoffmann-Eifert. 1-4 [doi]
• 1.5-nm Node Surrounding Gate Transistor (SGT)-SRAM Cell with Staggered Pillar and Self-Aligned Process for Gate, Bottom Contact, and PillarYisuo Li, Ken'ichi Kanazawa, Tetsuo Izawa, Koji Sakui, Georg Strof, Oskar Baumgartner, Gerhard Rzepa, Markus Karner, Zlatan Stanojevic, Nozomu Harada, Fujio Masuoka. 1-4 [doi]
• Ge-Se-Sb-N-based OTS scaling perspectives for high-density 1 S1R crossbar arraysJoel Minguet Lopez, Niccolo Castellani, Laurent Grenouillet, L. Reganaz, Gabriele Navarro, Mathieu Bernard, Catherine Carabasse, T. Magis, Damien Deleruyelle, Marc Bocquet, Jean Michel Portal, E. Nowak, Gabriel Molas. 1-4 [doi]
• A 1 Tb 4b/cell 5th-Generation 3D-NAND Flash Memory with 2ms tPROG, 110us tR and 1.2Gb/s/pin InterfaceDoo-Hyun Kim. 1-4 [doi]
• First Study of P-Channel Vertical Split-Gate Flash Memory Device with Various Electron and Hole Injection Methods and Potential Future Possibility to Enable Functional Memory CircuitsCheng-Lin Sung, Hang-Ting Lue, Wei-Chen Chen, Tzu-Hsuan Hsu, Keh-Chung Wang, Chih-Yuan Lu. 1-4 [doi]
• Scaling Potential Analysis for the CMOS Compatible Ox-RRAMXiaoxin Xu, Wenxuan Sun, Jie Yu, Jinru Lai, Danian Dong, Hangbing Lv. 1-4 [doi]
• Bringing in Cryogenics to Storage: Characteristics and Performance Improvement of 3D Flash MemoryYuta Aiba, Hitomi Tanaka, Takashi Maeda, Keiichi Sawa, Fumie Kikushima, Masayuki Miura, Toshio Fujisawa, Mie Matsuo, Hideto Horii, Hideko Mukaida, Tomoya Sanuki. 1-4 [doi]
• Commercialization of 1Gb Standalone Spin-Transfer Torque MRAMJ. J. Sun, M. DeHerrera, B. Hughes, S. Ikegawa, H. K. Lee, Fred B. Mancoff, K. Nagel, G. Shimon, Syed M. Alam, D. Houssameddine, S. Aggarwal. 1-4 [doi]
• High-Endurance and Low-Voltage operation of 1T1C FeRAM Arrays for Nonvolatile Memory ApplicationJun Okuno, Takafumi Kunihiro, Kenta Konishi, Hideki Maemura, Yusuke Shuto, Fumitaka Sugaya, Monica Materano, Tarek Ali, Maximilian Lederer, Kati Kühnel, Konrad Seidel, Uwe Schroeder, Thomas Mikolajick, Masanori Tsukamoto, Taku Umebayashi. 1-3 [doi]
• Optimization of Switching Metrics for CMOS Integrated HfO2 based RRAM Devices on 300 mm Wafer PlatformJubin Hazra, Maximilian Liehr, Karsten Beckmann, Minhaz Abedin, Sarah Rafq, Nathaniel C. Cady. 1-4 [doi]
• Write-In-Place Operation and It's Advantages to Upgrade the 3D AND-type Flash Memory PerformancesHang-Ting Lue, Tzu-Hsuan Hsu, Cheng-Lin Sung, Teng-Hao Yeh, Keh-Chung Wang, Chih-Yuan Lu. 1-4 [doi]
• Design of Non-volatile Capacitive Crossbar Array for In-Memory ComputingYuan-Chun Luo, Anni Lu, Jae Hur, Shaolan Li, Shimeng Yu. 1-4 [doi]
• Hot Electron Source Side Injection Comprehension in 40nm eSTM™Franck Melul, Thibault Kempf, Vincenzo Della Marca, Marc Bocquet, Madjid Akbal, Frederique Trenteseaux, Marc Mantelli, Arnaud Régnier, Stephan Niel, Francesco La Rosa. 1-4 [doi]
• Integration scheme for 3D NAND with nonreplacement word line and its cell characteristics investigationLiu Jiang, Chang Seok Kang, Ashish Pal, El Mehdi Bazizi, Tomohiko Kitajima, Nancy Fung, Gabriela Alva, Amy Child, Bhaskar Bhuyan, Takehito Koshizawa, Sung Kwan Kang, Gill Lee, David Hwang, Blessy Alexander, Buvna Ayyagari. 1-4 [doi]
• Threshold switching in a-Si and a-Ge based MSM selectors and its implications for device reliabilityTaras Ravsher, Shamin H. Sharifi, Andrea Fantini, Hubert Hody, Thomas Witters, Daniele Garbin, Robin Degraeve, Valeri Afanas'ev, Jan Van Houdt, Ludovic Goux, D. Crotti, Gouri Sankar Kar. 1-4 [doi]
• Modeling of oxide-based ECRAM programming by drift-diffusion ion transportMatteo Baldo, Daniele Ielmini. 1-4 [doi]
• Development of 16 Mb NRAM Aiming for High Reliability, Small Cell Area, and High Switching SpeedHitoshi. Saito, J. Watanabe, J. Seino, T. Tamura, N. Sashida, K. Hara, K. Kawabata, A. Fujii, J. Ohno, A. Nakakubo, M. Kojima, T. Shimoyama, H. Wada, Lee Cleveland, H. Luan, R. Sen, N. Leong, T. Gallagher, Thomas Rueckes. 1-4 [doi]
• Simulated Annealing Algorithm & ReRAM Device Co-optimization for Computation-in-MemoryKenta Taoka, Naoko Misawa, Shunsuke Koshino, Chihiro Matsui, Ken Takeuchi. 1-4 [doi]
• Dynamic Flash Memory with Dual Gate Surrounding Gate Transistor (SGT)Koji Sakui, Nozomu Harada. 1-4 [doi]
• STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache applicationSidharth Rao, Woojin Kim, Simon Van Beek, Shreya Kundu, Manu Perumkunnil, Stefan Cosemans, Farrukh Yasin, Sebastien Couet, Robert Carpenter, Barry J. O'Sullivan, Shamin H. Sharifi, N. Jossart, Laurent Souriau, Ludovic Goux, Dimitri Crotti, Gouri Sankar Kar. 1-4 [doi]
• Multilayer OTS Selectors Engineering for High Temperature Stability, Scalability and High EnduranceC. Laguna, Mathieu Bernard, Nicolas Bernier, D. Rouchon, N. Rochat, Julien Garrione, A. Jannaud, Emmanuel Nolot, V. Meli, Niccolo Castellani, C. Sabbione, Guillaume Bourgeois, Marie-Claire Cyrille, Liviu Militaru, A. Souifi, Gabriele Navarro, Etienne Nowak. 1-4 [doi]
• A TCAD Compatible SONOS Trapping Layer Model for Accurate Programming DynamicsFranz Schanovsky, Devin Verreck, Antonio Arreghini, Gerhard Rzepa, Zlatan Stanojevic, Christian Kernstock, Oskar Baumgartner, Maarten Rosmeulen, Markus Karner. 1-4 [doi]
• A Back-End-Of-Line Compatible, Ferroelectric Analog Non-Volatile MemoryLaura Bégon-Lours, Mattia Halter, Diana Dávila Pineda, Valeria Bragaglia, Youri Popoff, A. la Porta, Daniel Jubin, Jean Fompeyrine, Bert J. Offrein. 1-4 [doi]
• 50x Endurance Improvement in TaOx RRAM by Extrinsic DopingTim Kempen, Rainer Waser, Vikas Rana. 1-4 [doi]
• PSA-STT-MRAM solution for extended temperature stabilitySteven Lequeux, Trevor Almeida, Nuno Caçoilo, Alvaro Palomino, Ioan Lucian Prejbeanu, Ricardo C. Sousa, David Cooper, Bernard Dieny. 1-4 [doi]
• A Comprehensive Oxide-Based ReRAM TCAD Model with Experimental VerificationW. Goes, D. Green, Philippe Blaise, Giuseppe Piccolboni, Alessandro Bricalli, Amir Regev, Gabriel Molas, Jean-Francois Nodin. 1-4 [doi]
• Highly Reliable 28nm Embedded Flash Process Development for High-Density and High-Speed Automotive Grade-1 ApplicationJaehun Lee, Youngcheon Jeong, Kyongsik Yeom, Changmin Jeon, Jongsung Woo, Sangjin Lee, Ga Young Lee, Dong-Hwee Hwang, Yong Seok Chung, Minji Seo, Dong-hyun Kim, DalHwan Kim, Yongsik Kim, HyunChang Lee, Soomin Cho, Myeonghee Oh, Hyun-Jin Shin, Gun Rae Kim, Sungyoung Yoon, Yong Kyu Lee, Young-Ki Hong. 1-3 [doi]
• Understanding the memory window in 1T-FeFET memories: a depolarization field perspectiveK. Kaczmarek, Marie Garcia Bardon, Y. Xiang, Laurent Breuil, Nicolo Ronchi, Bertrand Parvais, Guido Groeseneken, Jan Van Houdt. 1-4 [doi]
• First demonstration of ferroelectric Si: HfO2 based 3D FE-FET with trench architecture for dense nonvolatile memory applicationK. Banerjee, L. Breuil, A. P. Milenin, M. Pak, J. Stiers, Sean R. C. McMitchell, L. Di Piazza, G. Van den bosch, Jan Van Houdt. 1-4 [doi]
• A Technology Path for Scaling Embedded FeRAM to 28nm with 2T1C StructureJae Hur, Yuan-Chun Luo, Zheng Wang, Wonbo Shim, Asif Islam Khan, Shimeng Yu. 1-4 [doi]
• Novel embedded single poly floating gate flash demonstrated in 22nm FDSOI technologyThomas Melde, Martin Trentzsch, Stefan Dünkel, R. Richter, M. Otto, H. Giesler, F. Weisbuch, N. Weddeler, Sven Beyer. 1-4 [doi]
• 16kbit 1T1R OxRAM arrays embedded in 28nm FDSOI technology demonstrating low BER, high endurance, and compatibility with core logic transistorsLaurent Grenouillet, Niccolo Castellani, Alain Persico, V. Meli, S. Martin, Olivier Billoint, R. Segaud, Stefania Bernasconi, C. Pellissier, Carine Jahan, Christelle Charpin-Nicolle, P. Dezest, Catherine Carabasse, Paul Besombes, S. Ricavy, N. P. Tran, A. Magalhaes-Lucas, A. Roman, C. Boixaderas, T. Magis, Messaoud Bedjaoui, M. Tessaire, A. Seignard, F. Mazen, S. Landis, Elisa Vianello, Gabriel Molas, Fred Gaillard, J. Arcamone, E. Nowak. 1-4 [doi]