Abstract is missing.
- Comparison of Radiation Hardness of Stacked Transmission-Gate Flip Flop and Stacked Tristate-Inverter Flip Flop in a 65 nm Thin BOX FDSOI ProcessMitsunori Ebara, Kodai Yamada, Jun Furuta, Kazutoshi Kobayashi. 1-6 [doi]
- Machine Learning to Tackle the Challenges of Transient and Soft Errors in Complex CircuitsThomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone. 7-14 [doi]
- Selective Fault Tolerance by Counting Gates with Controlling ValueAnselm Breitenreiter, Stefan Weidling, Oliver Schrape, Steffen Zeidler 0001, Pedro Reviriego, Milos Krstic. 15-20 [doi]
- Towards Improvement of Mission Mode Failure Diagnosis for System-on-ChipS. Mhamdi, Arnaud Virazel, P. Girard, Alberto Bosio, Etienne Auvray, E. Faehn, A. Ladhar. 21-26 [doi]
- Automated Die Inking through On-line Machine LearningConstantinos Xanthopoulos, Arnold Neckermann, Paulus List, Klaus-Peter Tschernay, Peter Sarson, Yiorgos Makris. 27-32 [doi]
- Stuck-at-OFF Fault Analysis in Memristor-Based Architecture for SynchronizationManuel Escudero, Ioannis Vourkas, Antonio Rubio. 33-37 [doi]
- Flight Safety Certification Implications for Complex Multi-Core Processor based Avionics SystemsJyotika Athavale, Riccardo Mariani, Michael Paulitsch. 38-39 [doi]
- A Design for Testability Method for k-Cycle Capture Test GenerationYuta Ishiyama, Toshinori Hosokawa, Hiroshi Yamazaki. 40-43 [doi]
- An Efficient SAT-Attack Algorithm Against Logic EncryptionYusuke Matsunaga, Masayoshi Yoshimura. 44-47 [doi]
- Development of FF Circuits for Measures Against Power Supply NoiseYukiya Miura, Miyuki Inoue, Yuya Kinoshita. 48-51 [doi]
- Efficient Fault Injection based on Dynamic HDL Slicing TechniqueAhmet Cagri Bagbaba, Maksim Jenihhin, Jaan Raik, Christian Sauer. 52-53 [doi]
- Empirical Evaluation on Anomaly Behavior Detection for Low-Cost Micro-Controllers Utilizing Accurate Power AnalysisKento Hasegawa, Kiyoshi Chikamatsu, Nozomu Togawa. 54-57 [doi]
- Fault Modeling and Simulation of Memristor based Gas SensorsSaurabh Khandelwal, Anu Bala, Vishal Gupta, Marco Ottavi, Eugenio Martinelli, Abusaleh M. Jabir. 58-59 [doi]
- Methodology for Tradeoffs between Performance and Lifetimes of Integrated CircuitsDaniel J. Weyer, Francis G. Wolff, Christos A. Papachristou, Steve Clay. 60-63 [doi]
- Implementation of CMOS Logic Circuits with Perfect Fault Detection Using Preservative Reversible GatesSajjad Parvin, Mustafa Altun. 64-67 [doi]
- Reliability Challenges with Self-Heating and Aging in FinFET TechnologyHussam Amrouch, Victor M. van Santen, Om Prakash, Hammam Kattan, Sami Salamin, Simon Thomann, Jörg Henkel. 68-71 [doi]
- Global and Local Process Variation Simulations in Design for Reliability approachAudrey Michard, Florian Cacho, Damien Celeste, Xavier Federspiel. 72-75 [doi]
- HCD-Induced GIDL Increase and Circuit ImplicationsEdoardo Ceccarelli, Kevin Manning, Giuseppe Macera, Dennis Dempsey, Colm Heffernan. 76-79 [doi]
- Variation-aware Fault Modeling and Test Generation for STT-MRAMSarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, H. Grigoryan, G. Tshagharyan. 80-83 [doi]
- Cost-effective Resilient FPGA-based LDPC Decoder ArchitectureEduardo Nunes de Souza, Gabriel L. Nazar. 84-89 [doi]
- Software-only Diverse Redundancy on GPUs for Autonomous Driving PlatformsSergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella. 90-96 [doi]
- Testing permanent faults in pipeline registers of GPGPUs: A multi-kernel approachJosie E. Rodriguez Condia, Matteo Sonza Reorda. 97-102 [doi]
- On a Side Channel and Fault Attack Concurrent Countermeasure Methodology for MCU-based Byte-sliced Cipher ImplementationsEhsan Aerabi, Athanasios Papadimitriou, David Hély. 103-108 [doi]
- HATE: a HArdware Trojan Emulation Environment for Microprocessor-based SystemsCristiana Bolchini, Luca Cassano, Ivan Montalbano, Giampiero Repole, Andrea Zanetti, Giorgio Di Natale. 109-114 [doi]
- On the Encryption of the Challenge in Physically Unclonable FunctionsElena Ioana Vatajelu, Giorgio Di Natale, Mohd Syafiq Mispan, Basel Halak. 115-120 [doi]
- Self-Monitoring, Self-Healing Biomorphic Sensor TechnologyAndrew Richardson, David Cheneler. 121-124 [doi]
- Trusted and Secure Design of Analog/RF ICs: Recent DevelopmentsKiruba S. Subramani, Georgios Volanis, Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos, Yiorgos Makris. 125-128 [doi]
- Modern Hardware Margins: CPUs, GPUs, FPGAs Recent System-Level StudiesDimitris Gizopoulos, George Papadimitriou, Athanasios Chatzidimitriou, Vijay Janapa Reddi, Behzad Salami 0001, Osman S. Unsal, Adrián Cristal Kestelman, Jingwen Leng. 129-134 [doi]
- Resiliency Demands on Next Generation Critical Embedded SystemsJacob A. Abraham. 135-138 [doi]
- Studying Aging and Soft Error Mitigation Jointly under Constrained Scenarios in Multi-CoresFlorian Kriebel, Semeen Rehman, Muhammad Shafique 0001. 139-142 [doi]
- Bayesian models for early cross-layer reliability analysis and design space explorationAlessandro Vallero, Alessandro Savino, Alberto Carelli, Stefano Di Carlo. 143-146 [doi]
- 3D Integration: Another Dimension Toward Hardware SecurityJohann Knechtel, Satwik Patnaik, Ozgur Sinanoglu. 147-150 [doi]
- Can Multi-Layer Microfluidic Design Methods Aid Bio-Intellectual Property Protection?Mohammed Shayan, Sukanta Bhattacharjee, Yong-Ak Song, Krishnendu Chakrabarty, Ramesh Karri. 151-154 [doi]
- JTAG: A Multifaceted Tool for Cyber SecurityPrashant Hari Narayan Rajput, Michail Maniatakos. 155-158 [doi]
- The Missing Applications Found: Robust Design Techniques and Novel Uses of MemristorsMarco Ottavi, Vishal Gupta, Saurabh Khandelwal, Shahar Kvatinsky, Jimson Mathew, Eugenio Martinelli, Abusaleh M. Jabir. 159-164 [doi]
- Efficient Concurrent Error Detection for SEC-DAEC EncodersJiaqiang Li, Pedro Reviriego, Costas Argyrides, Liyi Xiao. 165-170 [doi]
- A New DEC/TED Code for Fast Correction of 2-Bit-ErrorsPaul-Patrick Nordmann, Michael Gössel. 171-175 [doi]
- A Vulnerability Factor for ECC-protected MemoryLuc Jaulmes, Miquel Moretó, Mateo Valero, Marc Casas. 176-181 [doi]
- QuSecNets: Quantization-based Defense Mechanism for Securing Deep Neural Network against Adversarial AttacksFaiq Khalid, Hassan Ali, Hammad Tariq, Muhammad Abdullah Hanif, Semeen Rehman, Rehan Ahmed, Muhammad Shafique 0001. 182-187 [doi]
- TrISec: Training Data-Unaware Imperceptible Security Attacks on Deep Neural NetworksFaiq Khalid, Muhammad Abdullah Hanif, Semeen Rehman, Rehan Ahmed, Muhammad Shafique 0001. 188-193 [doi]
- LED Alert: Supply Chain Threats for Stealthy Data Exfiltration in Industrial Control SystemsDimitrios Tychalas, Anastasis Keliris, Michail Maniatakos. 194-199 [doi]
- Reliability-Aware Task Allocation Latency Optimization in Edge ComputingAndreas Kouloumpris, Maria K. Michael, Theocharis Theocharides. 200-203 [doi]
- Towards Scalable Lifetime Reliability Management for Dark Silicon Manycore SystemsVijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Muhammad Shafique. 204-207 [doi]
- Power-aware Reliable Communication for the IoTPhilipp H. Kindt, Samarjit Chakraborty. 208-211 [doi]
- Characterization and Modeling of SET Generation Effects in CMOS Standard Logic CellsMarko S. Andjelkovic, Yuanqing Li, Zoran Stamenkovic, Milos Krstic, Rolf Kraemer. 212-215 [doi]
- Recipes to build-up a rad-hard CMOS memoryCristiano Calligaro, Umberto Gatti. 216-219 [doi]
- A Radiation Tolerant 10/100 Ethernet Transceiver for Space ApplicationsAnselm Breitenreiter, Jesús López, Pedro Reviriego, Milos Krstic, Úrsula Gutierro, Manuel Sánchez-Renedo, Daniel González. 220-223 [doi]
- Meeting the Conflicting Goals of Low-Power and Resiliency Using Emerging Memories : (Invited Paper)Karthikeyan Nagarajan, Mohammad Nasim Imtiaz Khan, Sina Sayyah Ensan, Abdullah Ash-Saki, Swaroop Ghosh. 224-227 [doi]
- Variation-Resilient Design Techniques for Energy-Constrained SystemsBing-Chen Wu, Tsung-Te Liu. 228-231 [doi]
- A Test Generation Method Based on k-Cycle Testing for Finite State MachinesYuya Kinoshita, Toshinori Hosokawa, Hideo Fujiwara. 232-235 [doi]
- Total Ionizing Dose Effects by alpha irradiation on circuit performance and SEU tolerance in thin BOX FDSOI processTakashi Yoshida, Kazutoshi Kobayashi, Jun Furuta. 236-238 [doi]
- PASCAL: Timing SCA Resistant Design and Verification FlowXinhui Lai, Maksim Jenihhin, Jaan Raik, Kolin Paul. 239-242 [doi]
- Error Correction Coding of Stochastic Numbers Using BER MeasurementRyota Ishikawa, Masashi Tawada, Masao Yanagisawa, Nozomu Togawa. 243-246 [doi]
- Control Loop of Image Correction based on Detection and Self-Healing of Defective PixelsGhislain Takam Tchendjou, Emmanuel Simeu. 247-250 [doi]
- Securing Scan through Plain-text RestrictionSatyadev Ahlawat, Kailash Ahirwar, Jaynarayan T. Tudu, Masahiro Fujita, Virendra Singh. 251-252 [doi]
- A Novel Simulation-Based Approach for ISO 26262 Hazard Analysis and Risk AssessmentJacopo Sini, Massimo Violante, V. Dodde, R. Gnaniah, L. Pecorella. 253-254 [doi]
- Efficient Methodology for ISO26262 Functional Safety VerificationFelipe Augusto da Silva, Ahmet Cagri Bagbaba, Said Hamdioui, Christian Sauer. 255-256 [doi]
- Identification of Failure Modes for Circuit Samples with Confounded Causes of FailureShu-Han Hsu, Ying-Yuan Huang, Kexin Yang, Linda Milor. 257-262 [doi]
- ICE-RADAR: In-situ, Cost-Effective Razor Flip-Flop Deployment for Aging ResilienceKai-Chiang Wu, Wei-Tao Huang, Chiao-Yang Huang. 263-268 [doi]
- Estimation of oxide breakdown effects by fault injectionChiara Sandionigi, Olivier Héron. 269-274 [doi]
- Run-time Detection and Mitigation of Power-Noise VirusesVasileios Tenentes, Shidhartha Das, Daniele Rossi 0001, Bashir M. Al-Hashimi. 275-280 [doi]
- Analysis on Retention Time and Adaptive Refresh in Embedded DRAMs with Aging BenefitsAbdessamad Najdi, Daniele Rossi 0001, Vasileios Tenentes. 281-286 [doi]
- iATPG: Instruction-level Automatic Test Program Generation for Vulnerabilities under DVFS attackKuozhong Zhang, Junying Huang, Jing Ye, Xiaochun Ye, Da Wang, Dongrui Fan, Huawei Li, Xiaowei Li 0001, Zhimin Zhang. 287-292 [doi]
- A Controller Augmentation Method to Improve Transition Fault Coverage for RTL Data-PathsYuki Takeuchi, Toshinori Hosokawa, Hiroshi Yamazaki, Masayoshi Yoshimura. 293-298 [doi]
- Application Specific True Critical Paths Identification in Sequential CircuitsLembit Jürimägi, Raimund Ubar, Maksim Jenihhin, Jaan Raik, Sergei Devadze, Adeboye Stephen Oyeniran. 299-304 [doi]
- Compact Modeling of NBTI Replicating AC Stress / Recovery from a Single-shot Long-term DC MeasurementTakumi Hosaka, Shinichi Nishizawa, Ryo Kishida, Takashi Matsumoto, Kazutoshi Kobayashi. 305-309 [doi]
- Detecting Errors in Convolutional Neural Networks Using Inter Frame Spatio-Temporal CorrelationLucas Klein Draghetti, Fernando Fernandes dos Santos, Luigi Carro, Paolo Rech. 310-315 [doi]
- Hierarchical Check Based Detection and Diagnosis of Sensor-Actuator Malfunction in Autonomous Systems: A Quadcopter StudyMd Imran Momtaz, Abhijit Chatterjee. 316-321 [doi]
- Dual Detection of Heating and Photocurrent attacks (DDHP) Sensor using Hybrid CMOS/STT-MRAMM. Kharbouche-Harrari, Romain Wacquez, Gregory di Pendina, Jean-Max Dutertre, Jérémy Postel-Pellerin, D. Aboulkassimi, Jean Michel Portal. 322-327 [doi]