Yoshihito Amemiya - researchr alias

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Viewing Publication 1 - 62 from 62

2011

Neuro-morphic Circuit Architectures Employing Temporal Noises and Device Fluctuations to Improve Signal-to-noise Ratio in a Single-electron Pulse-density ModulatorAndrew Kilinga Kikombo, Tetsuya Asai, Yoshihito Amemiya. ijuc, 7(1-2):53-63, 2011. [doi]

A 0.6-4.5 GHz inductorless CMOS low noise amplifier with gyrator-C networkAkira Kondou, Masayuki Ikebe, Junichi Motohisa, Yoshihito Amemiya, Eiichi Sano. icecsys 2011: 326-329 [doi]

2010

A behavioral model of unipolar resistive RAMs and its application to HSPICE integrationNobuo Akou, Tetsuya Asai, Takeshi Yanagida, Tomoji Kawai, Yoshihito Amemiya. ieiceee, 7(19):1467-1473, 2010. [doi]

A CMOS Phase-Shift oscillator Based on the conduction of HeatTakaaki Hirai, Tetsuya Asai, Yoshihito Amemiya. jcsc, 19(4):763-772, 2010. [doi]

High-Resistance Resistor Consisting of a Subthreshold CMOS Differential PairShin ichi Asai, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya. ieicet, 93-C(6):741-746, 2010. [doi]

Array-Enhanced Stochastic Resonance in a Network of Noisy Neuromorphic CircuitsGessyca Maria Tovar, Tetsuya Asai, Yoshihito Amemiya. iconip 2010: 188-195 [doi]

An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIsYusuke Tsugita, Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. ieicet, 93-C(6):835-841, 2010. [doi]

circhboxC Current Reference Circuit Consisting of Subthreshold CMOS CircuitsKen Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. tcas, 57-II(9):681-685, 2010. [doi]

2009

Offset cancellation with subthreshold-operated feedback circuit for fully differential amplifiersTomoki Iida, Tetsuya Asai, Eiichi Sano, Yoshihito Amemiya. icecsys 2009: 140-143 [doi]

Exploiting Temporal Noises and Device Fluctuations in Enhancing Fidelity of Pulse-Density Modulator Consisting of Single-Electron Neural CircuitsAndrew Kilinga Kikombo, Tetsuya Asai, Yoshihito Amemiya. iconip 2009: 384-391 [doi]

Pulse-Density Modulation with an Ensemble of Single-Electron Circuits Employing Neuronal Heterogeneity to Achieve High Temporal ResolutionAndrew Kilinga Kikombo, Tetsuya Asai, Yoshihito Amemiya. nanonet 2009: 51-56 [doi]

A pulse-density modulation circuit exhibiting noise shaping with single-electron neuronsAndrew Kilinga Kikombo, Tetsuya Asai, Takahide Oya, Alexandre Schmid, Yusuf Leblebici, Yoshihito Amemiya. ijcnn 2009: 1600-1605 [doi]

Threshold-Logic Devices Consisting of Subthreshold CMOS CircuitsTaichi Ogawa, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. ieicet, 92-A(2):436-442, 2009. [doi]

On-chip PVT Compensation Techniques for Low-voltage CMOS Digital LSIsYusuke Tsugita, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya, Tetsuya Hirose. iscas 2009: 1565-1568 [doi]

Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit TechniquesKen Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. ieicet, 92-A(12):3079-3081, 2009. [doi]

A 300 nW, 15 ppm°C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETsKen Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. jssc, 44(7):2047-2054, 2009. [doi]

Low-power Clock Reference Circuit for Intermittent Operation of Subthreshold LSIsKen Ueno, Tetsuya Asai, Yoshihito Amemiya. iscas 2009: 5-8 [doi]

A 30-MHz, 90-ppm/°C fully-integrated clock reference generator with frequency-locked loopKen Ueno, Tetsuya Asai, Yoshihito Amemiya. esscirc 2009: 392-395 [doi]

A 300 nW, 7 ppm/degreeC CMOS voltage reference circuit based on subthreshold MOSFETsKen Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. aspdac 2009: 95-96 [doi]

Stochastic Resonance in an Array of Locally-Coupled McCulloch-Pitts Neurons with Population HeterogeneityAkira Utagawa, Tohru Sahashi, Tetsuya Asai, Yoshihito Amemiya. ieicet, 92-A(10):2508-2513, 2009. [doi]

2008

Temperature-compensated CMOS current reference circuit for ultralow-power subthreshold LSIsTetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. ieiceee, 5(6):204-210, 2008. [doi]

Noise-Tolerant Analog Circuits for Sensory Segmentation Based on Symmetric STDP LearningGessyca Maria Tovar, Tetsuya Asai, Yoshihito Amemiya. iconip 2009: 851-858 [doi]

A 0.3μW, 7 ppm/°C CMOS Voltage reference circuit for on-chip process monitoring in analog circuitsKen Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. esscirc 2008: 398-401 [doi]

Noise-Induced Synchronization among Sub-RF CMOS Analog Oscillators for Skew-Free Clock DistributionAkira Utagawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya. ieicet, 91-A(9):2475-2481, 2008. [doi]

On Digital LSI Circuits Exploiting Collision-Based Fusion GatesKazuhito Yamada, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya. ijuc, 4(1):45-59, 2008. [doi]

2007

Discrete Dynamical Systems Consisting of Single-electron CircuitsAndrew Kilinga Kikombo, Takahide Oya, Tetsuya Asai, Yoshihito Amemiya. IJBC, 17(10):3613-3617, 2007. [doi]

A subthreshold CMOS circuit for a piecewise linear neuromorphic oscillator with current-mode low-pass filtersKazuki Nakada, Tetsuya Asai, Tetsuya Hirose, Hatsuo Hayashi, Yoshihito Amemiya. ijon, 71(1-3):3-12, 2007. [doi]

A Single-Electron Reaction-Diffusion Device for Computation of a Voronoi DiagramTakahide Oya, Tetsuya Asai, Yoshihito Amemiya. ijuc, 3(4):271-284, 2007. [doi]

A CMOS Reaction-diffusion Device Using Minority-Carrier Diffusion in SemiconductorsMotoyoshi Takahashi, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya. IJBC, 17(5):1713-1719, 2007. [doi]

Neuromorphic CMOS Circuits implementing a Novel Neural Segmentation Model based on Symmetric STDP LearningGessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya. ijcnn 2007: 897-901 [doi]

Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP LearningGessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya. iconip 2008: 117-126 [doi]

CMOS Smart Sensor for Monitoring the Quality of PerishablesKen Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. jssc, 42(4):798-803, 2007. [doi]

Floating millivolt reference for PTAT current generation in Subthreshold MOS LSIsKen Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. iscas 2007: 3748-3751 [doi]

An Inhibitory Neural-Network Circuit Exhibiting Noise Shaping with Subthreshold MOS Neuron CircuitsAkira Utagawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya. ieicet, 90-A(10):2108-2115, 2007. [doi]

2006

Single-Electron Logic Systems Based on a Graphical Representation of Digital FunctionsYoshihito Amemiya. ieicet, 89-C(11):1504-1511, 2006. [doi]

A subthreshold Analog MOS Circuit for Lotka-volterra Chaotic oscillatorTetsuya Asai, Taishi Kamiya, Tetsuya Hirose, Yoshihito Amemiya. IJBC, 16(1):207-212, 2006. [doi]

Power-supply circuits for ultralow-power subthreshold MOS-LSIsTetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. ieiceee, 3(22):464-468, 2006. [doi]

A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation EnergyKen Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. ieicet, 89-A(4):902-907, 2006. [doi]

Design methodologies for compact logic circuits based on collision-based computingKazuhito Yamada, Ikuko N. Motoike, Tetsuya Asai, Yoshihito Amemiya. ieiceee, 3(13):292-298, 2006. [doi]

2005

Analog Reaction-Diffusion Chip Imitating Belousov-Zhabotinsky Reaction with Hardware Oregonator ModelTetsuya Asai, Yusuke Kanazawa, Tetsuya Hirose, Yoshihito Amemiya. ijuc, 1(2):123-147, 2005.

A quadrilateral-object composer for binary images with reaction-diffusion cellular automataTetsuya Asai, Masayuki Ikebe, Tetsuya Hirose, Yoshihito Amemiya. paapp, 20(1):57-67, 2005. [doi]

Ultralow-Power Current Reference Circuit with Low Temperature DependenceTetsuya Hirose, Toshimasa Matsuoka, Kenji Taniguchi, Tetsuya Asai, Yoshihito Amemiya. ieicet, 88-C(6):1142-1147, 2005. [doi]

Analog CMOS implementation of a CNN-based locomotion controller with floating-gate devicesKazuki Nakada, Tetsuya Asai, Yoshihito Amemiya. tcas, 52-I(6):1095-1103, 2005. [doi]

Analog CMOS implementation of a neuromorphic oscillator with current-mode low-pass filtersKazuki Nakada, Tetsuya Asai, Yoshihito Amemiya. iscas 2005: 1923-1926 [doi]

Reaction-Diffusion Systems Consisting of Single-Electron OscillatorsTakahide Oya, Tetsuya Asai, Takashi Fukui, Yoshihito Amemiya. ijuc, 1(2):179-196, 2005.

On the fault tolerance of a clustered single-electron neural network for differential enhancementTakahide Oya, Alexandre Schmid, Tetsuya Asai, Yusuf Leblebici, Yoshihito Amemiya. ieiceee, 2(3):76-80, 2005. [doi]

Single-electron circuit for inhibitory spiking neural network with fault-tolerant architectureTakahide Oya, Tetsuya Asai, Yoshihito Amemiya, Alexandre Schmid, Yusuf Leblebici. iscas 2005: 2535-2538 [doi]

2004

A MOS circuit for bursting neural oscillators with excitable oregonatorsYusuke Kanazawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya. ieiceee, 1(4):73-76, 2004. [doi]

A Novel CMOS Circuit for Depressing Synapse and its Application to Contrast-Invariant Pattern Classification and Synchrony DetectionYusuke Kanazawa, Tetsuya Asai, Masayuki Ikebe, Yoshihito Amemiya. ijra, 19(4), 2004. [doi]

Reaction-diffusion chip implementing excitable lattices with multiple-valued cellular automataHiroshi Matsubara, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya. ieiceee, 1(9):248-252, 2004. [doi]

Biologically-Inspired Locomotion Controller for a Quadruped Walking Robot: Analog IC Implementation of a CPG-Based ControllerKazuki Nakada, Tetsuya Asai, Yoshihito Amemiya. jrm, 16(4):397-403, 2004. [doi]

Design of an Artificial Central Pattern Generator with Feedback ControllerKazuki Nakada, Tetsuya Asai, Yoshihito Amemiya. iasc, 10(2):185-192, 2004. [doi]

An analog CMOS chip implementing a CNN-based locomotion controller for quadruped walking robotsKazuki Nakada, Tetsuya Asai, Yoshihito Amemiya. iscas 2004: 1-4 [doi]

2003

2002

A CMOS Reaction-Diffusion Circuit Based on Cellular-Automaton Processing Emulating the Belousov-Zhabotinsky ReactionTetsuya Asai, Yuusaku Nishimiya, Yoshihito Amemiya. ieiceta, 85-A(9):2093-2096, 2002. [doi]

A novel architecture for implementing large-scale Hopfield neural networks using CDMA communication technologyYusuke Kanazawa, Takashi Yamada, Tetsuya Asai, Yoshihito Amemiya. SMC 2002: 6 [doi]

2000

An Analog-Digital Hybrid CMOS Circuit for Two-Dimensional Motion Detection with Correlation Neural NetworksTetsuya Asai, Masato Koutani, Yoshihito Amemiya. ijcnn 2000: 494-499 [doi]

1998

nu-MOS cellular-automaton devices for intelligent image sensorsMasayuki Ikebe, Masamichi Akazawa, Yoshihito Amemiya. kes 1998: 447-453 [doi]

1994

An all-analog expandable neural network LSI with on-chip backpropagation learningTakashi Morie, Yoshihito Amemiya. jssc, 29(9):1086-1093, September 1994. [doi]

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