H. Udayakumar - researchr alias

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Viewing Publication 1 - 13 from 13

2009

2008

2006

A Methodology for Switching Activity Based IO Powerpad OptimisationSnehashis Roy, Sukumar Jairam, H. Udayakumar. vlsid 2006: 794-797 [doi]

2005

A Methodology for Fast Vector Based Power Supply and Substrate Noise AnalysesSankar P. Debnath, Sukumar Jairam, H. Udayakumar. vlsid 2005: 808-811 [doi]

2004

Package-silicon co-design - Experiment with an SOC designP. R. Suresh, P. K. Sundararajan, Anshuli Goel, H. Udayakumar, C. Srinivasan, Vasudev Sinari, Raghavendrakumar Ravinutala. vlsid 2004: 531 [doi]

2002

Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-SiliconKaranth Shankaranarayana, Soujanna Sarkar, R. Venkatraman, Shyam S. Jagini, N. Venkatesh, Jagdish C. Rao, H. Udayakumar, M. Sambandam, K. P. Sheshadri, S. Talapatra, Parag Mhatre, Jais Abraham, Rubin A. Parekhji. vlsid 2002: 781-788 [doi]

2000

A Framework for Cost vs. Performance Tradeoffs in the Design of Digital Signal Processor CoresKarthikeyan Madathil, Jagdish C. Rao, Subash G. Chandar, Amitabh Menon, Avinash K. Gautam, Amit M. Brahme, H. Udayakumar. vlsid 2000: 468 [doi]

1999

A Design Methodology for a Fully Synthesized High Speed DSP Core in a Deep Sub-Micron TechnologyAvinash K. Gautam, Jagdish C. Rao, Karthikeyan Madathil, Vilesh Shah, H. Udayakumar, Amitabh Menon, Subash G. Chandar. iccd 1999: 340-347 [doi]

A Design-in Methodology to Ensure First Time Success of Complex Digital Signal ProcessorsAvinash K. Gautam, Jagdish C. Rao, Rohit Rathi, H. Udayakumar. vlsid 1999: 346-349 [doi]

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