Toru Awashima - researchr alias

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Viewing Publication 1 - 11 from 11

2013

Optimizing time and space multiplexed computation in a dynamically reconfigurable processorTakao Toi, Noritsugu Nakamura, Taro Fujii, Toshiro Kitaoka, Katsumi Togawa, Koichiro Furuta, Toru Awashima. fpt 2013: 106-111 [doi]

2011

Panel discussions: Impact on society by fusion and harmony of mobile devices, servers, and networks - Their direction of evolutions and optimal rolesMasato Motomura, Takafumi Aoki, Toru Awashima, Toru Baji, Masaaki Ishikawa. coolchips 2011: 1-2 [doi]

Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable ProcessorTakao Toi, Takumi Okamoto, Toru Awashima, Kazutoshi Wakabayashi, Hideharu Amano. ieicet, 94-A(12):2619-2627, 2011. [doi]

2010

Wire congestion aware synthesis for a dynamically reconfigurable processorTakao Toi, Takumi Okamoto, Toru Awashima, Kazutoshi Wakabayashi, Hideharu Amano. fpt 2010: 300-303 [doi]

High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable ProcessorTakao Toi, Noritsugu Nakamura, Yoshinosuke Kato, Toru Awashima, Kazutoshi Wakabayashi. ipsj, 3:91-104, 2010. [doi]

2006

High-level synthesis challenges and solutions for a dynamically reconfigurable processorTakao Toi, Noritsugu Nakamura, Yoshinosuke Kato, Toru Awashima, Kazutoshi Wakabayashi, Li Jing. iccad 2006: 702-708 [doi]

2005

Implementing core tasks of JPEG2000 Encoder on the Dynamically Reconfigurable ProcessorKatsuaki Deguchi, Shohei Abe, Masayasu Suzuki, Kenichiro Anjo, Toru Awashima, Hideharu Amano. arcs 2005: 12-18

An Adaptive Cryptographic Accelerator for IPsec on Dynamically Reconfigurable ProcessorYohei Hasegawa, Shohei Abe, Hiroki Matsutani, Hideharu Amano, Kenichiro Anjo, Toru Awashima. fpt 2005: 163-170

2004

1992

An optimal chip compaction method based on shortest path algorithm with automatic jog insertionToru Awashima, Wataru Yamamoto, Masao Sato, Tatsuo Ohtsuki. iccad 1992: 162-165 [doi]

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