The following publications are possibly variants of this publication:
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- Designs of High-Speed Triple-Node-Upset Hardened Latch Based on Dual-Modular-RedundancyZhengfeng Huang, Yan Zhang, Lei Ai, Huaguo Liang, Tianming Ni, Tai Song, Aibin Yan. jcsc, 33(5), March 2024. [doi]
- Multiple nodes upset tolerance DICE latch based on on-state transistorJianguo Hu, Zhikui Duan, Junrui Qin. ieiceee, 11(20):20140882, 2014. [doi]