Luigi Dadda - researchr alias

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Viewing Publication 1 - 28 from 28

2012

A Parallel-Serial Decimal Multiplier ArchitectureLuigi Dadda, M. Pisoni, Marco D. Santambrogio. cse 2012: 310-317 [doi]

2008

A variant of a radix-10 combinational multiplierLuigi Dadda, Aberto Nannarelli. iscas 2008: 3370-3373 [doi]

2007

Multioperand Parallel Decimal Adder: A Mixed Binary and BCD ApproachLuigi Dadda. TC, 56(10):1320-1328, 2007. [doi]

A Memory Unit for Priority Management in IPSec AcceleratorsLuigi Dadda, Alberto Ferrante, Marco Macchetti. icc 2007: 1533-1538 [doi]

2005

Quasi-Pipelined Hash CircuitsMarco Macchetti, Luigi Dadda. arith 2005: 222-229 [doi]

2004

An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512)Luigi Dadda, Marco Macchetti, Jeff Owen. glvlsi 2004: 421-425 [doi]

The Design of a High Speed ASIC Unit for the Hash Function SHA-256 (384, 512)Luigi Dadda, Marco Macchetti, Jeff Owen. date 2004: 70-75 [doi]

1998

A VLSI inner product macrocellLuca Breveglieri, Luigi Dadda. tvlsi, 6(2):292-298, 1998. [doi]

1997

Fast Arithmetic and Fault Tolerance in the FERMI SystemLuca Breveglieri, Luigi Dadda, Vincenzo Piuri. asap 1997: 374-383 [doi]

1996

Pipelined AddersLuigi Dadda, Vincenzo Piuri. TC, 45(3):348-356, 1996.

1995

Column Compression Pipelined MultipliersLuca Breveglieri, Luigi Dadda, Vincenzo Piuri. asap 1995: 93-103 [doi]

Bit-modular defect/fault-tolerant convolversLuigi Dadda, Vincenzo Piuri. dft 1995: 90-98 [doi]

1994

A processor for calorimetry at the Large Hadron Collider in the FERMI projectLuigi Dadda, Sami J. Inkinen, Vincennzo Ncenzo Piuri. asap 1994: 188-199 [doi]

Fault-Tolerant Modular ConvolvesLuigi Dadda, Vincenzo Piuri. dft 1994: 37-45

1993

1990

Testing of serial input convolversLuca Breveglieri, Luigi Dadda, Donatella Sciuto. jsa, 28(1-5):283-290, 1990. [doi]

A polyphase architecture for serial-input convolversLuigi Dadda. vlsisp, 2(1):17-27, 1990. [doi]

Byte-serial convolversLuigi Dadda. asap 1990: 530-541 [doi]

1989

On Serial-Input Multipliers for Two s Complement NumbersLuigi Dadda. TC, 38(9):1341-1345, 1989.

Polyphase convolversLuigi Dadda. arith 1989: 78-85 [doi]

1988

A serial-input serial-output bit-sliced convolverLuigi Dadda, Luca Breveglieri. iccd 1988: 490-495 [doi]

1985

Squarers for binary numbers in serial formLuigi Dadda. arith 1985: 173-179 [doi]

Fast multipliers for two's-complement numbers in serial formLuigi Dadda. arith 1985: 57-63 [doi]

1983

Some schemes for fast serial input multipliersLuigi Dadda. arith 1983: 52-59 [doi]

1980

Composite Parallel CountersLuigi Dadda. TC, 29(10):942-946, 1980.

1978

Multiple addition of binary serial numbersLuigi Dadda. arith 1978: 140-148 [doi]

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