Journal: IEEE Design & Test of Computers

Volume 11, Issue 4

2 -- 3. ITC celebrates 25th meeting
4 -- 0. Management Perspectives in EDA
6 -- 7Kaushik Roy, Abhijit Chatterjee. Guest Editors Introduction: Low-Power VLSI Design
8 -- 13Zachary J. Lemnios, Kaigham J. Gabriel. Low-Power Electronics
14 -- 23Sonya Gary, Pete Ippolito, Gianfranco Gerosa, Carl Dietz, Jim Eno, Hector Sanchez. PowerPC 603, A Microprocessor for Portable Computers
24 -- 30Ching-Long Su, Chi-Ying Tsui, Alvin M. Despain. Saving Power in the Control Path of Embedded Processors
32 -- 41Luca Benini, Polly Siegel, Giovanni De Micheli. Saving Power by Synthesizing Gated Clocks for Sequential Circuits
42 -- 43Robert A. Walker. Guest Editor s Introduction: The Status of High-Level Synthesis
44 -- 54Daniel D. Gajski, Loganath Ramachandran. Introduction to High-Level Synthesis
55 -- 64Ganesh Gopalakrishnan. Developing Micropipeline Wavefront Arbiters
65 -- 69William R. Simpson. A D&T Special Report: Defining ATLAS 2000
70 -- 77. A D&T Roundtable: Design Reuse
78 -- 80. 1994 Annual Index: Authors and Subjects
84 -- 86. TTTC Newsletter
87 -- 0. DATC Newsletter

Volume 11, Issue 3

6 -- 16Erwin Trischler, Mats Johansson. Ten: A Concurrent Test Engineering Environment
17 -- 27Mounir Fares, Bozena Kaminska. Exploring Test Space with Fuzzy Decision Making
28 -- 38Meng-Lieh Sheu, Chung-Len Lee. Simplifying Sequential Circuit Test Generation
39 -- 47Mark Kahrs, Bart N. Locanthi, Robert C. Restrick. Technology Mapping in Circuit Design Aids
48 -- 59Robert F. Sproull, Ivan E. Sutherland, Charles E. Molnar. The Counterflow Pipeline Processor Architecture
60 -- 69Scott Hauck, Steven M. Burns, Gaetano Borriello, Carl Ebeling. An FPGA for Implementing Asynchronous Circuits
80 -- 0. DATC Newsletter

Volume 11, Issue 2

2 -- 3. News
4 -- 5. Conference Reports
6 -- 7Tam Anh Chu, Rabindra K. Roy. Guest Editor s Introduction: Practical Asynchronous Design
8 -- 21Alan Marshall, Bill Coates, Polly Siegel. Designing an Asynchronous Communications Chip
22 -- 32Kees van Berkel, Ronan Burgess, Joep L. W. Kessels, Marly Roncken, Frits D. Schalij, Ad M. G. Peeters. Asynchronous Circuits for Low Power: A DCC Error Corrector
33 -- 42Wolfgang O. Budde, Hans-Georg Keller, Hans-Jürgen Reumerman, Paul van de Wiel. An Asynchronous, High-Speed Packet Switching Component
43 -- 49José A. Tierno, Alain J. Martin, Drazen Borkovic, Tak-Kwan Lee. A 100-MIPS GaAs Asynchronous Microprocessor
50 -- 63Takashi Nanya, Yoichiro Ueno, Hiroto Kagotani, Masashi Kuwako, Akihiro Takamura. TITAC: Design of A Quasi-Delay-Insensitive Microprocessor
64 -- 73Wojciech Maly, Derek Feltham, Anne E. Gattiker, Mark D. Hobaugh, Kenneth Backus, Michael E. Thomas. Smart-Substrate Multichip-Module Systems
74 -- 75. New Products
76 -- 77. DATC Newsletter
78 -- 79. TTTC Newsletter

Volume 11, Issue 1

2 -- 4. EIC Message
5 -- 0. New Products
7 -- 17Benoit Nadeau-Dostie, Dwayne Burek, Abu S. M. Hassan. ScanBist: A Multifrequency Scan-Based BIST Method
18 -- 26Sungho Kang, Stephen A. Szygenda. Design Validation: Comparing Theoretical and Empirical Results of Design Error Modeling
27 -- 38Einar J. Aas, Tore Steen, Karl Klingsheim. Quantifying Design Quality Through Design Experiments
40 -- 52Magdy S. Abadir, Ashish R. Parikh, Linda Bal, Peter Sandborn, Ken Drake. Analyzing Multichip Module Testing Strategies
53 -- 59R. G. (Ben) Bennitts. Progress in Design for Test: A Personal View
60 -- 68. A D&T Roundtable
71 -- 72. Conference Reports
75 -- 0. News