| 2961 | -- | 0 | Shinji Kimura. Foreword |
| 2962 | -- | 2970 | Yuji Takashima, Kazuyuki Ooya, Atsushi Kurokawa. Practical Redundant-Via Insertion Method Considering Manufacturing Variability and Reliability |
| 2971 | -- | 2978 | Yukihide Kohira, Suguru Suehiro, Atsushi Takahashi. A Fast Longer Path Algorithm for Routing Grid with Obstacles Using Biconnectivity Based Length Upper Bound |
| 2979 | -- | 2989 | Yuchun Ma, Xin Li, Yu Wang 0002, Xianlong Hong. Thermal-Aware Incremental Floorplanning for 3D ICs Based on MILP Formulation |
| 2990 | -- | 2997 | Bei Yu, Sheqin Dong, Song Chen, Satoshi Goto. Voltage and Level-Shifter Assignment Driven Floorplanning |
| 2998 | -- | 3006 | Yoichi Tomioka, Yoshiaki Kurata, Yukihide Kohira, Atsushi Takahashi. MILP-Based Efficient Routing Method with Restricted Route Structure for 2-Layer Ball Grid Array Packages |
| 3007 | -- | 3015 | Qiang Fu, Wai-Shing Luk, Jun Tao, Xuan Zeng, Wei Cai. Intra-Die Spatial Correlation Extraction with Maximum Likelihood Estimation Method for Multiple Test Chips |
| 3016 | -- | 3023 | Tsuyoshi Sakata, Takaaki Okumura, Atsushi Kurokawa, Hidenari Nakashima, Hiroo Masuda, Takashi Sato, Masanori Hashimoto, Koutaro Hachiya, Katsuhiro Furukawa, Masakazu Tanaka, Hiroshi Takafuji, Toshiki Kanamoto. An Approach for Reducing Leakage Current Variation due to Manufacturing Variability |
| 3024 | -- | 3034 | Xu Luo, Fan Yang, Xuan Zeng, Jun Tao, Hengliang Zhu, Wei Cai. A Modified Nested Sparse Grid Based Adaptive Stochastic Collocation Method for Statistical Static Timing Analysis |
| 3035 | -- | 3043 | Yu Liu, Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya. Find the Best Solution from Multiple Analog Topologies via Pareto-Optimality |
| 3044 | -- | 3051 | Mohammad Soleimani, Abdollah Khoei, Khayrollah Hadidi, Vahid Fagih Dinavari. Design of Voltage-Mode MAX-MIN Circuits with Low Area and Low Power Consumption |
| 3052 | -- | 3060 | Bo Yang, Shigetoshi Nakatake. Fast Shape Optimization of Metalization Patterns for Power-MOSFET Based Driver |
| 3061 | -- | 3069 | Duo Li, Sheldon X.-D. Tan. Fast Analysis of On-Chip Power Grid Circuits by Extended Truncated Balanced Realization Method |
| 3070 | -- | 3078 | Takayuki Fukuoka, Akira Tsuchiya, Hidetoshi Onodera. Statistical Gate Delay Model for Multiple Input Switching |
| 3079 | -- | 3081 | Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques |
| 3082 | -- | 3085 | Yonghee Park, Junghoe Choi, Jisuk Hong, Sanghoon Lee, Moon-Hyun Yoo, Jundong Cho. Accurate Systematic Hot-Spot Scoring Method and Score-Based Fixing Guidance Generation |
| 3086 | -- | 3093 | Yanni Zhao, Jinian Bian, Shujun Deng, Zhiqiu Kong, Kang Zhao. Constrained Stimulus Generation with Self-Adjusting Using Tabu Search with Memory |
| 3094 | -- | 3102 | Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye. Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction |
| 3103 | -- | 3110 | Qing Dong, Bo Yang, Jing Li, Shigetoshi Nakatake. Incremental Buffer Insertion and Module Resizing Algorithm Using Geometric Programming |
| 3111 | -- | 3118 | Lei Chen, Shinji Kimura. Optimizing Controlling-Value-Based Power Gating with Gate Count and Switching Activity |
| 3119 | -- | 3127 | Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki. X-Handling for Current X-Tolerant Compactors with More Unknowns and Maximal Compaction |
| 3128 | -- | 3135 | Yoshinobu Higami, Kewal K. Saluja, Hiroshi Takahashi, Shin-ya Kobayashi, Yuzo Takamatsu. Addressing Defect Coverage through Generating Test Vectors for Transistor Defects |
| 3136 | -- | 3142 | Kosuke Shioki, Narumi Okada, Toshiro Ishihara, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa. An Error Diagnosis Technique Based on Location Sets to Rectify Subcircuits |
| 3143 | -- | 3150 | Ya-Shih Huang, Yu-Ju Hong, Juinn-Dar Huang. Communication Synthesis for Interconnect Minimization in Multicycle Communication Architecture |
| 3151 | -- | 3159 | Junbo Yu, Qiang Zhou, Gang Qu, Jinian Bian. Peak Temperature Reduction by Physical Information Driven Behavioral Synthesis with Resource Usage Allocation |
| 3160 | -- | 3168 | Florin Balasa, Ilie I. Luican, Hongwei Zhu, Doru V. Nasui. Energy-Aware Memory Allocation Framework for Embedded Data-Intensive Signal Processing Applications |
| 3169 | -- | 3179 | Akira Ohchi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki. Floorplan-Aware High-Level Synthesis for Generalized Distributed-Register Architectures |
| 3180 | -- | 3181 | Gi-Ho Park, Jung-Wook Park, Gunok Jung, Shin-Dug Kim. Low-Power Embedded Processor Design Using Branch Direction |
| 3182 | -- | 3192 | Farhad Mehdipour, Hamid Noori, Koji Inoue, Kazuaki Murakami. Rapid Design Space Exploration of a Reconfigurable Instruction-Set Processor |
| 3193 | -- | 3202 | Liang-Bi Chen, Chi-Tsai Yeh, Hung-Yu Chen, Ing-Jer Huang. A System-Level Model of Design Space Exploration for a Tile-Based 3D Graphics SoC Refinement |
| 3203 | -- | 3210 | Dajiang Zhou, Jinjia Zhou, Jiayi Zhu, Satoshi Goto. A 48 Cycles/MB H.264/AVC Deblocking Filter Architecture for Ultra High Definition Applications |
| 3211 | -- | 3220 | Yue Qian, Zhonghai Lu, Wenhua Dou. Worst-Case Flit and Packet Delay Bounds in Wormhole Networks on Chip |
| 3221 | -- | 3228 | Ming-Chih Chen, Shen-Fu Hsiao. Low Cost Design of an Advanced Encryption Standard (AES) Processor Using a New Common-Subexpression-Elimination Algorithm |
| 3229 | -- | 3237 | Ryuta Nara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki. A Scan-Based Attack Based on Discriminators for AES Cryptosystems |
| 3238 | -- | 3247 | Nobuaki Tojo, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki. A Two-Level Cache Design Space Exploration System for Embedded Applications |
| 3248 | -- | 3257 | Sumek Wisayataksin, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda. Entropy Decoding Processor for Modern Multimedia Applications |
| 3258 | -- | 3267 | Takuji Hieda, Hiroaki Tanaka, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai. Heuristic Instruction Scheduling Algorithm Using Available Distance for Partial Forwarding Processor |
| 3268 | -- | 3275 | Taiga Takata, Yusuke Matsunaga. Efficient Cut Enumeration Heuristics for Depth-Optimum Technology Mapping for LUT-Based FPGAs |
| 3276 | -- | 0 | Mitsuho Yamada. Foreword |
| 3277 | -- | 3283 | Shin ya Nishida. Two Principles of High-Level Human Visual Processing Potentially Useful for Image and Video Quality Assessment |
| 3284 | -- | 3290 | Toru Yamada, Yoshihiro Miyamoto, Yuzo Senda, Masahiro Serizawa. Video-Quality Estimation Based on Reduced-Reference Model Employing Activity-Difference |
| 3291 | -- | 3296 | Kenji Sugiyama, Naoya Sagara, Yohei Kashimura. Estimation of Mosquito Noise Level from Decoded Picture |
| 3297 | -- | 3306 | Kazuhisa Yamagishi, Takanori Hayashi. Non-intrusive Packet-Layer Model for Monitoring Video Quality of IPTV Services |
| 3307 | -- | 3312 | Amal Punchihewa, Jonathan Armstrong, Seiichiro Hangai, Takayuki Hamamoto. Objective Evaluation of Components of Colour Distortions due to Image Compression |
| 3313 | -- | 3320 | Rachel Mabanag Chong, Toshihisa Tanaka. Detection and Classification of Invariant Blurs |
| 3321 | -- | 3327 | Hideyasu Kuniba, Roy S. Berns. The Effects of Sensor Spectral Sensitivity, Pixel Pitch, Photon Shot Noise, and Dark Noise on Perceived Image Quality |
| 3328 | -- | 3335 | Masayuki Ukishima, Hitomi Kaneko, Toshiya Nakaguchi, Norimichi Tsumura, Markku Hauta-Kasari, Jussi Parkkinen, Yoichi Miyake. A Simple Method to Measure MTF of Paper and Its Application for Dot Gain Analysis |
| 3336 | -- | 3343 | Zisheng Li, Jun-ichi Imai, Masahide Kaneko. Face Alignment Based on Statistical Models Using SIFT Descriptors |
| 3344 | -- | 3354 | Osama A. Omer, Toshihisa Tanaka. Image Restoration Based on Adaptive Directional Regularization |
| 3355 | -- | 3360 | Le Thanh Ha, Chun-Su Park, Seung-Won Jung, Sung Jea Ko. An Improved Method to CABAC in the H.264/AVC Video Compression Standard |
| 3361 | -- | 3368 | Yiqing Huang, Qin Liu, Shuijiong Wu, Zhewen Zheng, Takeshi Ikenaga. Macroblock and Motion Feature Analysis to H.264/AVC Fast Inter Mode Decision |
| 3369 | -- | 3371 | Seung-Won Jung, Yeo-Jin Yoon, Hyeong-Min Nam, Sung Jea Ko. Improved Vector Quantization Based Block Truncation Coding Using Template Matching and Lloyd Quantization |
| 3372 | -- | 3375 | Ayano Kikuchi, Keita Hirai, Toshiya Nakaguchi, Norimichi Tsumura, Yoichi Miyake. Adaptive Ambient Illumination Based on Color Harmony Model |
| 3376 | -- | 3380 | Hiroshi Shinozaki, Takehiro Mori. Boundary Implications for Stability Analysis of a Class of Uncertain Linear Time-Delay Systems by the Lambert W Function |
| 3381 | -- | 3389 | Jung-Lin Yang, Chih-Wei Chao. Ultra Low Power Delay Element with Post-Chip Adjustable Ability |
| 3390 | -- | 3393 | Dane Baang, Dongkyoung Chwa. Deadbeat Control for Linear Systems with Input Constraints |
| 3394 | -- | 3397 | Ryo Takahashi, Ken Umeno. Performance Analysis of Complex CDMA Using Complex Chaotic Spreading Sequence with Constant Power |
| 3398 | -- | 3400 | Naoki Shimotsuma, Shin-Ichi Nakano. A Simple Canonical Code for Fullerene Graphs |
| 3401 | -- | 3403 | Nasour Bagheri, Lars R. Knudsen, Majid Naderi, Søren S. Thomsen. Hash Functions and Information Theoretic Security |
| 3404 | -- | 3406 | Shinya Matsufuji, Pingzhi Fan. Constructions of Factorizable Multilevel Hadamard Matrices |
| 3407 | -- | 3411 | Dong-Hoon Han, Yung-Ki Lee, Yung Lyul Lee. Fast Mode Decision Using Global Disparity Vector for Multiview Video Coding |